\n
address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection :
I2S_CR
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
I2SEN : I2SEN
bits : 0 - 0 (1 bit)
access : read-write
TXEN : TXEN
bits : 1 - 2 (2 bit)
access : read-write
RXEN : RXEN
bits : 2 - 4 (3 bit)
access : read-write
SMPSIZE : SMPSIZE
bits : 4 - 9 (6 bit)
access : read-write
FORMAT : FORMAT
bits : 6 - 13 (8 bit)
access : read-write
BITEXT : BITEXT
bits : 8 - 16 (9 bit)
access : read-write
MCLKEN : MCLKEN
bits : 9 - 18 (10 bit)
access : read-write
REPEAT : REPEAT
bits : 10 - 20 (11 bit)
access : read-write
CHANNEL : CHANNEL
bits : 11 - 22 (12 bit)
access : read-write
TXMUTE : TXMUTE
bits : 12 - 24 (13 bit)
access : read-write
TXDMAEN : TXDMAEN
bits : 13 - 26 (14 bit)
access : read-write
RXDMAEN : RXDMAEN
bits : 14 - 28 (15 bit)
access : read-write
CLKDEN : CLKDEN
bits : 15 - 30 (16 bit)
access : read-write
RCEN : RCEN
bits : 16 - 32 (17 bit)
access : read-write
RCSEL : RCSEL
bits : 17 - 34 (18 bit)
access : read-write
BCKINV : BCKINV
bits : 18 - 36 (19 bit)
access : read-write
MCKINV : MCKINV
bits : 19 - 38 (20 bit)
access : read-write
I2S_RXDR
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RXDR : RXDR
bits : 0 - 31 (32 bit)
access : read-write
I2S_FCR
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFTLS : TXFTLS
bits : 0 - 3 (4 bit)
access : read-write
RXFTLS : RXFTLS
bits : 4 - 11 (8 bit)
access : read-write
TXFRST : TXFRST
bits : 8 - 16 (9 bit)
access : read-write
RXFRST : RXFRST
bits : 9 - 18 (10 bit)
access : read-write
I2S_SR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFTL : TXFTL
bits : 0 - 0 (1 bit)
access : read-write
TXFUD : TXFUD
bits : 1 - 2 (2 bit)
access : read-write
TXFOV : TXFOV
bits : 2 - 4 (3 bit)
access : read-write
TXFEMT : TXFEMT
bits : 3 - 6 (4 bit)
access : read-write
TXFFUL : TXFFUL
bits : 4 - 8 (5 bit)
access : read-write
RXFTL : RXFTL
bits : 8 - 16 (9 bit)
access : read-write
RXFUD : RXFUD
bits : 9 - 18 (10 bit)
access : read-write
RXFOV : RXFOV
bits : 10 - 20 (11 bit)
access : read-write
RXFEMT : RXFEMT
bits : 11 - 22 (12 bit)
access : read-write
RXFFUL : RXFFUL
bits : 12 - 24 (13 bit)
access : read-write
CHS : CHS
bits : 16 - 32 (17 bit)
access : read-write
TXBUSY : TXBUSY
bits : 17 - 34 (18 bit)
access : read-write
CLKRDY : CLKRDY
bits : 18 - 36 (19 bit)
access : read-write
TXFS : TXFS
bits : 24 - 51 (28 bit)
access : read-write
RXFS : RXFS
bits : 28 - 59 (32 bit)
access : read-write
I2S_RCNTR
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RCNTR : RCNTR
bits : 0 - 19 (20 bit)
access : read-write
I2S_IER
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXFTLIEN : TXFTLIEN
bits : 0 - 0 (1 bit)
access : read-write
TXUDIEN : TXUDIEN
bits : 1 - 2 (2 bit)
access : read-write
TXOVIEN : TXOVIEN
bits : 2 - 4 (3 bit)
access : read-write
RXFTLIEN : RXFTLIEN
bits : 4 - 8 (5 bit)
access : read-write
RXUDIEN : RXUDIEN
bits : 5 - 10 (6 bit)
access : read-write
RXOVIEN : RXOVIEN
bits : 6 - 12 (7 bit)
access : read-write
I2S_CDR
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Y_DIV : Y_DIV
bits : 0 - 7 (8 bit)
access : read-write
X_DIV : X_DIV
bits : 8 - 23 (16 bit)
access : read-write
N_DIV : N_DIV
bits : 16 - 39 (24 bit)
access : read-write
I2S_TXDR
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TXDR : TXDR
bits : 0 - 31 (32 bit)
access : read-write
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