QEI_CNT

QEI_CNTMAX

QEI_CTL

QEI_STATUS

QEI_CNTHOLD

QEI_CNTLATCH

QEI_CNTCMP

CNT : Quadrature Encoder Interface Counter A 32-bit up/down counter. When an effective phase pulse is detected, this counter is increased by one if the bit DIRF (QEI_STATUS[8]) is one or decreased by one if the bit DIRF(QEI_STATUS[8]) is 0. This register performs an integrator which count value is proportional to the encoder position. The pulse counter may be initialized to a predetermined value by one of three events occurs:
bits : 0 - 31 (32 bit)
access : read-write

CNTMAX : Quadrature Encoder Interface Preset Maximum Count This register value determined by user stores the maximum value which may be the number of the QEI counter for the QEI controller compare-counting mode.
bits : 0 - 31 (32 bit)
access : read-write

NFCLKSEL : Noise Filter Clock Pre-divide Selection To determine the sampling frequency of the Noise Filter clock .
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NFDIS : QEI Controller Input Noise Filter Disable Bit
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHAEN : QEA Input to QEI Controller Enable Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHBEN : QEB Input to QEI Controller Enable Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXEN : IDX Input to QEI Controller Enable Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MODE : QEI Counting Mode Selection There are four quadrature encoder pulse counter operation modes.
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHAINV : Inverse QEA Input Polarity
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHBINV : Inverse QEB Input Polarity
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXINV : Inverse IDX Input Polarity
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OVUNIEN : OVUNF Trigger QEI Interrupt Enable Bit
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIRIEN : DIRCHGF Trigger QEI Interrupt Enable Bit
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPIEN : CMPF Trigger QEI Interrupt Enable Bit
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXIEN : IDXF Trigger QEI Interrupt Enable Bit
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HOLDTMR0 : Hold QEI_CNT by Timer 0
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HOLDTMR1 : Hold QEI_CNT by Timer 1
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HOLDTMR2 : Hold QEI_CNT by Timer 2
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HOLDTMR3 : Hold QEI_CNT by Timer 3
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HOLDCNT : Hold QEI_CNT Control When this bit is set from low to high, the CNT(QEI_CNT[31:0]) is copied into CNTHOLD(QEI_CNTHOLD[31:0]). This bit may be set by writing 1 to it or Timer0~Timer3 interrupt flag TIF (TIMERx_INTSTS[0]). Note: This bit is automatically cleared after QEI_CNTHOLD holds QEI_CNT value.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXLATEN : Index Latch QEI_CNT Enable Bit If this bit is set to high, the CNT(QEI_CNT[31:0]) content will be latched into CNTLATCH (QEI_CNTLATCH[31:0]) at every rising on signal CHX.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXRLDEN : Index Trigger QEI_CNT Reload Enable Bit
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPEN : The Compare Function Enable Bit The compare function in QEI controller is to compare the dynamic counting QEI_CNT with the compare register CNTCMP( QEI_CNTCMP[31:0]), if CNT(QEI_CNT[31:0]) reaches CNTCMP( QEI_CNTCMP[31:0]), the flag CMPF will be set.
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

QEIEN : Quadrature Encoder Interface Controller Enable Bit
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IDXF : IDX Detected Flag When the QEI controller detects a rising edge on signal CHX it will set flag IDXF to high. Note: This bit is only cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CMPF : Compare-match Flag If the QEI compare function is enabled, the flag is set by hardware while QEI counter up or down counts and reach to the CNTCMP(QEI_CNTCMP[31:0]). Note: This bit is only cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OVUNF : QEI Counter Overflow or Underflow Flag Flag is set by hardware while CNT(QEI_CNT[31:0]) overflows from 0xFFFF_FFFF to 0 in free-counting mode or from the CNTMAX (QEI_CNTMAX[31:0]) to 0 in compare-counting mode. Similarly, the flag is set while QEI counter underflows from 0 to 0xFFFF_FFFF or CNTMAX (QEI_CNTMAX[31:0]). Note: This bit is only cleared by writing 1 to it.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIRCHGF : Direction Change Flag Flag is set by hardware while QEI counter counting direction is changed. Software can clear this bit by writing 1 to it. Note: This bit is only cleared by writing 1 to it.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DIRF : QEI Counter Counting Direction Indication Note: This bit is set/reset by hardware according to the phase detection between CHA and CHB.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CNTHOLD : Quadrature Encoder Interface Counter Hold When the bit HOLDCNT (QEI_CTL[24]) goes from low to high, the CNT(QEI_CNT[31:0]) is copied into CNTHOLD (QEI_CNTHOLD[31:0]) register.
bits : 0 - 31 (32 bit)
access : read-write

CNTLATCH : Quadrature Encoder Interface Counter Index Latch When the IDXF (QEI_STATUS[0]) bit is set, the CNT(QEI_CNT[31:0]) is copied into CNTLATCH (QEI_CNTLATCH[31:0]) register.
bits : 0 - 31 (32 bit)
access : read-write

CNTCMP : Quadrature Encoder Interface Counter Compare
bits : 0 - 31 (32 bit)
access : read-write