HcRevision

HcInterruptEnable

HcInterruptDisable

HcHCCA

HcPeriodCurrentED

HcControlHeadED

HcPhyControl

HcMiscControl

HcControlCurrentED

HcBulkHeadED

HcBulkCurrentED

HcDoneHead

HcFmInterval

HcFmRemaining

HcFmNumber

HcControl

HcPeriodicStart

HcLSThreshold

HcRhDescriptorA

HcRhDescriptorB

HcRhStatus

HcRhPortStatus1

HcCommandStatus

HcInterruptStatus

REV : Revision Number Indicates the Open HCI Specification revision number implemented by the Hardware. Host Controller supports 1.1 specification.
bits : 0 - 7 (8 bit)
access : read-only

SO : Scheduling Overrun Enable Bit Write Operation:
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head Enable Bit Write Operation:
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start of Frame Enable Bit Write Operation:
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected Enable Bit Write Operation:
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow Enable Bit Write Operation:
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change Enable Bit Write Operation:
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MIE : Master Interrupt Enable Bit This bit is a global interrupt enable. A write of '1' allows interrupts to be enabled via the specific enable bits listed above. Write Operation:
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SO : Scheduling Overrun Disable Bit Write Operation:
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head Disable Bit Write Operation:
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start of Frame Disable Bit Write Operation:
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected Disable Bit Write Operation:
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow Disable Bit Write Operation:
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change Disable Bit Write Operation:
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MIE : Master Interrupt Disable Bit Global interrupt disable. Writing '1' to disable all interrupts. Write Operation:
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCCA : Host Controller Communication Area Pointer to indicate the base address of the Host Controller Communication Area (HCCA).
bits : 8 - 31 (24 bit)
access : read-write

PCED : Periodic Current ED Pointer to indicate the physical address of the current Isochronous or Interrupt Endpoint Descriptor.
bits : 4 - 31 (28 bit)
access : read-write

CHED : Control Head ED Pointer to indicate the physical address of the first Endpoint Descriptor of the Control list.
bits : 4 - 31 (28 bit)
access : read-write

STBYEN : USB Transceiver Standby Enable Bit This bit controls if USB transceiver could enter the standby mode to reduce power consumption.
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ABORT : AHB Bus Error Response This bit indicates there is an Error response received in AHB bus. Note: This bit is cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCAL : Overcurrent Active Low This bit controls the polarity of overcurrent flag from external power IC.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PPCAL : Port Power Control Active Low This bit controls the polarity of port power control to external power IC.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DPRT1 : Disable Port 1 This bit controls if the connection between USB host controller and transceiver of port 1 is disabled. If the connection is disabled, the USB host controller will not recognize any event of USB bus. Set this bit high, the transceiver of port 1 will also be forced into the standby mode no matter what USB host controller operation is.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CCED : Control Current Head ED Pointer to indicate the physical address of the current Endpoint Descriptor of the Control list.
bits : 4 - 31 (28 bit)
access : read-write

BHED : Bulk Head ED Pointer to indicate the physical address of the first Endpoint Descriptor of the Bulk list.
bits : 4 - 31 (28 bit)
access : read-write

BCED : Bulk Current Head ED Pointer to indicate the physical address of the current Endpoint Descriptor of the Bulk list.
bits : 4 - 31 (28 bit)
access : read-write

DH : Done Head Pointer to indicate the physical address of the last completed Transfer Descriptor that was added to the Done queue.
bits : 4 - 31 (28 bit)
access : read-write

FI : Frame Interval This field specifies the length of a frame as (bit times - 1). For 12,000 bit times in a frame, a value of 11,999 is stored here.
bits : 0 - 13 (14 bit)
access : read-write

FSMPS : FS Largest Data Packet This field specifies a value that is loaded into the Largest Data Packet Counter at the beginning of each frame.
bits : 16 - 29 (14 bit)
access : read-write

FIT : Frame Interval Toggle This bit is toggled by Host Controller Driver when it loads a new value into FI (HcFmInterval[13:0]).
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FR : Frame Remaining When the Host Controller is in the USBOPERATIONAL state, this 14-bit field decrements each 12 MHz clock period. When the count reaches 0, (end of frame) the counter reloads with Frame Interval. In addition, the counter loads when the Host Controller transitions into USBOPERATIONAL.
bits : 0 - 13 (14 bit)
access : read-only

FRT : Frame Remaining Toggle This bit is loaded from the FIT (HcFmInterval[31]) whenever FR (HcFmRemaining[13:0]) reaches 0.
bits : 31 - 31 (1 bit)
access : read-only

FN : Frame Number This 16-bit incrementing counter field is incremented coincident with the re-load of FR (HcFmRemaining[13:0]). The count rolls over from 'FFFFh' to '0h.'
bits : 0 - 15 (16 bit)
access : read-only

CBSR : Control Bulk Service Ratio This specifies the service ratio between Control and Bulk EDs. Before processing any of the non-periodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In case of reset, HCD is responsible for restoring this value.
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PLE : Periodic List Enable Bit When set, this bit enables processing of the Periodic (interrupt and isochronous) list. The Host Controller checks this bit prior to attempting any periodic transfers in a frame. Note: To enable the processing of the Isochronous list, user has to set both PLE and IE (HcControl[3]) high.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

IE : Isochronous List Enable Bit Both IE and PLE (HcControl[2]) high enables Host Controller to process the Isochronous list. Either IE or PLE (HcControl[2]) is low disables Host Controller to process the Isochronous list.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLE : Control List Enable Bit
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BLE : Bulk List Enable Bit
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCFS : Host Controller Functional State This field sets the Host Controller state. The Controller may force a state change from USBSUSPEND to USBRESUME after detecting resume signaling from a downstream port. States are:
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PS : Periodic Start This field contains a value used by the List Processor to determine where in a frame the Periodic List processing must begin.
bits : 0 - 13 (14 bit)
access : read-write

LST : Low-speed Threshold
bits : 0 - 11 (12 bit)
access : read-write

NDP : Number Downstream Ports USB host control supports two downstream ports and only one port is available in this series of chip.
bits : 0 - 7 (8 bit)
access : read-write

PSM : Power Switching Mode This bit is used to specify how the power switching of the Root Hub ports is controlled.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCPM : Overcurrent Protection Mode This bit describes how the overcurrent status for the Root Hub ports reported. This bit is only valid when NOCP (HcRhDescriptorA[12]) is cleared.
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

NOCP : No Overcurrent Protection This bit describes how the overcurrent status for the Root Hub ports reported.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PPCM : Port Power Control Mask Global power switching. This field is only valid if Power Switching Mode is set (individual port switching). When set, the port only responds to individual port power switching commands (Set/Clear Port Power). When cleared, the port only responds to global power switching commands (Set/Clear Global Power). Note: PPCM[15:2] and PPCM[0] are reserved.
bits : 16 - 31 (16 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LPS : Clear Global Power
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCI : Overcurrent Indicator (Read Only) This bit reflects the state of the overcurrent status pin. This field is only valid if NOCP (HcRhDescriptorA[12]) and OCPM (HcRhDescriptorA[11]) are cleared.
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

DRWE : Device Remote Wakeup Enable Bit This bit controls if port's Connect Status Change as a remote wake-up event. Write Operation:
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LPSC : Set Global Power
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCIC : Overcurrent Indicator Change This bit is set by hardware when a change has occurred in OCI (HcRhStatus[1]). Write 1 to clear this bit to 0.
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CRWE : Clear Remote Wake-up Enable Bit This bit is use to clear DRWE (HcRhStatus[15]). This bit is always read as 0. Write Operation:
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CCS : Current Connect Status (Read) or Clear Port Enable (Write) Write Operation:
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PES : Port Enable Status (Read) or Set Port Enable (Write) Write Operation:
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PSS : Port Suspend Status (Read) or Set Port Suspend (Write) This bit indicates the port is suspended Write Operation:
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

POCI : Port Overcurrent Indicator (Read) or Clear Port Suspend (Write) This bit reflects the state of the overcurrent status pin dedicated to this port. This field is only valid if NOCP (HcRhDescriptorA[12]) is cleared and OCPM (HcRhDescriptorA[11]) is set. This bit is also used to initiate the selective result sequence for the port. Write Operation:
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRS : Port Reset Status (Read) or Set Port Reset (Write) This bit reflects the reset state of the port. Write Operation:
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PPS : Port Power Status (Read) or Set Port Power (Write) This bit reflects the power state of the port regardless of the power switching mode. Write Operation:
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

LSDA : Low Speed Device Attached (Read) or Clear Port Power (Write) This bit defines the speed (and bus idle) of the attached device. It is only valid when CCS (HcRhPortStatus1[0]) is set. This bit is also used to clear port power. Write Operation:
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CSC : Connect Status Change This bit indicates connect or disconnect event has been detected (CCS (HcRhPortStatus1[0]) changed). Write 1 to clear this bit to 0.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PESC : Port Enable Status Change This bit indicates that the port has been disabled (PES (HcRhPortStatus1[1]) cleared) due to a hardware event. Write 1 to clear this bit to 0.
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PSSC : Port Suspend Status Change This bit indicates the completion of the selective resume sequence for the port. Write 1 to clear this bit to 0.
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OCIC : Port Overcurrent Indicator Change This bit is set when POCI (HcRhPortStatus1[3]) changes. Write 1 to clear this bit to 0.
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PRSC : Port Reset Status Change This bit indicates that the port reset signal has completed. Write 1 to clear this bit to 0.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

HCR : Host Controller Reset This bit is set to initiate the software reset of Host Controller. This bit is cleared by the Host Controller, upon completed of the reset operation. This bit, when set, didn't reset the Root Hub and no subsequent reset signaling be asserted to its downstream ports.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLF : Control List Filled Set high to indicate there is an active TD on the Control List. It may be set by either software or the Host Controller and cleared by the Host Controller each time it begins processing the head of the Control List.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BLF : Bulk List Filled Set high to indicate there is an active TD on the Bulk list. This bit may be set by either software or the Host Controller and cleared by the Host Controller each time it begins processing the head of the Bulk list.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SOC : Schedule Overrun Count (Read Only) These bits are incremented on each scheduling overrun error. It is initialized to 00b and wraps around at 11b. This will be incremented when a scheduling overrun is detected even if SO (HcInterruptStatus[0]) has already been set.
bits : 16 - 17 (2 bit)
access : read-only

SO : Scheduling Overrun Set when the List Processor determines a Schedule Overrun has occurred. Note: This bit is cleared by writing 1 to it.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDH : Write Back Done Head Set after the Host Controller has written HcDoneHead to HccaDoneHead. Further updates of the HccaDoneHead will not occur until this bit has been cleared. Note: This bit is cleared by writing 1 to it.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SF : Start of Frame Set when the Frame Management functional block signals a 'Start of Frame' event. Host Control generates a SOF token at the same time. Note: This bit is cleared by writing 1 to it.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RD : Resume Detected Set when Host Controller detects resume signaling on a downstream port. Note: This bit is cleared by writing 1 to it.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FNO : Frame Number Overflow This bit is set when bit 15 of Frame Number changes from 1 to 0 or from 0 to 1. Note: This bit is cleared by writing 1 to it.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RHSC : Root Hub Status Change This bit is set when the content of HcRhStatus or the content of HcRhPortStatus1 register has changed. Note: This bit is cleared by writing '1Fh' to HcRhPortStatus1[20:16].
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.