Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :
Analog Comparator 0 Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACMPEN : Comparator Enable Bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 0 Disabled
#1 : 1
Comparator 0 Enabled
End of enumeration elements list.
ACMPIE : Comparator Interrupt Enable Bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 0 interrupt Disabled
#1 : 1
Comparator 0 interrupt Enabled. If WKEN (ACMP_CTL0[16]) is set to 1, the wake-up interrupt function will be enabled as well
End of enumeration elements list.
ACMPOINV : Comparator Output Inverse
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 0 output inverse Disabled
#1 : 1
Comparator 0 output inverse Enabled
End of enumeration elements list.
NEGSEL : Comparator Negative Input Selection
Note: NEGSEL must select 2'b01 in calibration mode.
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#00 : 0
ACMP0_N pin
#01 : 1
Internal comparator reference voltage (CRV0)
#10 : 2
Band-gap voltage
#11 : 3
DAC0 output
End of enumeration elements list.
POSSEL : Comparator Positive Input Selection
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
#00 : 0
Input from ACMP0_P0
#01 : 1
Input from ACMP0_P1
#10 : 2
Input from ACMP0_P2
#11 : 3
Input from ACMP0_P3
End of enumeration elements list.
INTPOL : Interrupt Condition Polarity Selection
ACMPIF0 will be set to 1 when comparator output edge condition is detected.
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
#00 : 0
Rising edge or falling edge
#01 : 1
Rising edge
#10 : 2
Falling edge
#11 : 3
Reserved.
End of enumeration elements list.
OUTSEL : Comparator Output Select
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 0 output to ACMP0_O pin is unfiltered comparator output
#1 : 1
Comparator 0 output to ACMP0_O pin is from filter output
End of enumeration elements list.
FILTSEL : Comparator Output Filter Count Selection
bits : 13 - 15 (3 bit)
access : read-write
Enumeration:
#000 : 0
Filter function is Disabled
#001 : 1
ACMP0 output is sampled 1 consecutive PCLK
#010 : 2
ACMP0 output is sampled 2 consecutive PCLKs
#011 : 3
ACMP0 output is sampled 4 consecutive PCLKs
#100 : 4
ACMP0 output is sampled 8 consecutive PCLKs
#101 : 5
ACMP0 output is sampled 16 consecutive PCLKs
#110 : 6
ACMP0 output is sampled 32 consecutive PCLKs
#111 : 7
ACMP0 output is sampled 64 consecutive PCLKs
End of enumeration elements list.
WKEN : Power-down Wake-up Enable Bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Wake-up function Disabled
#1 : 1
Wake-up function Enabled
End of enumeration elements list.
WLATEN : Window Latch Mode Enable Bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Window Latch Mode Disabled
#1 : 1
Window Latch Mode Enabled
End of enumeration elements list.
WCMPSEL : Window Compare Mode Selection
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Window Compare Mode Disabled
#1 : 1
Window Compare Mode is Selected
End of enumeration elements list.
FCLKDIV : Comparator Output Filter Clock Divider
bits : 20 - 21 (2 bit)
access : read-write
Enumeration:
#00 : 0
Comparator output filter clock = PCLK
#01 : 1
Comparator output filter clock = PCLK/2
#10 : 2
Comparator output filter clock = PCLK/4
#11 : 3
Reserved.
End of enumeration elements list.
HYSSEL : Hysteresis Mode Selection
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#000 : 0
Hysteresis is 0mV
#010 : 2
Hysteresis is 20mV
#100 : 4
Hysteresis is 40mV
End of enumeration elements list.
Analog Comparator Calibration Control Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALTRG0 : Comparator0 Calibration Trigger Bit
Note 1: Before this bit is enabled,ACMPEN(ACMP_CTL0[0]) should be set and the internal high speed RC oscillator (HIRC) should be enabled in advance.
Note 2: Hardware will auto clear this bit when the next calibration is triggered by software.
Note 3: If user must trigger calibration twice or more times, the second trigger has to wait at least 300us after the previous calibration is done.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Calibration is stopped
#1 : 1
Calibration is triggered
End of enumeration elements list.
CALTRG1 : Comparator1 Calibration Trigger Bit
Note 1: Before this bit is enabled, ACMPEN(ACMP_CTL1[0]) should be set and the internal high speed RC oscillator (HIRC) should be enabled in advance.
Note 2: Hardware will auto clear this bit when the next calibration is triggered by software.
Note 3: If user must trigger calibration twice or more times, the second trigger has to wait at least 300us after the previous calibration is done.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Calibration is stopped
#1 : 1
Calibration is triggered
End of enumeration elements list.
Analog Comparator Calibration Status Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DONE0 : Comparator0 Calibration Done Status
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
Calibrating
#1 : 1
Calibration done
End of enumeration elements list.
CALNS0 : Comparator0 Calibration Result Status for NMOS
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pass
#1 : 1
Fail
End of enumeration elements list.
CALPS0 : Comparator0 Calibration Result Status for PMOS
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pass
#1 : 1
Fail
End of enumeration elements list.
DONE1 : Comparator1 Calibration Done Status
bits : 4 - 4 (1 bit)
access : read-only
Enumeration:
#0 : 0
Calibrating
#1 : 1
Calibration done
End of enumeration elements list.
CALNS1 : Comparator1 Calibration Result Status for NMOS
bits : 5 - 5 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pass
#1 : 1
Fail
End of enumeration elements list.
CALPS1 : Comparator1 Calibration Result Status for PMOS
bits : 6 - 6 (1 bit)
access : read-only
Enumeration:
#0 : 0
Pass
#1 : 1
Fail
End of enumeration elements list.
Analog Comparator 1 Control Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACMPEN : Comparator Enable Bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 1 Disabled
#1 : 1
Comparator 1 Enabled
End of enumeration elements list.
ACMPIE : Comparator Interrupt Enable Bit
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 1 interrupt Disabled
#1 : 1
Comparator 1 interrupt Enabled. If WKEN (ACMP_CTL1[16]) is set to 1, the wake-up interrupt function will be enabled as well
End of enumeration elements list.
ACMPOINV : Comparator Output Inverse Control
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 1 output inverse Disabled
#1 : 1
Comparator 1 output inverse Enabled
End of enumeration elements list.
NEGSEL : Comparator Negative Input Selection
Note: NEGSEL must select 2'b01 in calibration mode.
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
#00 : 0
ACMP1_N pin
#01 : 1
Internal comparator reference voltage (CRV1)
#10 : 2
Band-gap voltage
#11 : 3
DAC0 output
End of enumeration elements list.
POSSEL : Comparator Positive Input Selection
bits : 6 - 7 (2 bit)
access : read-write
Enumeration:
#00 : 0
Input from ACMP1_P0
#01 : 1
Input from ACMP1_P1
#10 : 2
Input from ACMP1_P2
#11 : 3
Input from ACMP1_P3
End of enumeration elements list.
INTPOL : Interrupt Condition Polarity Selection
ACMPIF1 will be set to 1 when comparator output edge condition is detected.
bits : 8 - 9 (2 bit)
access : read-write
Enumeration:
#00 : 0
Rising edge or falling edge
#01 : 1
Rising edge
#10 : 2
Falling edge
#11 : 3
Reserved.
End of enumeration elements list.
OUTSEL : Comparator Output Select
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
Comparator 1 output to ACMP1_O pin is unfiltered comparator output
#1 : 1
Comparator 1 output to ACMP1_O pin is from filter output
End of enumeration elements list.
FILTSEL : Comparator Output Filter Count Selection
bits : 13 - 15 (3 bit)
access : read-write
Enumeration:
#000 : 0
Filter function is Disabled
#001 : 1
ACMP1 output is sampled 1 consecutive PCLK
#010 : 2
ACMP1 output is sampled 2 consecutive PCLKs
#011 : 3
ACMP1 output is sampled 4 consecutive PCLKs
#100 : 4
ACMP1 output is sampled 8 consecutive PCLKs
#101 : 5
ACMP1 output is sampled 16 consecutive PCLKs
#110 : 6
ACMP1 output is sampled 32 consecutive PCLKs
#111 : 7
ACMP1 output is sampled 64 consecutive PCLKs
End of enumeration elements list.
WKEN : Power-down Wakeup Enable Bit
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
Wake-up function Disabled
#1 : 1
Wake-up function Enabled
End of enumeration elements list.
WLATEN : Window Latch Mode Enable Bit
bits : 17 - 17 (1 bit)
access : read-write
Enumeration:
#0 : 0
Window Latch Mode Disabled
#1 : 1
Window Latch Mode Enabled
End of enumeration elements list.
WCMPSEL : Window Compare Mode Selection
bits : 18 - 18 (1 bit)
access : read-write
Enumeration:
#0 : 0
Window Compare Mode Disabled
#1 : 1
Window Compare Mode is Selected
End of enumeration elements list.
FCLKDIV : Comparator Output Filter Clock Divider
bits : 20 - 21 (2 bit)
access : read-write
Enumeration:
#00 : 0
comparator output filter clock = PCLK
#01 : 1
comparator output filter clock = PCLK/2
#10 : 2
comparator output filter clock = PCLK/4
#11 : 3
Reserved.
End of enumeration elements list.
HYSSEL : Hysteresis Mode Selection
bits : 24 - 26 (3 bit)
access : read-write
Enumeration:
#000 : 0
Hysteresis is 0mV
#010 : 2
Hysteresis is 20mV
#100 : 4
Hysteresis is 40mV
End of enumeration elements list.
Analog Comparator Status Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ACMPIF0 : Comparator 0 Interrupt Flag
This bit is set by hardware when the edge condition defined by INTPOL (ACMP_CTL0[9:8]) is detected on comparator 0 output. This will generate an interrupt if ACMPIE (ACMP_CTL0[1]) is set to 1.
Note: Write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write
ACMPIF1 : Comparator 1 Interrupt Flag
This bit is set by hardware when the edge condition defined by INTPOL (ACMP_CTL1[9:8]) is detected on comparator 1 output. This will cause an interrupt if ACMPIE (ACMP_CTL1[1]) is set to 1.
Note: Write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write
ACMPO0 : Comparator 0 Output
Synchronized to the PCLK to allow reading by software. Cleared when the comparator 0 is disabled, i.e. ACMPEN (ACMP_CTL0[0]) is cleared to 0.
bits : 4 - 4 (1 bit)
access : read-write
ACMPO1 : Comparator 1 Output
Synchronized to the PCLK to allow reading by software. Cleared when the comparator 1 is disabled, i.e. ACMPEN (ACMP_CTL1[0]) is cleared to 0.
bits : 5 - 5 (1 bit)
access : read-write
WKIF0 : Comparator 0 Power-down Wake-up Interrupt Flag
This bit will be set to 1 when ACMP0 wake-up interrupt event occurs.
Note: Write 1 to clear this bit to 0.
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
No power-down wake-up occurred
#1 : 1
Power-down wake-up occurred
End of enumeration elements list.
WKIF1 : Comparator 1 Power-down Wake-up Interrupt Flag
This bit will be set to 1 when ACMP1 wake-up interrupt event occurs.
Note: Write 1 to clear this bit to 0.
bits : 9 - 9 (1 bit)
access : read-write
Enumeration:
#0 : 0
No power-down wake-up occurred
#1 : 1
Power-down wake-up occurred
End of enumeration elements list.
ACMPS0 : Comparator 0 Status
Synchronized to the PCLK to allow reading by software. Cleared when the comparator 0 is disabled, i.e. ACMPEN (ACMP_CTL0[0]) is cleared to 0.
bits : 12 - 12 (1 bit)
access : read-write
ACMPS1 : Comparator 1 Status
Synchronized to the PCLK to allow reading by software. Cleared when the comparator 1 is disabled, i.e. ACMPEN (ACMP_CTL1[0]) is cleared to 0.
bits : 13 - 13 (1 bit)
access : read-write
ACMPWO : Comparator Window Output
This bit shows the output status of window compare mode
bits : 16 - 16 (1 bit)
access : read-write
Enumeration:
#0 : 0
The positive input voltage is outside the window
#1 : 1
The positive input voltage is in the window
End of enumeration elements list.
Analog Comparator Reference Voltage Control Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CRV0SEL : Comparator0 Reference Voltage Setting
bits : 0 - 5 (6 bit)
access : read-write
CRV0SSEL : CRV0 Source Voltage Selection
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
AVDD is selected as CRV0 source voltage
#1 : 1
The reference voltage defined by SYS_VREFCTL register is selected as CRV0 source voltage
End of enumeration elements list.
CRV0EN : CRV0 Enable Bit
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
CRV0 Disabled
#1 : 1
CRV0 Enabled
End of enumeration elements list.
CRV1SEL : Comparator1 Reference Voltage Setting
bits : 16 - 21 (6 bit)
access : read-write
CRV1SSEL : CRV1 Source Voltage Selection
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
AVDD is selected as CRV1 source voltage
#1 : 1
The reference voltage defined by SYS_VREFCTL register is selected as CRV1 source voltage
End of enumeration elements list.
CRV1EN : CRV1 Enable Bit
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#0 : 0
CRV1 Disabled
#1 : 1
CRV1 Enabled
End of enumeration elements list.
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