\n

OP

Peripheral Memory Blocks

address_offset : 0x4 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

Registers

OP_CTL (CTL)


OP_CTL (CTL)

OP Amplifier Control Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OP_CTL OP_CTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OP1EN

OP1EN : Output Amplifier1 Enable Control Note: The OP output needs to wait stable 20s after OPEN is first set.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Amplifier Disabled

#1 : 1

Amplifier Enabled

End of enumeration elements list.



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