\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :
Watchdog Timer Control Register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
WDCK : Selection of binary counter clock source
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 10 (7 bit)
access : read
WDCEN : WDT count enable
bits : 7 - 14 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
KEY_CODE : Register Key
bits : 16 - 47 (32 bit)
access : write
Watchdog Timer Error Flag Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
WDOVF : Occurrence of WDT overflow error
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 2 (2 bit)
access : read
WINERR : Occurrence of WDT window error
bits : 2 - 4 (3 bit)
access : read
CLRERR : Occurrence of WDT clear data error
bits : 3 - 6 (4 bit)
access : read
__reserve1 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
Watchdog Timer Error Flag Clear Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
WDERRC : Setting bit of WDERRC to 1 clears the corresponding bit of WDTERR.
bits : 0 - 7 (8 bit)
access : write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
KEY_CODE : Register Key
bits : 16 - 47 (32 bit)
access : write
Watchdog Timer Control Register 2
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
WDWIN : Settings of the time WDT counter can be cleared (window open period)
bits : 0 - 2 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
WDSTB : WDT count control in standby mode (SLEEP mode, DEEPSLEEP mode)
bits : 4 - 9 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 21 (16 bit)
access : read
KEY_CODE : Register Key
bits : 16 - 47 (32 bit)
access : write
Watchdog Timer Clear Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
WDCL : Writing 0xA5 clears WDT counter.
bits : 0 - 7 (8 bit)
access : write
Watchdog Timer Binary Counter
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
WDBC : Value of WDT binary counter is read out.
bits : 0 - 7 (8 bit)
access : read
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