\n
address_offset : 0x0 Bytes (0x0)
size : 0xF08 byte (0x0)
mem_usage : registers
protection :
GPWM0 Mode Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM0 High Resolutio0 Cycle Setti0g Register
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM1 Mode Register
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM1 Output Polarity Co1trol Register
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM1 Output Co1trol Register
address_offset : 0x108 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM1BC Value Read Register
address_offset : 0x10C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM1BC Status Read Register
address_offset : 0x10E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM1 High Resolutio1 Cycle Setti1g Register
address_offset : 0x110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM1 Cycle Setti1g Register
address_offset : 0x112 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM1 High Resolutio1 Phase Compariso1 Setti1g Register
address_offset : 0x114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM1 Phase Compariso1 Setti1g Register
address_offset : 0x116 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM1 High Resolutio1 Output Shift Amou1t Setti1g Register
address_offset : 0x118 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM1 Output Shift Amou1t Setti1g Register
address_offset : 0x11A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM0 Cycle Setti0g Register
address_offset : 0x12 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM1 Dead Time Co1trol Register
address_offset : 0x120 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM1 Dead Time Setti1g Register A
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM1 Dead Time Setti1g Register B
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM1 Sy1chro1ous Trigger Setti1g Register
address_offset : 0x128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM1 Sy1chro1ous Trigger Polarity Selectio1 Register
address_offset : 0x12A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM1 Sy1chro1ous Bi1ary Cou1ter Read Register
address_offset : 0x12C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM1 UDF/OVF I1terrupt Output Co1trol Register
address_offset : 0x130 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM1 A/D Start I1terrupt Output Co1trol Register
address_offset : 0x134 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM1 Pi1 Protectio1 Co1trol Register
address_offset : 0x138 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM1 Pi1 Protectio1 Factor Selectio1 Register A
address_offset : 0x13C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM1 Pi1 Protectio1 Factor Selectio1 Register B
address_offset : 0x13E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 High Resolutio0 Phase Compariso0 Setti0g Register
address_offset : 0x14 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM1 Pulse Co1trol Register
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM1 Pulse Co1trol Status Register
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM1 Duty Cut Factor Selectio1 Register A
address_offset : 0x148 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM1 Duty Cut Factor Selectio1 Register B
address_offset : 0x14A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM1 Period Cut Factor Selectio1 Register A
address_offset : 0x14C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM1 Period Cut Factor Selectio1 Register B
address_offset : 0x14E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM1 Double Buffer Updati1g E1able Register
address_offset : 0x150 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0 Phase Compariso0 Setti0g Register
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM0 High Resolutio0 Output Shift Amou0t Setti0g Register
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM0 Output Shift Amou0t Setti0g Register
address_offset : 0x1A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM0 Dead Time Co0trol Register
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM2 Mode Register
address_offset : 0x200 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM2 Output Polarity Co2trol Register
address_offset : 0x204 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM2 Output Co2trol Register
address_offset : 0x208 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM2BC Value Read Register
address_offset : 0x20C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM2BC Status Read Register
address_offset : 0x20E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM2 High Resolutio2 Cycle Setti2g Register
address_offset : 0x210 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM2 Cycle Setti2g Register
address_offset : 0x212 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM2 High Resolutio2 Phase Compariso2 Setti2g Register
address_offset : 0x214 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM2 Phase Compariso2 Setti2g Register
address_offset : 0x216 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM2 High Resolutio2 Output Shift Amou2t Setti2g Register
address_offset : 0x218 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM2 Output Shift Amou2t Setti2g Register
address_offset : 0x21A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM2 Dead Time Co2trol Register
address_offset : 0x220 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM2 Dead Time Setti2g Register A
address_offset : 0x224 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM2 Dead Time Setti2g Register B
address_offset : 0x226 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM2 Sy2chro2ous Trigger Setti2g Register
address_offset : 0x228 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM2 Sy2chro2ous Trigger Polarity Selectio2 Register
address_offset : 0x22A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM2 Sy2chro2ous Bi2ary Cou2ter Read Register
address_offset : 0x22C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM2 UDF/OVF I2terrupt Output Co2trol Register
address_offset : 0x230 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM2 A/D Start I2terrupt Output Co2trol Register
address_offset : 0x234 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM2 Pi2 Protectio2 Co2trol Register
address_offset : 0x238 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM2 Pi2 Protectio2 Factor Selectio2 Register A
address_offset : 0x23C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM2 Pi2 Protectio2 Factor Selectio2 Register B
address_offset : 0x23E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Dead Time Setti0g Register A
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM2 Pulse Co2trol Register
address_offset : 0x240 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM2 Pulse Co2trol Status Register
address_offset : 0x244 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM2 Duty Cut Factor Selectio2 Register A
address_offset : 0x248 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM2 Duty Cut Factor Selectio2 Register B
address_offset : 0x24A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM2 Period Cut Factor Selectio2 Register A
address_offset : 0x24C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM2 Period Cut Factor Selectio2 Register B
address_offset : 0x24E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM2 Double Buffer Updati2g E2able Register
address_offset : 0x250 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0 Dead Time Setti0g Register B
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Sy0chro0ous Trigger Setti0g Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM0 Sy0chro0ous Trigger Polarity Selectio0 Register
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM0 Sy0chro0ous Bi0ary Cou0ter Read Register
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM0 UDF/OVF I0terrupt Output Co0trol Register
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM3 Mode Register
address_offset : 0x300 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM3 Output Polarity Co3trol Register
address_offset : 0x304 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM3 Output Co3trol Register
address_offset : 0x308 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM3BC Value Read Register
address_offset : 0x30C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM3BC Status Read Register
address_offset : 0x30E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM3 High Resolutio3 Cycle Setti3g Register
address_offset : 0x310 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM3 Cycle Setti3g Register
address_offset : 0x312 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM3 High Resolutio3 Phase Compariso3 Setti3g Register
address_offset : 0x314 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM3 Phase Compariso3 Setti3g Register
address_offset : 0x316 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM3 High Resolutio3 Output Shift Amou3t Setti3g Register
address_offset : 0x318 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM3 Output Shift Amou3t Setti3g Register
address_offset : 0x31A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM3 Dead Time Co3trol Register
address_offset : 0x320 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM3 Dead Time Setti3g Register A
address_offset : 0x324 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM3 Dead Time Setti3g Register B
address_offset : 0x326 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM3 Sy3chro3ous Trigger Setti3g Register
address_offset : 0x328 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM3 Sy3chro3ous Trigger Polarity Selectio3 Register
address_offset : 0x32A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM3 Sy3chro3ous Bi3ary Cou3ter Read Register
address_offset : 0x32C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM3 UDF/OVF I3terrupt Output Co3trol Register
address_offset : 0x330 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM3 A/D Start I3terrupt Output Co3trol Register
address_offset : 0x334 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM3 Pi3 Protectio3 Co3trol Register
address_offset : 0x338 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM3 Pi3 Protectio3 Factor Selectio3 Register A
address_offset : 0x33C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM3 Pi3 Protectio3 Factor Selectio3 Register B
address_offset : 0x33E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 A/D Start I0terrupt Output Co0trol Register
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM3 Pulse Co3trol Register
address_offset : 0x340 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM3 Pulse Co3trol Status Register
address_offset : 0x344 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM3 Duty Cut Factor Selectio3 Register A
address_offset : 0x348 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM3 Duty Cut Factor Selectio3 Register B
address_offset : 0x34A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM3 Period Cut Factor Selectio3 Register A
address_offset : 0x34C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM3 Period Cut Factor Selectio3 Register B
address_offset : 0x34E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM3 Double Buffer Updati3g E3able Register
address_offset : 0x350 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0 Pi0 Protectio0 Co0trol Register
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM0 Pi0 Protectio0 Factor Selectio0 Register A
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM0 Pi0 Protectio0 Factor Selectio0 Register B
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Output Polarity Co0trol Register
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM0 Pulse Co0trol Register
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM4 Mode Register
address_offset : 0x400 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM4 Output Polarity Co4trol Register
address_offset : 0x404 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM4 Output Co4trol Register
address_offset : 0x408 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM4BC Value Read Register
address_offset : 0x40C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM4BC Status Read Register
address_offset : 0x40E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM4 High Resolutio4 Cycle Setti4g Register
address_offset : 0x410 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM4 Cycle Setti4g Register
address_offset : 0x412 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM4 High Resolutio4 Phase Compariso4 Setti4g Register
address_offset : 0x414 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM4 Phase Compariso4 Setti4g Register
address_offset : 0x416 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM4 High Resolutio4 Output Shift Amou4t Setti4g Register
address_offset : 0x418 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM4 Output Shift Amou4t Setti4g Register
address_offset : 0x41A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM4 Dead Time Co4trol Register
address_offset : 0x420 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM4 Dead Time Setti4g Register A
address_offset : 0x424 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM4 Dead Time Setti4g Register B
address_offset : 0x426 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM4 Sy4chro4ous Trigger Setti4g Register
address_offset : 0x428 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM4 Sy4chro4ous Trigger Polarity Selectio4 Register
address_offset : 0x42A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM4 Sy4chro4ous Bi4ary Cou4ter Read Register
address_offset : 0x42C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM4 UDF/OVF I4terrupt Output Co4trol Register
address_offset : 0x430 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM4 A/D Start I4terrupt Output Co4trol Register
address_offset : 0x434 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM4 Pi4 Protectio4 Co4trol Register
address_offset : 0x438 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM4 Pi4 Protectio4 Factor Selectio4 Register A
address_offset : 0x43C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM4 Pi4 Protectio4 Factor Selectio4 Register B
address_offset : 0x43E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Pulse Co0trol Status Register
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM4 Pulse Co4trol Register
address_offset : 0x440 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM4 Pulse Co4trol Status Register
address_offset : 0x444 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM4 Duty Cut Factor Selectio4 Register A
address_offset : 0x448 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM4 Duty Cut Factor Selectio4 Register B
address_offset : 0x44A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM4 Period Cut Factor Selectio4 Register A
address_offset : 0x44C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM4 Period Cut Factor Selectio4 Register B
address_offset : 0x44E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM4 Double Buffer Updati4g E4able Register
address_offset : 0x450 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0 Duty Cut Factor Selectio0 Register A
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM0 Duty Cut Factor Selectio0 Register B
address_offset : 0x4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Period Cut Factor Selectio0 Register A
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM0 Period Cut Factor Selectio0 Register B
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM0 Double Buffer Updati0g E0able Register
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM5 Mode Register
address_offset : 0x500 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM5 Output Polarity Co5trol Register
address_offset : 0x504 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM5 Output Co5trol Register
address_offset : 0x508 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM5BC Value Read Register
address_offset : 0x50C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM5BC Status Read Register
address_offset : 0x50E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM5 High Resolutio5 Cycle Setti5g Register
address_offset : 0x510 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM5 Cycle Setti5g Register
address_offset : 0x512 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM5 High Resolutio5 Phase Compariso5 Setti5g Register
address_offset : 0x514 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM5 Phase Compariso5 Setti5g Register
address_offset : 0x516 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM5 High Resolutio5 Output Shift Amou5t Setti5g Register
address_offset : 0x518 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM5 Output Shift Amou5t Setti5g Register
address_offset : 0x51A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM5 Dead Time Co5trol Register
address_offset : 0x520 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM5 Dead Time Setti5g Register A
address_offset : 0x524 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM5 Dead Time Setti5g Register B
address_offset : 0x526 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM5 Sy5chro5ous Trigger Setti5g Register
address_offset : 0x528 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM5 Sy5chro5ous Trigger Polarity Selectio5 Register
address_offset : 0x52A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM5 Sy5chro5ous Bi5ary Cou5ter Read Register
address_offset : 0x52C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM5 UDF/OVF I5terrupt Output Co5trol Register
address_offset : 0x530 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM5 A/D Start I5terrupt Output Co5trol Register
address_offset : 0x534 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM5 Pi5 Protectio5 Co5trol Register
address_offset : 0x538 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM5 Pi5 Protectio5 Factor Selectio5 Register A
address_offset : 0x53C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM5 Pi5 Protectio5 Factor Selectio5 Register B
address_offset : 0x53E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM5 Pulse Co5trol Register
address_offset : 0x540 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM5 Pulse Co5trol Status Register
address_offset : 0x544 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM5 Duty Cut Factor Selectio5 Register A
address_offset : 0x548 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM5 Duty Cut Factor Selectio5 Register B
address_offset : 0x54A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM5 Period Cut Factor Selectio5 Register A
address_offset : 0x54C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM5 Period Cut Factor Selectio5 Register B
address_offset : 0x54E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM5 Double Buffer Updati5g E5able Register
address_offset : 0x550 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM6 Mode Register
address_offset : 0x600 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM6 Output Polarity Co6trol Register
address_offset : 0x604 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM6 Output Co6trol Register
address_offset : 0x608 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM6BC Value Read Register
address_offset : 0x60C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM6BC Status Read Register
address_offset : 0x60E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM6 High Resolutio6 Cycle Setti6g Register
address_offset : 0x610 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM6 Cycle Setti6g Register
address_offset : 0x612 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM6 High Resolutio6 Phase Compariso6 Setti6g Register
address_offset : 0x614 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM6 Phase Compariso6 Setti6g Register
address_offset : 0x616 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM6 High Resolutio6 Output Shift Amou6t Setti6g Register
address_offset : 0x618 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM6 Output Shift Amou6t Setti6g Register
address_offset : 0x61A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM6 Dead Time Co6trol Register
address_offset : 0x620 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM6 Dead Time Setti6g Register A
address_offset : 0x624 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM6 Dead Time Setti6g Register B
address_offset : 0x626 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM6 Sy6chro6ous Trigger Setti6g Register
address_offset : 0x628 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM6 Sy6chro6ous Trigger Polarity Selectio6 Register
address_offset : 0x62A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM6 Sy6chro6ous Bi6ary Cou6ter Read Register
address_offset : 0x62C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM6 UDF/OVF I6terrupt Output Co6trol Register
address_offset : 0x630 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM6 A/D Start I6terrupt Output Co6trol Register
address_offset : 0x634 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM6 Pi6 Protectio6 Co6trol Register
address_offset : 0x638 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM6 Pi6 Protectio6 Factor Selectio6 Register A
address_offset : 0x63C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM6 Pi6 Protectio6 Factor Selectio6 Register B
address_offset : 0x63E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM6 Pulse Co6trol Register
address_offset : 0x640 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM6 Pulse Co6trol Status Register
address_offset : 0x644 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM6 Duty Cut Factor Selectio6 Register A
address_offset : 0x648 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM6 Duty Cut Factor Selectio6 Register B
address_offset : 0x64A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM6 Period Cut Factor Selectio6 Register A
address_offset : 0x64C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM6 Period Cut Factor Selectio6 Register B
address_offset : 0x64E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM6 Double Buffer Updati6g E6able Register
address_offset : 0x650 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM7 Mode Register
address_offset : 0x700 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM7 Output Polarity Co7trol Register
address_offset : 0x704 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM7 Output Co7trol Register
address_offset : 0x708 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM7BC Value Read Register
address_offset : 0x70C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM7BC Status Read Register
address_offset : 0x70E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM7 High Resolutio7 Cycle Setti7g Register
address_offset : 0x710 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM7 Cycle Setti7g Register
address_offset : 0x712 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM7 High Resolutio7 Phase Compariso7 Setti7g Register
address_offset : 0x714 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM7 Phase Compariso7 Setti7g Register
address_offset : 0x716 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM7 High Resolutio7 Output Shift Amou7t Setti7g Register
address_offset : 0x718 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM7 Output Shift Amou7t Setti7g Register
address_offset : 0x71A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM7 Dead Time Co7trol Register
address_offset : 0x720 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM7 Dead Time Setti7g Register A
address_offset : 0x724 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM7 Dead Time Setti7g Register B
address_offset : 0x726 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM7 Sy7chro7ous Trigger Setti7g Register
address_offset : 0x728 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM7 Sy7chro7ous Trigger Polarity Selectio7 Register
address_offset : 0x72A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM7 Sy7chro7ous Bi7ary Cou7ter Read Register
address_offset : 0x72C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM7 UDF/OVF I7terrupt Output Co7trol Register
address_offset : 0x730 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM7 A/D Start I7terrupt Output Co7trol Register
address_offset : 0x734 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM7 Pi7 Protectio7 Co7trol Register
address_offset : 0x738 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM7 Pi7 Protectio7 Factor Selectio7 Register A
address_offset : 0x73C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM7 Pi7 Protectio7 Factor Selectio7 Register B
address_offset : 0x73E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM7 Pulse Co7trol Register
address_offset : 0x740 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM7 Pulse Co7trol Status Register
address_offset : 0x744 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM7 Duty Cut Factor Selectio7 Register A
address_offset : 0x748 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM7 Duty Cut Factor Selectio7 Register B
address_offset : 0x74A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM7 Period Cut Factor Selectio7 Register A
address_offset : 0x74C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM7 Period Cut Factor Selectio7 Register B
address_offset : 0x74E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM7 Double Buffer Updati7g E7able Register
address_offset : 0x750 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0 Output Co0trol Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM8 Mode Register
address_offset : 0x800 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM8 Output Polarity Co8trol Register
address_offset : 0x804 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM8 Output Co8trol Register
address_offset : 0x808 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM8BC Value Read Register
address_offset : 0x80C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM8BC Status Read Register
address_offset : 0x80E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM8 High Resolutio8 Cycle Setti8g Register
address_offset : 0x810 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSETn : Set high resolution cycle
bits : 11 - 26 (16 bit)
access : read-write
GPWM8 Cycle Setti8g Register
address_offset : 0x812 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM8 High Resolutio8 Phase Compariso8 Setti8g Register
address_offset : 0x814 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRTCPn : Set phase comparison high resolution
bits : 11 - 26 (16 bit)
access : read-write
GPWM8 Phase Compariso8 Setti8g Register
address_offset : 0x816 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM8 High Resolutio8 Output Shift Amou8t Setti8g Register
address_offset : 0x818 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 10 (11 bit)
access : read
HRSTIMn : Set high resolution output shift amount
bits : 11 - 26 (16 bit)
access : read-write
GPWM8 Output Shift Amou8t Setti8g Register
address_offset : 0x81A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM8 Dead Time Co8trol Register
address_offset : 0x820 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM8 Dead Time Setti8g Register A
address_offset : 0x824 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM8 Dead Time Setti8g Register B
address_offset : 0x826 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM8 Sy8chro8ous Trigger Setti8g Register
address_offset : 0x828 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM8 Sy8chro8ous Trigger Polarity Selectio8 Register
address_offset : 0x82A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM8 Sy8chro8ous Bi8ary Cou8ter Read Register
address_offset : 0x82C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM8 UDF/OVF I8terrupt Output Co8trol Register
address_offset : 0x830 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM8 A/D Start I8terrupt Output Co8trol Register
address_offset : 0x834 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM8 Pi8 Protectio8 Co8trol Register
address_offset : 0x838 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM8 Pi8 Protectio8 Factor Selectio8 Register A
address_offset : 0x83C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM8 Pi8 Protectio8 Factor Selectio8 Register B
address_offset : 0x83E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM8 Pulse Co8trol Register
address_offset : 0x840 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM8 Pulse Co8trol Status Register
address_offset : 0x844 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM8 Duty Cut Factor Selectio8 Register A
address_offset : 0x848 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM8 Duty Cut Factor Selectio8 Register B
address_offset : 0x84A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM8 Period Cut Factor Selectio8 Register A
address_offset : 0x84C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM8 Period Cut Factor Selectio8 Register B
address_offset : 0x84E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM8 Double Buffer Updati8g E8able Register
address_offset : 0x850 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM9 Mode Register
address_offset : 0x900 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
WAVEMDn : PWM waveform mode select
bits : 0 - 0 (1 bit)
access : read-write
TCENn : PWM Operation control
bits : 1 - 2 (2 bit)
access : read-write
HRSELn : High resolution output function enable
bits : 2 - 4 (3 bit)
access : read-write
HRPRENn : High resolution cycle function enable
bits : 3 - 6 (4 bit)
access : read-write
SYNCENn : Synchronous start function (MFA) enable
bits : 4 - 8 (5 bit)
access : read-write
DUPENn : Double buffer updating enable register selection
bits : 5 - 10 (6 bit)
access : read-write
PCRBENn : Double buffer load timing enable (GPWMnBC overflow)
bits : 6 - 12 (7 bit)
access : read-write
PCRAENn : Double buffer load timing enable (GPWMnBC underflow)
bits : 7 - 14 (8 bit)
access : read-write
SDSELBn : GPWMnSEL buffer mode
bits : 8 - 16 (9 bit)
access : read-write
SDSELAn : GPWMnOUTMD buffer mode
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 20 (11 bit)
access : read
CLKSELn : Count clock selection
bits : 11 - 22 (12 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 12 - 24 (13 bit)
access : read
SFTENn : PWM output shift function enable
bits : 13 - 26 (14 bit)
access : read-write
SDIRn : Shift direction control
bits : 14 - 28 (15 bit)
access : read-write
__reserve2 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM9 Output Polarity Co9trol Register
address_offset : 0x904 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PXDTn : GPWMn output polarity
bits : 0 - 0 (1 bit)
access : read-write
PXDTNn : NGPWMn output polarity
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM9 Output Co9trol Register
address_offset : 0x908 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OTLVn : GPWMn High/Low-level output
bits : 0 - 0 (1 bit)
access : read-write
OTLVNn : NGPWMn High/Low-level output
bits : 1 - 2 (2 bit)
access : read-write
PSELn : GPWMn output sources
bits : 2 - 4 (3 bit)
access : read-write
PSELNn : NGPWMn output sources
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM9BC Value Read Register
address_offset : 0x90C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM9BC Status Read Register
address_offset : 0x90E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM9 Cycle Setti9g Register
address_offset : 0x912 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
SETn : Set the cycle to the GPWMn 16-bit counter.
bits : 0 - 15 (16 bit)
access : read-write
GPWM9 Phase Compariso9 Setti9g Register
address_offset : 0x916 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TCPn : Set the timing to change output of GPWMn.
bits : 0 - 15 (16 bit)
access : read-write
GPWM9 Output Shift Amou9t Setti9g Register
address_offset : 0x91A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STIMn : Set GPWMn output shift amount
bits : 0 - 15 (16 bit)
access : read-write
GPWM9 Dead Time Co9trol Register
address_offset : 0x920 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTENn : Dead time insertion
bits : 0 - 0 (1 bit)
access : read-write
ORMDn : GPWMn dead time insertion logic
bits : 1 - 2 (2 bit)
access : read-write
NORMDn : NGPWMn dead time insertion logic
bits : 2 - 4 (3 bit)
access : read-write
SLFCNTn : Dead time width automatic control enable
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
GPWM9 Dead Time Setti9g Register A
address_offset : 0x924 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTAn : Set dead time for GPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM9 Dead Time Setti9g Register B
address_offset : 0x926 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTSTBn : Set dead time for NGPWMn.
bits : 0 - 9 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM9 Sy9chro9ous Trigger Setti9g Register
address_offset : 0x928 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTn : Set the value of starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read-write
GPWM9 Sy9chro9ous Trigger Polarity Selectio9 Register
address_offset : 0x92A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
PASTUPn : Set the timing of synchronous trigger generation.
bits : 0 - 0 (1 bit)
access : read-write
PASTDNn : Set the timing of synchronous trigger generation.
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM9 Sy9chro9ous Bi9ary Cou9ter Read Register
address_offset : 0x92C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ADBCn : Read the binary count for starting GPWMn synchronous A/D.
bits : 0 - 15 (16 bit)
access : read
GPWM9 UDF/OVF I9terrupt Output Co9trol Register
address_offset : 0x930 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UDFCNTn : Number of times setting for GPWMn underflow interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
UDFSCNTn : Number of times setting for GPWMn underflow interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
OVFCNTn : Number of times setting for GPWMn overflow interrupt (Second time or later)
bits : 8 - 19 (12 bit)
access : read-write
OVFSCNTn : Number of times setting for GPWMn overflow interrupt (First time)
bits : 12 - 27 (16 bit)
access : read-write
GPWM9 A/D Start I9terrupt Output Co9trol Register
address_offset : 0x934 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ASTCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (Second time or later)
bits : 0 - 3 (4 bit)
access : read-write
ASTSCNTn : Number of times setting for GPWMn synchronous A/D start interrupt (First time)
bits : 4 - 11 (8 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM9 Pi9 Protectio9 Co9trol Register
address_offset : 0x938 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
OUTENn : GPWMn pin output enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 4 (4 bit)
access : read
PRT : GPWMOUTn output pin protection function
bits : 4 - 9 (6 bit)
access : read-write
PRTN : NGPWMOUTn output pin protection function
bits : 6 - 13 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
GPWM9 Pi9 Protectio9 Factor Selectio9 Register A
address_offset : 0x93C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Protection factor control by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Protection factor control by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ08ENn : Protection factor control by External Interrupt 8
bits : 2 - 4 (3 bit)
access : read-write
IRQ09ENn : Protection factor control by External Interrupt 9
bits : 3 - 6 (4 bit)
access : read-write
IRQ14ENn : Protection factor control by External Interrupt 14
bits : 4 - 8 (5 bit)
access : read-write
IRQ15ENn : Protection factor control by External Interrupt 15
bits : 5 - 10 (6 bit)
access : read-write
IRQ18ENn : Protection factor control by External Interrupt 18
bits : 6 - 12 (7 bit)
access : read-write
IRQ19ENn : Protection factor control by External Interrupt 19
bits : 7 - 14 (8 bit)
access : read-write
NMIENn : Protection factor control by NMI
bits : 8 - 16 (9 bit)
access : read-write
AD0ERRAENn : Protection factor control by A/D0 Conversion Error Detection
bits : 9 - 18 (10 bit)
access : read-write
AD0ERRBENn : Protection factor control by A/D0 Conversion Error Detection B
bits : 10 - 20 (11 bit)
access : read-write
AD1ERRAENn : Protection factor control by A/D1 Conversion Error Detection
bits : 11 - 22 (12 bit)
access : read-write
AD1ERRBENn : Protection factor control by A/D1 Conversion Error Detection B
bits : 12 - 24 (13 bit)
access : read-write
AD2ERRAENn : Protection factor control by A/D2 Conversion Error Detection
bits : 13 - 26 (14 bit)
access : read-write
AD2ERRBENn : Protection factor control by A/D2 Conversion Error Detection B
bits : 14 - 28 (15 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 15 - 30 (16 bit)
access : read
GPWM9 Pi9 Protectio9 Factor Selectio9 Register B
address_offset : 0x93E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Protection factor control by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Protection factor control by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Protection factor control by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Protection factor control by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Protection factor control by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Protection factor control by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Protection factor control by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Protection factor control by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Protection factor control by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Protection factor control by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM9 Pulse Co9trol Register
address_offset : 0x940 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTENn : Duty Cut enable
bits : 0 - 0 (1 bit)
access : read-write
DTACTSELn : Duty cut start factor polarity selection
bits : 1 - 2 (2 bit)
access : read-write
DTCTASELn : GPWMn operation selection when the duty cut
bits : 2 - 5 (4 bit)
access : read-write
DTCTBSELn : NGPWMn operation selection when the duty cut
bits : 4 - 9 (6 bit)
access : read-write
DTOVFRETn : Control of the return of duty cut by the overflow
bits : 6 - 12 (7 bit)
access : read-write
DTUDFRETn : Control of the return of duty cut by the underflow
bits : 7 - 14 (8 bit)
access : read-write
PRCTENn : Period Cut enable
bits : 8 - 16 (9 bit)
access : read-write
PRACTSELn : Period cut start factor polarity selection
bits : 9 - 18 (10 bit)
access : read-write
PRRETSELn : Period cut operation selection
bits : 10 - 20 (11 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 11 - 26 (16 bit)
access : read
GPWM9 Pulse Co9trol Status Register
address_offset : 0x944 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DTCTSTn : Duty cut state
bits : 0 - 0 (1 bit)
access : read-write
PRCTSTn : Period cut state
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 17 (16 bit)
access : read
GPWM9 Duty Cut Factor Selectio9 Register A
address_offset : 0x948 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Duty cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Duty cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Duty cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Duty cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Duty cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Duty cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Duty cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Duty cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Duty cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Duty cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Duty cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Duty cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Duty cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Duty cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Duty cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Duty cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM9 Duty Cut Factor Selectio9 Register B
address_offset : 0x94A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Duty cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Duty cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Duty cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Duty cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Duty cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Duty cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Duty cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Duty cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Duty cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Duty cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM9 Period Cut Factor Selectio9 Register A
address_offset : 0x94C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
IRQ00ENn : Period cut start factor selection by External Interrupt 0
bits : 0 - 0 (1 bit)
access : read-write
IRQ01ENn : Period cut start factor selection by External Interrupt 1
bits : 1 - 2 (2 bit)
access : read-write
IRQ02ENn : Period cut start factor selection by External Interrupt 2
bits : 2 - 4 (3 bit)
access : read-write
IRQ03ENn : Period cut start factor selection by External Interrupt 3
bits : 3 - 6 (4 bit)
access : read-write
IRQ04ENn : Period cut start factor selection by External Interrupt 4
bits : 4 - 8 (5 bit)
access : read-write
IRQ05ENn : Period cut start factor selection by External Interrupt 5
bits : 5 - 10 (6 bit)
access : read-write
IRQ06ENn : Period cut start factor selection by External Interrupt 6
bits : 6 - 12 (7 bit)
access : read-write
IRQ07ENn : Period cut start factor selection by External Interrupt 7
bits : 7 - 14 (8 bit)
access : read-write
IRQ08ENn : Period cut start factor selection by External Interrupt 8
bits : 8 - 16 (9 bit)
access : read-write
IRQ09ENn : Period cut start factor selection by External Interrupt 9
bits : 9 - 18 (10 bit)
access : read-write
IRQ10ENn : Period cut start factor selection by External Interrupt 10
bits : 10 - 20 (11 bit)
access : read-write
IRQ11ENn : Period cut start factor selection by External Interrupt 11
bits : 11 - 22 (12 bit)
access : read-write
IRQ12ENn : Period cut start factor selection by External Interrupt 12
bits : 12 - 24 (13 bit)
access : read-write
IRQ13ENn : Period cut start factor selection by External Interrupt 13
bits : 13 - 26 (14 bit)
access : read-write
IRQ14ENn : Period cut start factor selection by External Interrupt 14
bits : 14 - 28 (15 bit)
access : read-write
IRQ15ENn : Period cut start factor selection by External Interrupt 15
bits : 15 - 30 (16 bit)
access : read-write
GPWM9 Period Cut Factor Selectio9 Register B
address_offset : 0x94E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
CMP00ENn : Period cut start factor selection by Comparator 00 Detection
bits : 0 - 0 (1 bit)
access : read-write
CMP01ENn : Period cut start factor selection by Comparator 01 Detection
bits : 1 - 2 (2 bit)
access : read-write
CMP10ENn : Period cut start factor selection by Comparator 10 Detection
bits : 2 - 4 (3 bit)
access : read-write
CMP11ENn : Period cut start factor selection by Comparator 11 Detection
bits : 3 - 6 (4 bit)
access : read-write
CMP20ENn : Period cut start factor selection by Comparator 20 Detection
bits : 4 - 8 (5 bit)
access : read-write
CMP21ENn : Period cut start factor selection by Comparator 21 Detection
bits : 5 - 10 (6 bit)
access : read-write
CMP30ENn : Period cut start factor selection by Comparator 30 Detection
bits : 6 - 12 (7 bit)
access : read-write
CMP31ENn : Period cut start factor selection by Comparator 31 Detection
bits : 7 - 14 (8 bit)
access : read-write
CMP40ENn : Period cut start factor selection by Comparator 40 Detection
bits : 8 - 16 (9 bit)
access : read-write
CMP41ENn : Period cut start factor selection by Comparator 41 Detection
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read
GPWM9 Double Buffer Updati9g E9able Register
address_offset : 0x950 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUPn : Double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM0BC Value Read Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCn : Read the binary counter value of GPWMn
bits : 0 - 15 (16 bit)
access : read
GPWM0BC Status Read Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
STRn : GPWMn binary counter's counting status read
bits : 0 - 0 (1 bit)
access : read
__reserve0 : 0 is always read out.
bits : 1 - 16 (16 bit)
access : read
GPWM Double Buffer Collective Updating Enable Register
address_offset : 0xF00 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
DUP0 : GPWM0 double buffer updating enable
bits : 0 - 0 (1 bit)
access : read-write
DUP1 : GPWM1 double buffer updating enable
bits : 1 - 2 (2 bit)
access : read-write
DUP2 : GPWM2 double buffer updating enable
bits : 2 - 4 (3 bit)
access : read-write
DUP3 : GPWM3 double buffer updating enable
bits : 3 - 6 (4 bit)
access : read-write
DUP4 : GPWM4 double buffer updating enable
bits : 4 - 8 (5 bit)
access : read-write
DUP5 : GPWM5 double buffer updating enable
bits : 5 - 10 (6 bit)
access : read-write
DUP6 : GPWM6 double buffer updating enable
bits : 6 - 12 (7 bit)
access : read-write
DUP7 : GPWM7 double buffer updating enable
bits : 7 - 14 (8 bit)
access : read-write
DUP8 : GPWM8 double buffer updating enable
bits : 8 - 16 (9 bit)
access : read-write
DUP9 : GPWM9 double buffer updating enable
bits : 9 - 18 (10 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
3-Phase Output Pin Output Order Register
address_offset : 0xF04 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
TPWMPINSELA : Pin output order change
bits : 0 - 0 (1 bit)
access : read-write
TPWMPINSELB : Pin output order change
bits : 1 - 2 (2 bit)
access : read-write
TPWMPINSELC : Pin output order change
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
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