\n
address_offset : 0x0 Bytes (0x0)
size : 0x2B4 byte (0x0)
mem_usage : registers
protection :
A/D0 Co0versio0 Co0trol Register 0
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ON : A/Dn operation mode
bits : 0 - 0 (1 bit)
access : read-write
CK : ADCK select
bits : 1 - 4 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D0 Co0versio0 Start Trigger Selectio0 Register
address_offset : 0x10 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AST : Start trigger A for A/Dn conversion
bits : 0 - 4 (5 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read
BST : Start trigger B for A/Dn conversion
bits : 8 - 20 (13 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read
A/D1 Co1versio1 Co1trol Register 0
address_offset : 0x100 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ON : A/Dn operation mode
bits : 0 - 0 (1 bit)
access : read-write
CK : ADCK select
bits : 1 - 4 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D1 Co1versio1 Co1trol Register 1A
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
ATRG : A/D conversion start by using trigger A
bits : 1 - 2 (2 bit)
access : read-write
AMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
AECH : Conversion end channel setting
bits : 4 - 11 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
A/D1 Co1versio1 Co1trol Register 1B
address_offset : 0x108 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
BTRG : A/D conversion start by using trigger B
bits : 1 - 2 (2 bit)
access : read-write
BMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
BECH : Conversion end channel setting
bits : 4 - 9 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 21 (16 bit)
access : read
A/D1 Co1versio1 Start Trigger Selectio1 Register
address_offset : 0x110 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AST : Start trigger A for A/Dn conversion
bits : 0 - 4 (5 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read
BST : Start trigger B for A/Dn conversion
bits : 8 - 20 (13 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read
A/D1 Co1versio1 Start Trigger A Cou1t Register
address_offset : 0x114 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
ACNT : The number for reducing start trigger A (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
ACNTI : The number for reducing start trigger A (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D1 Co1versio1 Start Trigger B Cou1t Register
address_offset : 0x118 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
BCNT : The number for reducing start trigger B (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
BCNTI : The number for reducing start trigger B (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D1 Conversion Channel 00 Selection Register
address_offset : 0x120 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 01 Selection Register
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 02 Selection Register
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 03 Selection Register
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 04 Selection Register
address_offset : 0x128 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 05 Selection Register
address_offset : 0x12A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 06 Selection Register
address_offset : 0x12C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 07 Selection Register
address_offset : 0x12E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 08 Selection Register
address_offset : 0x130 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 09 Selection Register
address_offset : 0x132 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 10 Selection Register
address_offset : 0x134 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 11 Selection Register
address_offset : 0x136 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 12 Selection Register
address_offset : 0x138 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 13 Selection Register
address_offset : 0x13A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 14 Selection Register
address_offset : 0x13C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel 15 Selection Register
address_offset : 0x13E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Co0versio0 Start Trigger A Cou0t Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
ACNT : The number for reducing start trigger A (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
ACNTI : The number for reducing start trigger A (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D1 Conversion Channel B0 Selection Register
address_offset : 0x140 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel B1 Selection Register
address_offset : 0x142 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel B2 Selection Register
address_offset : 0x144 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Conversion Channel B3 Selection Register
address_offset : 0x146 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D1 Co1versio1 Error Detectio1 Cha11el Setti1g Register A
address_offset : 0x148 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCACH0 : Error detection setting (the channel selected by setting ANnCHSEL00).
bits : 0 - 0 (1 bit)
access : read-write
ERCACH1 : Error detection setting (the channel selected by setting ANnCHSEL01).
bits : 1 - 2 (2 bit)
access : read-write
ERCACH2 : Error detection setting (the channel selected by setting ANnCHSEL02).
bits : 2 - 4 (3 bit)
access : read-write
ERCACH3 : Error detection setting (the channel selected by setting ANnCHSEL03).
bits : 3 - 6 (4 bit)
access : read-write
ERCACH4 : Error detection setting (the channel selected by setting ANnCHSEL04).
bits : 4 - 8 (5 bit)
access : read-write
ERCACH5 : Error detection setting (the channel selected by setting ANnCHSEL05).
bits : 5 - 10 (6 bit)
access : read-write
ERCACH6 : Error detection setting (the channel selected by setting ANnCHSEL06).
bits : 6 - 12 (7 bit)
access : read-write
ERCACH7 : Error detection setting (the channel selected by setting ANnCHSEL07).
bits : 7 - 14 (8 bit)
access : read-write
ERCACH8 : Error detection setting (the channel selected by setting ANnCHSEL08).
bits : 8 - 16 (9 bit)
access : read-write
ERCACH9 : Error detection setting (the channel selected by setting ANnCHSEL09).
bits : 9 - 18 (10 bit)
access : read-write
ERCACH10 : Error detection setting (the channel selected by setting ANnCHSEL10).
bits : 10 - 20 (11 bit)
access : read-write
ERCACH11 : Error detection setting (the channel selected by setting ANnCHSEL11).
bits : 11 - 22 (12 bit)
access : read-write
ERCACH12 : Error detection setting (the channel selected by setting ANnCHSEL12).
bits : 12 - 24 (13 bit)
access : read-write
ERCACH13 : Error detection setting (the channel selected by setting ANnCHSEL13).
bits : 13 - 26 (14 bit)
access : read-write
ERCACH14 : Error detection setting (the channel selected by setting ANnCHSEL14).
bits : 14 - 28 (15 bit)
access : read-write
ERCACH15 : Error detection setting (the channel selected by setting ANnCHSEL15).
bits : 15 - 30 (16 bit)
access : read-write
A/D1 Co1versio1 Error Detectio1 Cha11el Setti1g Register B
address_offset : 0x14C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCBCH0 : Error detection setting (the channel selected by setting ANnCHSELB0).
bits : 0 - 0 (1 bit)
access : read-write
ERCBCH1 : Error detection setting (the channel selected by setting ANnCHSELB1).
bits : 1 - 2 (2 bit)
access : read-write
ERCBCH2 : Error detection setting (the channel selected by setting ANnCHSELB2).
bits : 2 - 4 (3 bit)
access : read-write
ERCBCH3 : Error detection setting (the channel selected by setting ANnCHSELB3).
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D1 Co1versio1 Error Detectio1 Lower Limit Setti1g Register A
address_offset : 0x150 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWA : Set the lower limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Co1versio1 Error Detectio1 Upper Limit Setti1g Register A
address_offset : 0x154 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPA : Set the upper limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Co1versio1 Error Detectio1 Lower Limit Setti1g Register B
address_offset : 0x158 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWB : Set the lower limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Co1versio1 Error Detectio1 Upper Limit Setti1g Register B
address_offset : 0x15C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPB : Set the upper limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 00 Register
address_offset : 0x160 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 01 Register
address_offset : 0x164 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 02 Register
address_offset : 0x168 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 03 Register
address_offset : 0x16C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 04 Register
address_offset : 0x170 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 05 Register
address_offset : 0x174 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 06 Register
address_offset : 0x178 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 07 Register
address_offset : 0x17C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Co0versio0 Start Trigger B Cou0t Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
BCNT : The number for reducing start trigger B (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
BCNTI : The number for reducing start trigger B (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D1 Conversion Data Buffer 08 Register
address_offset : 0x180 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 09 Register
address_offset : 0x184 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 10 Register
address_offset : 0x188 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 11 Register
address_offset : 0x18C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 12 Register
address_offset : 0x190 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 13 Register
address_offset : 0x194 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 14 Register
address_offset : 0x198 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer 15 Register
address_offset : 0x19C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC1CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer B0 Register
address_offset : 0x1A0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC1CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer B1 Register
address_offset : 0x1A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC1CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer B2 Register
address_offset : 0x1A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC1CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Conversion Data Buffer B3 Register
address_offset : 0x1AC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC1CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D1 Fault Check Co1trol Register
address_offset : 0x1B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
CHKEN : Fault diagnosis function select
bits : 0 - 0 (1 bit)
access : read-write
CHKSEL : Conversion Potential select
bits : 1 - 3 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 10 (8 bit)
access : read
A/D0 Conversion Channel 00 Selection Register
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Co2versio2 Co2trol Register 0
address_offset : 0x200 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ON : A/Dn operation mode
bits : 0 - 0 (1 bit)
access : read-write
CK : ADCK select
bits : 1 - 4 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D2 Co2versio2 Co2trol Register 1A
address_offset : 0x204 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
ATRG : A/D conversion start by using trigger A
bits : 1 - 2 (2 bit)
access : read-write
AMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
AECH : Conversion end channel setting
bits : 4 - 11 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
A/D2 Co2versio2 Co2trol Register 1B
address_offset : 0x208 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
BTRG : A/D conversion start by using trigger B
bits : 1 - 2 (2 bit)
access : read-write
BMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
BECH : Conversion end channel setting
bits : 4 - 9 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 21 (16 bit)
access : read
A/D2 Co2versio2 Start Trigger Selectio2 Register
address_offset : 0x210 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AST : Start trigger A for A/Dn conversion
bits : 0 - 4 (5 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read
BST : Start trigger B for A/Dn conversion
bits : 8 - 20 (13 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read
A/D2 Co2versio2 Start Trigger A Cou2t Register
address_offset : 0x214 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
ACNT : The number for reducing start trigger A (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
ACNTI : The number for reducing start trigger A (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D2 Co2versio2 Start Trigger B Cou2t Register
address_offset : 0x218 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
BCNT : The number for reducing start trigger B (at the second or later A/D conversion)
bits : 0 - 3 (4 bit)
access : read-write
BCNTI : The number for reducing start trigger B (at the first A/D conversion)
bits : 4 - 11 (8 bit)
access : read-write
A/D0 Conversion Channel 01 Selection Register
address_offset : 0x22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 00 Selection Register
address_offset : 0x220 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 01 Selection Register
address_offset : 0x222 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 02 Selection Register
address_offset : 0x224 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 03 Selection Register
address_offset : 0x226 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 04 Selection Register
address_offset : 0x228 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 05 Selection Register
address_offset : 0x22A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 06 Selection Register
address_offset : 0x22C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 07 Selection Register
address_offset : 0x22E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 08 Selection Register
address_offset : 0x230 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 09 Selection Register
address_offset : 0x232 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 10 Selection Register
address_offset : 0x234 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 11 Selection Register
address_offset : 0x236 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 12 Selection Register
address_offset : 0x238 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 13 Selection Register
address_offset : 0x23A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 14 Selection Register
address_offset : 0x23C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel 15 Selection Register
address_offset : 0x23E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 02 Selection Register
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel B0 Selection Register
address_offset : 0x240 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel B1 Selection Register
address_offset : 0x242 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel B2 Selection Register
address_offset : 0x244 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Channel B3 Selection Register
address_offset : 0x246 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Co2versio2 Error Detectio2 Cha22el Setti2g Register A
address_offset : 0x248 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCACH0 : Error detection setting (the channel selected by setting ANnCHSEL00).
bits : 0 - 0 (1 bit)
access : read-write
ERCACH1 : Error detection setting (the channel selected by setting ANnCHSEL01).
bits : 1 - 2 (2 bit)
access : read-write
ERCACH2 : Error detection setting (the channel selected by setting ANnCHSEL02).
bits : 2 - 4 (3 bit)
access : read-write
ERCACH3 : Error detection setting (the channel selected by setting ANnCHSEL03).
bits : 3 - 6 (4 bit)
access : read-write
ERCACH4 : Error detection setting (the channel selected by setting ANnCHSEL04).
bits : 4 - 8 (5 bit)
access : read-write
ERCACH5 : Error detection setting (the channel selected by setting ANnCHSEL05).
bits : 5 - 10 (6 bit)
access : read-write
ERCACH6 : Error detection setting (the channel selected by setting ANnCHSEL06).
bits : 6 - 12 (7 bit)
access : read-write
ERCACH7 : Error detection setting (the channel selected by setting ANnCHSEL07).
bits : 7 - 14 (8 bit)
access : read-write
ERCACH8 : Error detection setting (the channel selected by setting ANnCHSEL08).
bits : 8 - 16 (9 bit)
access : read-write
ERCACH9 : Error detection setting (the channel selected by setting ANnCHSEL09).
bits : 9 - 18 (10 bit)
access : read-write
ERCACH10 : Error detection setting (the channel selected by setting ANnCHSEL10).
bits : 10 - 20 (11 bit)
access : read-write
ERCACH11 : Error detection setting (the channel selected by setting ANnCHSEL11).
bits : 11 - 22 (12 bit)
access : read-write
ERCACH12 : Error detection setting (the channel selected by setting ANnCHSEL12).
bits : 12 - 24 (13 bit)
access : read-write
ERCACH13 : Error detection setting (the channel selected by setting ANnCHSEL13).
bits : 13 - 26 (14 bit)
access : read-write
ERCACH14 : Error detection setting (the channel selected by setting ANnCHSEL14).
bits : 14 - 28 (15 bit)
access : read-write
ERCACH15 : Error detection setting (the channel selected by setting ANnCHSEL15).
bits : 15 - 30 (16 bit)
access : read-write
A/D2 Co2versio2 Error Detectio2 Cha22el Setti2g Register B
address_offset : 0x24C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCBCH0 : Error detection setting (the channel selected by setting ANnCHSELB0).
bits : 0 - 0 (1 bit)
access : read-write
ERCBCH1 : Error detection setting (the channel selected by setting ANnCHSELB1).
bits : 1 - 2 (2 bit)
access : read-write
ERCBCH2 : Error detection setting (the channel selected by setting ANnCHSELB2).
bits : 2 - 4 (3 bit)
access : read-write
ERCBCH3 : Error detection setting (the channel selected by setting ANnCHSELB3).
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D2 Co2versio2 Error Detectio2 Lower Limit Setti2g Register A
address_offset : 0x250 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWA : Set the lower limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Co2versio2 Error Detectio2 Upper Limit Setti2g Register A
address_offset : 0x254 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPA : Set the upper limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Co2versio2 Error Detectio2 Lower Limit Setti2g Register B
address_offset : 0x258 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWB : Set the lower limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Co2versio2 Error Detectio2 Upper Limit Setti2g Register B
address_offset : 0x25C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPB : Set the upper limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Channel 03 Selection Register
address_offset : 0x26 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Data Buffer 00 Register
address_offset : 0x260 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 01 Register
address_offset : 0x264 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 02 Register
address_offset : 0x268 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 03 Register
address_offset : 0x26C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 04 Register
address_offset : 0x270 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 05 Register
address_offset : 0x274 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 06 Register
address_offset : 0x278 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 07 Register
address_offset : 0x27C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Channel 04 Selection Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Data Buffer 08 Register
address_offset : 0x280 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 09 Register
address_offset : 0x284 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 10 Register
address_offset : 0x288 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 11 Register
address_offset : 0x28C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 12 Register
address_offset : 0x290 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 13 Register
address_offset : 0x294 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 14 Register
address_offset : 0x298 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer 15 Register
address_offset : 0x29C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC2CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Channel 05 Selection Register
address_offset : 0x2A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D2 Conversion Data Buffer B0 Register
address_offset : 0x2A0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC2CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer B1 Register
address_offset : 0x2A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC2CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer B2 Register
address_offset : 0x2A8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC2CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Conversion Data Buffer B3 Register
address_offset : 0x2AC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC2CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D2 Fault Check Co2trol Register
address_offset : 0x2B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
CHKEN : Fault diagnosis function select
bits : 0 - 0 (1 bit)
access : read-write
CHKSEL : Conversion Potential select
bits : 1 - 3 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 10 (8 bit)
access : read
A/D0 Conversion Channel 06 Selection Register
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 07 Selection Register
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 08 Selection Register
address_offset : 0x30 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 09 Selection Register
address_offset : 0x32 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 10 Selection Register
address_offset : 0x34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 11 Selection Register
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 12 Selection Register
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 13 Selection Register
address_offset : 0x3A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 14 Selection Register
address_offset : 0x3C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel 15 Selection Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ACHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
ASHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Co0versio0 Co0trol Register 1A
address_offset : 0x4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
AEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
ATRG : A/D conversion start by using trigger A
bits : 1 - 2 (2 bit)
access : read-write
AMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
AECH : Conversion end channel setting
bits : 4 - 11 (8 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 8 - 23 (16 bit)
access : read
A/D0 Conversion Channel B0 Selection Register
address_offset : 0x40 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel B1 Selection Register
address_offset : 0x42 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel B2 Selection Register
address_offset : 0x44 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Conversion Channel B3 Selection Register
address_offset : 0x46 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BCHSEL : Conversion channel select
bits : 0 - 3 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
BSHC : Sampling/Hold cycles
bits : 8 - 21 (14 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 14 - 29 (16 bit)
access : read
A/D0 Co0versio0 Error Detectio0 Cha00el Setti0g Register A
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCACH0 : Error detection setting (the channel selected by setting ANnCHSEL00).
bits : 0 - 0 (1 bit)
access : read-write
ERCACH1 : Error detection setting (the channel selected by setting ANnCHSEL01).
bits : 1 - 2 (2 bit)
access : read-write
ERCACH2 : Error detection setting (the channel selected by setting ANnCHSEL02).
bits : 2 - 4 (3 bit)
access : read-write
ERCACH3 : Error detection setting (the channel selected by setting ANnCHSEL03).
bits : 3 - 6 (4 bit)
access : read-write
ERCACH4 : Error detection setting (the channel selected by setting ANnCHSEL04).
bits : 4 - 8 (5 bit)
access : read-write
ERCACH5 : Error detection setting (the channel selected by setting ANnCHSEL05).
bits : 5 - 10 (6 bit)
access : read-write
ERCACH6 : Error detection setting (the channel selected by setting ANnCHSEL06).
bits : 6 - 12 (7 bit)
access : read-write
ERCACH7 : Error detection setting (the channel selected by setting ANnCHSEL07).
bits : 7 - 14 (8 bit)
access : read-write
ERCACH8 : Error detection setting (the channel selected by setting ANnCHSEL08).
bits : 8 - 16 (9 bit)
access : read-write
ERCACH9 : Error detection setting (the channel selected by setting ANnCHSEL09).
bits : 9 - 18 (10 bit)
access : read-write
ERCACH10 : Error detection setting (the channel selected by setting ANnCHSEL10).
bits : 10 - 20 (11 bit)
access : read-write
ERCACH11 : Error detection setting (the channel selected by setting ANnCHSEL11).
bits : 11 - 22 (12 bit)
access : read-write
ERCACH12 : Error detection setting (the channel selected by setting ANnCHSEL12).
bits : 12 - 24 (13 bit)
access : read-write
ERCACH13 : Error detection setting (the channel selected by setting ANnCHSEL13).
bits : 13 - 26 (14 bit)
access : read-write
ERCACH14 : Error detection setting (the channel selected by setting ANnCHSEL14).
bits : 14 - 28 (15 bit)
access : read-write
ERCACH15 : Error detection setting (the channel selected by setting ANnCHSEL15).
bits : 15 - 30 (16 bit)
access : read-write
A/D0 Co0versio0 Error Detectio0 Cha00el Setti0g Register B
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
ERCBCH0 : Error detection setting (the channel selected by setting ANnCHSELB0).
bits : 0 - 0 (1 bit)
access : read-write
ERCBCH1 : Error detection setting (the channel selected by setting ANnCHSELB1).
bits : 1 - 2 (2 bit)
access : read-write
ERCBCH2 : Error detection setting (the channel selected by setting ANnCHSELB2).
bits : 2 - 4 (3 bit)
access : read-write
ERCBCH3 : Error detection setting (the channel selected by setting ANnCHSELB3).
bits : 3 - 6 (4 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 4 - 19 (16 bit)
access : read
A/D0 Co0versio0 Error Detectio0 Lower Limit Setti0g Register A
address_offset : 0x50 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWA : Set the lower limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Co0versio0 Error Detectio0 Upper Limit Setti0g Register A
address_offset : 0x54 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPA : Set the upper limit of A/Dn conversion result (trigger A)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Co0versio0 Error Detectio0 Lower Limit Setti0g Register B
address_offset : 0x58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
LOWB : Set the lower limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Co0versio0 Error Detectio0 Upper Limit Setti0g Register B
address_offset : 0x5C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
UPB : Set the upper limit of A/Dn conversion result (trigger B)
bits : 0 - 11 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 00 Register
address_offset : 0x60 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 01 Register
address_offset : 0x64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 02 Register
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 03 Register
address_offset : 0x6C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 04 Register
address_offset : 0x70 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 05 Register
address_offset : 0x74 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 06 Register
address_offset : 0x78 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 07 Register
address_offset : 0x7C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Co0versio0 Co0trol Register 1B
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BEN : A/D conversion start
bits : 0 - 0 (1 bit)
access : read-write
BTRG : A/D conversion start by using trigger B
bits : 1 - 2 (2 bit)
access : read-write
BMD : A/D conversion mode select
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
BECH : Conversion end channel setting
bits : 4 - 9 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 21 (16 bit)
access : read
A/D0 Conversion Data Buffer 08 Register
address_offset : 0x80 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 09 Register
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 10 Register
address_offset : 0x88 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 11 Register
address_offset : 0x8C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 12 Register
address_offset : 0x90 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 13 Register
address_offset : 0x94 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 14 Register
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer 15 Register
address_offset : 0x9C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUF : A/D conversion results of the channel selected by setting ADC0CHSELm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer B0 Register
address_offset : 0xA0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC0CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer B1 Register
address_offset : 0xA4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC0CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer B2 Register
address_offset : 0xA8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC0CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Conversion Data Buffer B3 Register
address_offset : 0xAC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
BUFB : A/D conversion results of the channel selected by setting ADC0CHSELBm.
bits : 0 - 11 (12 bit)
access : read
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
A/D0 Fault Check Co0trol Register
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
CHKEN : Fault diagnosis function select
bits : 0 - 0 (1 bit)
access : read-write
CHKSEL : Conversion Potential select
bits : 1 - 3 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 10 (8 bit)
access : read
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