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CRC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x74 byte (0x0)
mem_usage : registers
protection :

Registers

CRC0DATA_MSB

CRC0CLR

CRC1DATA_MSB

CRC1DATA_LSB

CRC1RES_MSB

CRC1RES_LSB

CRC1CLR

CRC0DATA_LSB

CRC2DATA_MSB

CRC2DATA_LSB

CRC2RES_MSB

CRC2RES_LSB

CRC2CLR

CRC3DATA_MSB

CRC3DATA_LSB

CRC3RES_MSB

CRC3RES_LSB

CRC3CLR

CRC0RES_MSB

CRC0RES_LSB


CRC0DATA_MSB

CRC0 Data Register MSB 1st
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

CRC0DATA_MSB CRC0DATA_MSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_MSB

DATA_MSB : Data written to this register will be taken to perform CRC calculation with Most Significant Bit (MSB) First.
bits : 0 - 31 (32 bit)
access : write


CRC0CLR

CRC0 Clear Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC0CLR CRC0CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CLR __reserve0

CLR : Set CRC0 seed value.
bits : 0 - 0 (1 bit)
access : write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


CRC1DATA_MSB

CRC1 Data Register MSB 1st
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC1DATA_MSB CRC1DATA_MSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_MSB

DATA_MSB : Data written to this register will be taken to perform CRC calculation with Most Significant Bit (MSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC1DATA_LSB

CRC1 Data Register LSB 1st
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC1DATA_LSB CRC1DATA_LSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_LSB

DATA_LSB : Data written to this register will be taken to perform CRC calculation with Least Significant Bit (LSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC1RES_MSB

CRC1 Checksum Register MSB 1st
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

CRC1RES_MSB CRC1RES_MSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_MSB

RES_MSB : A write access to this register will load CRC1 seed value to CRC1RES_MSB register.
bits : 0 - 15 (16 bit)
access : read-write


CRC1RES_LSB

CRC1 Checksum Register LSB 1st
address_offset : 0x2C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

CRC1RES_LSB CRC1RES_LSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_LSB

RES_LSB : A read access to this register read out CRC1 checksum value with LSB First.
bits : 0 - 15 (16 bit)
access : read


CRC1CLR

CRC1 Clear Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC1CLR CRC1CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CLR __reserve0

CLR : Set CRC1 seed value.
bits : 0 - 0 (1 bit)
access : write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


CRC0DATA_LSB

CRC0 Data Register LSB 1st
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

CRC0DATA_LSB CRC0DATA_LSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA_LSB

DATA_LSB : Data written to this register will be taken to perform CRC calculation with Least Significant Bit (LSB) First.
bits : 0 - 31 (32 bit)
access : write


CRC2DATA_MSB

CRC2 Data Register MSB 1st
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC2DATA_MSB CRC2DATA_MSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_MSB

DATA_MSB : Data written to this register will be taken to perform CRC calculation with Most Significant Bit (MSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC2DATA_LSB

CRC2 Data Register LSB 1st
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC2DATA_LSB CRC2DATA_LSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_LSB

DATA_LSB : Data written to this register will be taken to perform CRC calculation with Least Significant Bit (LSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC2RES_MSB

CRC2 Checksum Register MSB 1st
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

CRC2RES_MSB CRC2RES_MSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_MSB

RES_MSB : A write access to this register will load CRC2 seed value to CRC1RES_MSB register.
bits : 0 - 15 (16 bit)
access : read-write


CRC2RES_LSB

CRC2 Checksum Register LSB 1st
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

CRC2RES_LSB CRC2RES_LSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_LSB

RES_LSB : A read access to this register read out CRC2 checksum value with LSB First.
bits : 0 - 15 (16 bit)
access : read


CRC2CLR

CRC2 Clear Register
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC2CLR CRC2CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CLR __reserve0

CLR : Set CRC2 seed value.
bits : 0 - 0 (1 bit)
access : write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


CRC3DATA_MSB

CRC3Data Register MSB 1st
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC3DATA_MSB CRC3DATA_MSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_MSB

DATA_MSB : Data written to this register will be taken to perform CRC calculation with Most Significant Bit (MSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC3DATA_LSB

CRC3 Data Register LSB 1st
address_offset : 0x64 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC3DATA_LSB CRC3DATA_LSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATA_LSB

DATA_LSB : Data written to this register will be taken to perform CRC calculation with Least Significant Bit (LSB) First.
bits : 0 - 7 (8 bit)
access : write


CRC3RES_MSB

CRC3 Checksum Register MSB 1st
address_offset : 0x68 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC3RES_MSB CRC3RES_MSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RES_MSB

RES_MSB : A write access to this register will load CRC3 seed value to CRC1RES_MSB register.
bits : 0 - 7 (8 bit)
access : read-write


CRC3RES_LSB

CRC3 Checksum Register LSB 1st
address_offset : 0x6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC3RES_LSB CRC3RES_LSB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RES_LSB

RES_LSB : A read access to this register read out CRC3 checksum value with LSB First.
bits : 0 - 7 (8 bit)
access : read


CRC3CLR

CRC3 Clear Register
address_offset : 0x70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

CRC3CLR CRC3CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 CLR __reserve0

CLR : Set CRC3 seed value.
bits : 0 - 0 (1 bit)
access : write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


CRC0RES_MSB

CRC0 Checksum Register MSB 1st
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

CRC0RES_MSB CRC0RES_MSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_MSB

RES_MSB : A write access to this register will load CRC0 seed value to CRC0RES_MSB register.
bits : 0 - 31 (32 bit)
access : read-write


CRC0RES_LSB

CRC0 Checksum Register LSB 1st
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

CRC0RES_LSB CRC0RES_LSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RES_LSB

RES_LSB : A read access to this register read out CRC0 checksum value with LSB First.
bits : 0 - 31 (32 bit)
access : read



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