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DAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x108 byte (0x0)
mem_usage : registers
protection :

Registers

DAC00CTR

DAC01CTR

DACP1CTR

DACP1DR

DAC01DR

DAC01SLPCNT

DAC01SLPSET

DAC01SLPCYC

DAC10CTR

DAC10DR

DAC10SLPCNT

DAC10SLPSET

DAC10SLPCYC

DAC11CTR

DAC11DR

DAC11SLPCNT

DAC11SLPSET

DAC11SLPCYC

DAC00DR

DAC20CTR

DAC20DR

DAC20SLPCNT

DAC20SLPSET

DAC20SLPCYC

DAC21CTR

DAC21DR

DAC21SLPCNT

DAC21SLPSET

DAC21SLPCYC

DAC30CTR

DAC30DR

DAC30SLPCNT

DAC30SLPSET

DAC30SLPCYC

DAC31CTR

DAC31DR

DAC31SLPCNT

DAC31SLPSET

DAC31SLPCYC

DAC00SLPCNT

DAC40CTR

DAC40DR

DAC40SLPCNT

DAC40SLPSET

DAC40SLPCYC

DAC41CTR

DAC41DR

DAC41SLPCNT

DAC41SLPSET

DAC41SLPCYC

DACV00CTR

DACV00DR

DACV01CTR

DACV01DR

DAC00SLPSET

DACV02CTR

DACV02DR

DACV1CTR

DACV1DR

DAC00SLPCYC

DACV2CTR

DACV2DR

DACP0CTR

DACP0DR


DAC00CTR

DAC00 Co00trol Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC00CTR DAC00CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC01CTR

DAC01 Co01trol Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC01CTR DAC01CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACP1CTR

DACP1 Co1trol Register
address_offset : 0x100 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACP1CTR DACP1CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON OE __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

OE : Output control to DAOTn pin
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read


DACP1DR

DACP1 I1put Data Register
address_offset : 0x104 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DACP1DR DACP1DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF __reserve0

BUF : Set the input data which performs D/A conversion by DACPn.
bits : 0 - 9 (10 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read


DAC01DR

DAC01 I01put Data Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC01DR DAC01DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC01SLPCNT

DAC01 Slope Compe01satio01 Co01trol Register
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC01SLPCNT DAC01SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC01SLPSET

DAC01 Slope Compe01satio01 Setti01g Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC01SLPSET DAC01SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC01SLPCYC

DAC01 Slope Compe01satio01 Cycle Register
address_offset : 0x1E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC01SLPCYC DAC01SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC10CTR

DAC10 Co10trol Register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC10CTR DAC10CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC10DR

DAC10 I10put Data Register
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC10DR DAC10DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC10SLPCNT

DAC10 Slope Compe10satio10 Co10trol Register
address_offset : 0x28 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC10SLPCNT DAC10SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC10SLPSET

DAC10 Slope Compe10satio10 Setti10g Register
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC10SLPSET DAC10SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC10SLPCYC

DAC10 Slope Compe10satio10 Cycle Register
address_offset : 0x2E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC10SLPCYC DAC10SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC11CTR

DAC11 Co11trol Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC11CTR DAC11CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC11DR

DAC11 I11put Data Register
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC11DR DAC11DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC11SLPCNT

DAC11 Slope Compe11satio11 Co11trol Register
address_offset : 0x38 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC11SLPCNT DAC11SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC11SLPSET

DAC11 Slope Compe11satio11 Setti11g Register
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC11SLPSET DAC11SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC11SLPCYC

DAC11 Slope Compe11satio11 Cycle Register
address_offset : 0x3E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC11SLPCYC DAC11SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC00DR

DAC00 I00put Data Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC00DR DAC00DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC20CTR

DAC20 Co20trol Register
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC20CTR DAC20CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC20DR

DAC20 I20put Data Register
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC20DR DAC20DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC20SLPCNT

DAC20 Slope Compe20satio20 Co20trol Register
address_offset : 0x48 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC20SLPCNT DAC20SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC20SLPSET

DAC20 Slope Compe20satio20 Setti20g Register
address_offset : 0x4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC20SLPSET DAC20SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC20SLPCYC

DAC20 Slope Compe20satio20 Cycle Register
address_offset : 0x4E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC20SLPCYC DAC20SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC21CTR

DAC21 Co21trol Register
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC21CTR DAC21CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC21DR

DAC21 I21put Data Register
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC21DR DAC21DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC21SLPCNT

DAC21 Slope Compe21satio21 Co21trol Register
address_offset : 0x58 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC21SLPCNT DAC21SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC21SLPSET

DAC21 Slope Compe21satio21 Setti21g Register
address_offset : 0x5C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC21SLPSET DAC21SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC21SLPCYC

DAC21 Slope Compe21satio21 Cycle Register
address_offset : 0x5E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC21SLPCYC DAC21SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC30CTR

DAC30 Co30trol Register
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC30CTR DAC30CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC30DR

DAC30 I30put Data Register
address_offset : 0x64 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC30DR DAC30DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC30SLPCNT

DAC30 Slope Compe30satio30 Co30trol Register
address_offset : 0x68 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC30SLPCNT DAC30SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC30SLPSET

DAC30 Slope Compe30satio30 Setti30g Register
address_offset : 0x6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC30SLPSET DAC30SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC30SLPCYC

DAC30 Slope Compe30satio30 Cycle Register
address_offset : 0x6E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC30SLPCYC DAC30SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC31CTR

DAC31 Co31trol Register
address_offset : 0x70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC31CTR DAC31CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC31DR

DAC31 I31put Data Register
address_offset : 0x74 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC31DR DAC31DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC31SLPCNT

DAC31 Slope Compe31satio31 Co31trol Register
address_offset : 0x78 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC31SLPCNT DAC31SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC31SLPSET

DAC31 Slope Compe31satio31 Setti31g Register
address_offset : 0x7C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC31SLPSET DAC31SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC31SLPCYC

DAC31 Slope Compe31satio31 Cycle Register
address_offset : 0x7E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC31SLPCYC DAC31SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC00SLPCNT

DAC00 Slope Compe00satio00 Co00trol Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC00SLPCNT DAC00SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC40CTR

DAC40 Co40trol Register
address_offset : 0x80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC40CTR DAC40CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC40DR

DAC40 I40put Data Register
address_offset : 0x84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC40DR DAC40DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC40SLPCNT

DAC40 Slope Compe40satio40 Co40trol Register
address_offset : 0x88 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC40SLPCNT DAC40SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC40SLPSET

DAC40 Slope Compe40satio40 Setti40g Register
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC40SLPSET DAC40SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC40SLPCYC

DAC40 Slope Compe40satio40 Cycle Register
address_offset : 0x8E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC40SLPCYC DAC40SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DAC41CTR

DAC41 Co41trol Register
address_offset : 0x90 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC41CTR DAC41CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DAC41DR

DAC41 I41put Data Register
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC41DR DAC41DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC41SLPCNT

DAC41 Slope Compe41satio41 Co41trol Register
address_offset : 0x98 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC41SLPCNT DAC41SLPCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLPEN EDGESEL __reserve0 TGTSEL __reserve1

SLPEN : D/An slope compensation enable
bits : 0 - 0 (1 bit)
access : read-write

EDGESEL : Slope compensation pin edge select
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read

TGTSEL : Slope compensation pin selection
bits : 8 - 20 (13 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 13 - 28 (16 bit)
access : read


DAC41SLPSET

DAC41 Slope Compe41satio41 Setti41g Register
address_offset : 0x9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC41SLPSET DAC41SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DAC41SLPCYC

DAC41 Slope Compe41satio41 Cycle Register
address_offset : 0x9E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC41SLPCYC DAC41SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DACV00CTR

DACV00 CoV00trol Register
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV00CTR DACV00CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACV00DR

DACV00 IV00put Data Register
address_offset : 0xA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV00DR DACV00DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DACV01CTR

DACV01 CoV01trol Register
address_offset : 0xB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV01CTR DACV01CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACV01DR

DACV01 IV01put Data Register
address_offset : 0xB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV01DR DACV01DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC00SLPSET

DAC00 Slope Compe00satio00 Setti00g Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DAC00SLPSET DAC00SLPSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLPSET __reserve0

SLPSET : Set of slope compensation subtraction value.
bits : 0 - 4 (5 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 5 - 12 (8 bit)
access : read


DACV02CTR

DACV02 CoV02trol Register
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV02CTR DACV02CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACV02DR

DACV02 IV02put Data Register
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV02DR DACV02DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DACV1CTR

DACV1 CoV1trol Register
address_offset : 0xD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV1CTR DACV1CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACV1DR

DACV1 IV1put Data Register
address_offset : 0xD4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV1DR DACV1DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DAC00SLPCYC

DAC00 Slope Compe00satio00 Cycle Register
address_offset : 0xE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DAC00SLPCYC DAC00SLPCYC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCLE OFFSET

CYCLE : Set slope compensation subtraction cycle.
bits : 0 - 7 (8 bit)
access : read-write

OFFSET : Set slope compensation subtraction start offset value.
bits : 8 - 23 (16 bit)
access : read-write


DACV2CTR

DACV2 CoV2trol Register
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV2CTR DACV2CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


DACV2DR

DACV2 IV2put Data Register
address_offset : 0xE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACV2DR DACV2DR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 BUF

BUF : Set the input data which performs D/A conversion by DACn.
bits : 0 - 7 (8 bit)
access : read-write


DACP0CTR

DACP0 Co0trol Register
address_offset : 0xF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

DACP0CTR DACP0CTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ON OE __reserve0

ON : Operation control of D/A converter
bits : 0 - 0 (1 bit)
access : read-write

OE : Output control to DAOTn pin
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read


DACP0DR

DACP0 I0put Data Register
address_offset : 0xF4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0

DACP0DR DACP0DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF __reserve0

BUF : Set the input data which performs D/A conversion by DACPn.
bits : 0 - 9 (10 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 10 - 25 (16 bit)
access : read



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