\n
address_offset : 0x0 Bytes (0x0)
size : 0xE9 byte (0x0)
mem_usage : registers
protection :
Port 0 Output Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00OUT : Set output data of P00
bits : 0 - 0 (1 bit)
access : read-write
P01OUT : Set output data of P01
bits : 1 - 2 (2 bit)
access : read-write
P02OUT : Set output data of P02
bits : 2 - 4 (3 bit)
access : read-write
P03OUT : Set output data of P03
bits : 3 - 6 (4 bit)
access : read-write
P04OUT : Set output data of P04
bits : 4 - 8 (5 bit)
access : read-write
P05OUT : Set output data of P05
bits : 5 - 10 (6 bit)
access : read-write
P06OUT : Set output data of P06
bits : 6 - 12 (7 bit)
access : read-write
P07OUT : Set output data of P07
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Output Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10OUT : Set output data of P10
bits : 0 - 0 (1 bit)
access : read-write
P11OUT : Set output data of P11
bits : 1 - 2 (2 bit)
access : read-write
P12OUT : Set output data of P12
bits : 2 - 4 (3 bit)
access : read-write
P13OUT : Set output data of P13
bits : 3 - 6 (4 bit)
access : read-write
P14OUT : Set output data of P14
bits : 4 - 8 (5 bit)
access : read-write
P15OUT : Set output data of P15
bits : 5 - 10 (6 bit)
access : read-write
P16OUT : Set output data of P16
bits : 6 - 12 (7 bit)
access : read-write
P17OUT : Set output data of P17
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Output Clear Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00CLR : Clear P00OUT
bits : 0 - 0 (1 bit)
access : write
P01CLR : Clear P01OUT
bits : 1 - 2 (2 bit)
access : write
P02CLR : Clear P02OUT
bits : 2 - 4 (3 bit)
access : write
P03CLR : Clear P03OUT
bits : 3 - 6 (4 bit)
access : write
P04CLR : Clear P04OUT
bits : 4 - 8 (5 bit)
access : write
P05CLR : Clear P05OUT
bits : 5 - 10 (6 bit)
access : write
P06CLR : Clear P06OUT
bits : 6 - 12 (7 bit)
access : write
P07CLR : Clear P07OUT
bits : 7 - 14 (8 bit)
access : write
Port 1 Output Clear Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10CLR : Clear P10OUT
bits : 0 - 0 (1 bit)
access : write
P11CLR : Clear P11OUT
bits : 1 - 2 (2 bit)
access : write
P12CLR : Clear P12OUT
bits : 2 - 4 (3 bit)
access : write
P13CLR : Clear P13OUT
bits : 3 - 6 (4 bit)
access : write
P14CLR : Clear P14OUT
bits : 4 - 8 (5 bit)
access : write
P15CLR : Clear P15OUT
bits : 5 - 10 (6 bit)
access : write
P16CLR : Clear P16OUT
bits : 6 - 12 (7 bit)
access : write
P17CLR : Clear P17OUT
bits : 7 - 14 (8 bit)
access : write
Port 2 Output Clear Register
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20CLR : Clear P20OUT
bits : 0 - 0 (1 bit)
access : write
P21CLR : Clear P21OUT
bits : 1 - 2 (2 bit)
access : write
P22CLR : Clear P22OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24CLR : Clear P24OUT
bits : 4 - 8 (5 bit)
access : write
P25CLR : Clear P25OUT
bits : 5 - 10 (6 bit)
access : write
P26CLR : Clear P26OUT
bits : 6 - 12 (7 bit)
access : write
P27CLR : Clear P27OUT
bits : 7 - 14 (8 bit)
access : write
Port 3 Output Clear Register
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30CLR : Clear P30OUT
bits : 0 - 0 (1 bit)
access : write
P31CLR : Clear P31OUT
bits : 1 - 2 (2 bit)
access : write
P32CLR : Clear P32OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34CLR : Clear P34OUT
bits : 4 - 8 (5 bit)
access : write
P35CLR : Clear P35OUT
bits : 5 - 10 (6 bit)
access : write
P36CLR : Clear P36OUT
bits : 6 - 12 (7 bit)
access : write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Output Clear Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40CLR : Clear P40OUT
bits : 0 - 0 (1 bit)
access : write
P41CLR : Clear P41OUT
bits : 1 - 2 (2 bit)
access : write
P42CLR : Clear P42OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44CLR : Clear P44OUT
bits : 4 - 8 (5 bit)
access : write
P45CLR : Clear P45OUT
bits : 5 - 10 (6 bit)
access : write
P46CLR : Clear P46OUT
bits : 6 - 12 (7 bit)
access : write
P47CLR : Clear P47OUT
bits : 7 - 14 (8 bit)
access : write
Port 5 Output Clear Register
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50CLR : Clear P50OUT
bits : 0 - 0 (1 bit)
access : write
P51CLR : Clear P51OUT
bits : 1 - 2 (2 bit)
access : write
P52CLR : Clear P52OUT
bits : 2 - 4 (3 bit)
access : write
P53CLR : Clear P53OUT
bits : 3 - 6 (4 bit)
access : write
P54CLR : Clear P54OUT
bits : 4 - 8 (5 bit)
access : write
P55CLR : Clear P55OUT
bits : 5 - 10 (6 bit)
access : write
P56CLR : Clear P56OUT
bits : 6 - 12 (7 bit)
access : write
P57CLR : Clear P57OUT
bits : 7 - 14 (8 bit)
access : write
Port 6 Output Clear Register
address_offset : 0x16 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60CLR : Clear P60OUT
bits : 0 - 0 (1 bit)
access : write
P61CLR : Clear P61OUT
bits : 1 - 2 (2 bit)
access : write
P62CLR : Clear P62OUT
bits : 2 - 4 (3 bit)
access : write
P63CLR : Clear P63OUT
bits : 3 - 6 (4 bit)
access : write
P64CLR : Clear P64OUT
bits : 4 - 8 (5 bit)
access : write
P65CLR : Clear P65OUT
bits : 5 - 10 (6 bit)
access : write
P66CLR : Clear P66OUT
bits : 6 - 12 (7 bit)
access : write
P67CLR : Clear P67OUT
bits : 7 - 14 (8 bit)
access : write
Port 7 Output Clear Register
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70CLR : Clear P70OUT
bits : 0 - 0 (1 bit)
access : write
P71CLR : Clear P71OUT
bits : 1 - 2 (2 bit)
access : write
P72CLR : Clear P72OUT
bits : 2 - 4 (3 bit)
access : write
P73CLR : Clear P73OUT
bits : 3 - 6 (4 bit)
access : write
P74CLR : Clear P74OUT
bits : 4 - 8 (5 bit)
access : write
P75CLR : Clear P75OUT
bits : 5 - 10 (6 bit)
access : write
P76CLR : Clear P76OUT
bits : 6 - 12 (7 bit)
access : write
P77CLR : Clear P77OUT
bits : 7 - 14 (8 bit)
access : write
Port 8 Output Clear Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80CLR : Clear P80OUT
bits : 0 - 0 (1 bit)
access : write
P81CLR : Clear P81OUT
bits : 1 - 2 (2 bit)
access : write
P82CLR : Clear P82OUT
bits : 2 - 4 (3 bit)
access : write
P83CLR : Clear P83OUT
bits : 3 - 6 (4 bit)
access : write
P84CLR : Clear P84OUT
bits : 4 - 8 (5 bit)
access : write
P85CLR : Clear P85OUT
bits : 5 - 10 (6 bit)
access : write
P86CLR : Clear P86OUT
bits : 6 - 12 (7 bit)
access : write
P87CLR : Clear P87OUT
bits : 7 - 14 (8 bit)
access : write
Port 9 Output Clear Register
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90CLR : Clear P90OUT
bits : 0 - 0 (1 bit)
access : write
P91CLR : Clear P91OUT
bits : 1 - 2 (2 bit)
access : write
P92CLR : Clear P92OUT
bits : 2 - 4 (3 bit)
access : write
P93CLR : Clear P93OUT
bits : 3 - 6 (4 bit)
access : write
P94CLR : Clear P94OUT
bits : 4 - 8 (5 bit)
access : write
P95CLR : Clear P95OUT
bits : 5 - 10 (6 bit)
access : write
P96CLR : Clear P96OUT
bits : 6 - 12 (7 bit)
access : write
P97CLR : Clear P97OUT
bits : 7 - 14 (8 bit)
access : write
Port A Output Clear Register
address_offset : 0x1A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0CLR : Clear PA0OUT
bits : 0 - 0 (1 bit)
access : write
PA1CLR : Clear PA1OUT
bits : 1 - 2 (2 bit)
access : write
PA2CLR : Clear PA2OUT
bits : 2 - 4 (3 bit)
access : write
PA3CLR : Clear PA3OUT
bits : 3 - 6 (4 bit)
access : write
PA4CLR : Clear PA4OUT
bits : 4 - 8 (5 bit)
access : write
PA5CLR : Clear PA5OUT
bits : 5 - 10 (6 bit)
access : write
PA6CLR : Clear PA6OUT
bits : 6 - 12 (7 bit)
access : write
PA7CLR : Clear PA7OUT
bits : 7 - 14 (8 bit)
access : write
Port B Output Clear Register
address_offset : 0x1B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0CLR : Clear PB0OUT
bits : 0 - 0 (1 bit)
access : write
PB1CLR : Clear PB1OUT
bits : 1 - 2 (2 bit)
access : write
PB2CLR : Clear PB2OUT
bits : 2 - 4 (3 bit)
access : write
PB3CLR : Clear PB3OUT
bits : 3 - 6 (4 bit)
access : write
PB4CLR : Clear PB4OUT
bits : 4 - 8 (5 bit)
access : write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : write
PB6CLR : Clear PB6OUT
bits : 6 - 12 (7 bit)
access : write
PB7CLR : Clear PB7OUT
bits : 7 - 14 (8 bit)
access : write
Port C Output Clear Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4CLR : Clear PC4OUT
bits : 4 - 8 (5 bit)
access : write
PC5CLR : Clear PC5OUT
bits : 5 - 10 (6 bit)
access : write
PC6CLR : Clear PC6OUT
bits : 6 - 12 (7 bit)
access : write
PC7CLR : Clear PC7OUT
bits : 7 - 14 (8 bit)
access : write
Port D Output Clear Register
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2CLR : Clear PD2OUT
bits : 2 - 4 (3 bit)
access : write
PD3CLR : Clear PD3OUT
bits : 3 - 6 (4 bit)
access : write
PD4CLR : Clear PD4OUT
bits : 4 - 8 (5 bit)
access : write
PD5CLR : Clear PD5OUT
bits : 5 - 10 (6 bit)
access : write
PD6CLR : Clear PD6OUT
bits : 6 - 12 (7 bit)
access : write
PD7CLR : Clear PD7OUT
bits : 7 - 14 (8 bit)
access : write
Port E Output Clear Register
address_offset : 0x1E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2CLR : Clear PE2OUT
bits : 2 - 4 (3 bit)
access : write
PE3CLR : Clear PE3OUT
bits : 3 - 6 (4 bit)
access : write
PE4CLR : Clear PE4OUT
bits : 4 - 8 (5 bit)
access : write
PE5CLR : Clear PE5OUT
bits : 5 - 10 (6 bit)
access : write
PE6CLR : Clear PE6OUT
bits : 6 - 12 (7 bit)
access : write
PE7CLR : Clear PE7OUT
bits : 7 - 14 (8 bit)
access : write
Port F Output Clear Register
address_offset : 0x1F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0CLR : Clear PF0OUT
bits : 0 - 0 (1 bit)
access : write
PF1CLR : Clear PF1OUT
bits : 1 - 2 (2 bit)
access : write
PF2CLR : Clear PF2OUT
bits : 2 - 4 (3 bit)
access : write
PF3CLR : Clear PF3OUT
bits : 3 - 6 (4 bit)
access : write
PF4CLR : Clear PF4OUT
bits : 4 - 8 (5 bit)
access : write
PF5CLR : Clear PF5OUT
bits : 5 - 10 (6 bit)
access : write
PF6CLR : Clear PF6OUT
bits : 6 - 12 (7 bit)
access : write
PF7CLR : Clear PF7OUT
bits : 7 - 14 (8 bit)
access : write
Port 2 Output Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20OUT : Set output data of P20
bits : 0 - 0 (1 bit)
access : read-write
P21OUT : Set output data of P21
bits : 1 - 2 (2 bit)
access : read-write
P22OUT : Set output data of P22
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24OUT : Set output data of P24
bits : 4 - 8 (5 bit)
access : read-write
P25OUT : Set output data of P25
bits : 5 - 10 (6 bit)
access : read-write
P26OUT : Set output data of P26
bits : 6 - 12 (7 bit)
access : read-write
P27OUT : Set output data of P27
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Output Set Register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00SET : Set P00OUT
bits : 0 - 0 (1 bit)
access : write
P01SET : Set P01OUT
bits : 1 - 2 (2 bit)
access : write
P02SET : Set P02OUT
bits : 2 - 4 (3 bit)
access : write
P03SET : Set P03OUT
bits : 3 - 6 (4 bit)
access : write
P04SET : Set P04OUT
bits : 4 - 8 (5 bit)
access : write
P05SET : Set P05OUT
bits : 5 - 10 (6 bit)
access : write
P06SET : Set P06OUT
bits : 6 - 12 (7 bit)
access : write
P07SET : Set P07OUT
bits : 7 - 14 (8 bit)
access : write
Port 1 Output Set Register
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10SET : Set P10OUT
bits : 0 - 0 (1 bit)
access : write
P11SET : Set P11OUT
bits : 1 - 2 (2 bit)
access : write
P12SET : Set P12OUT
bits : 2 - 4 (3 bit)
access : write
P13SET : Set P13OUT
bits : 3 - 6 (4 bit)
access : write
P14SET : Set P14OUT
bits : 4 - 8 (5 bit)
access : write
P15SET : Set P15OUT
bits : 5 - 10 (6 bit)
access : write
P16SET : Set P16OUT
bits : 6 - 12 (7 bit)
access : write
P17SET : Set P17OUT
bits : 7 - 14 (8 bit)
access : write
Port 2 Output Set Register
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20SET : Set P20OUT
bits : 0 - 0 (1 bit)
access : write
P21SET : Set P21OUT
bits : 1 - 2 (2 bit)
access : write
P22SET : Set P22OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24SET : Set P24OUT
bits : 4 - 8 (5 bit)
access : write
P25SET : Set P25OUT
bits : 5 - 10 (6 bit)
access : write
P26SET : Set P26OUT
bits : 6 - 12 (7 bit)
access : write
P27SET : Set P27OUT
bits : 7 - 14 (8 bit)
access : write
Port 3 Output Set Register
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30SET : Set P30OUT
bits : 0 - 0 (1 bit)
access : write
P31SET : Set P31OUT
bits : 1 - 2 (2 bit)
access : write
P32SET : Set P32OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34SET : Set P34OUT
bits : 4 - 8 (5 bit)
access : write
P35SET : Set P35OUT
bits : 5 - 10 (6 bit)
access : write
P36SET : Set P36OUT
bits : 6 - 12 (7 bit)
access : write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Output Set Register
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40SET : Set P40OUT
bits : 0 - 0 (1 bit)
access : write
P41SET : Set P41OUT
bits : 1 - 2 (2 bit)
access : write
P42SET : Set P42OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44SET : Set P44OUT
bits : 4 - 8 (5 bit)
access : write
P45SET : Set P45OUT
bits : 5 - 10 (6 bit)
access : write
P46SET : Set P46OUT
bits : 6 - 12 (7 bit)
access : write
P47SET : Set P47OUT
bits : 7 - 14 (8 bit)
access : write
Port 5 Output Set Register
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50SET : Set P50OUT
bits : 0 - 0 (1 bit)
access : write
P51SET : Set P51OUT
bits : 1 - 2 (2 bit)
access : write
P52SET : Set P52OUT
bits : 2 - 4 (3 bit)
access : write
P53SET : Set P53OUT
bits : 3 - 6 (4 bit)
access : write
P54SET : Set P54OUT
bits : 4 - 8 (5 bit)
access : write
P55SET : Set P55OUT
bits : 5 - 10 (6 bit)
access : write
P56SET : Set P56OUT
bits : 6 - 12 (7 bit)
access : write
P57SET : Set P57OUT
bits : 7 - 14 (8 bit)
access : write
Port 6 Output Set Register
address_offset : 0x26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60SET : Set P60OUT
bits : 0 - 0 (1 bit)
access : write
P61SET : Set P61OUT
bits : 1 - 2 (2 bit)
access : write
P62SET : Set P62OUT
bits : 2 - 4 (3 bit)
access : write
P63SET : Set P63OUT
bits : 3 - 6 (4 bit)
access : write
P64SET : Set P64OUT
bits : 4 - 8 (5 bit)
access : write
P65SET : Set P65OUT
bits : 5 - 10 (6 bit)
access : write
P66SET : Set P66OUT
bits : 6 - 12 (7 bit)
access : write
P67SET : Set P67OUT
bits : 7 - 14 (8 bit)
access : write
Port 7 Output Set Register
address_offset : 0x27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70SET : Set P70OUT
bits : 0 - 0 (1 bit)
access : write
P71SET : Set P71OUT
bits : 1 - 2 (2 bit)
access : write
P72SET : Set P72OUT
bits : 2 - 4 (3 bit)
access : write
P73SET : Set P73OUT
bits : 3 - 6 (4 bit)
access : write
P74SET : Set P74OUT
bits : 4 - 8 (5 bit)
access : write
P75SET : Set P75OUT
bits : 5 - 10 (6 bit)
access : write
P76SET : Set P76OUT
bits : 6 - 12 (7 bit)
access : write
P77SET : Set P77OUT
bits : 7 - 14 (8 bit)
access : write
Port 8 Output Set Register
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80SET : Set P80OUT
bits : 0 - 0 (1 bit)
access : write
P81SET : Set P81OUT
bits : 1 - 2 (2 bit)
access : write
P82SET : Set P82OUT
bits : 2 - 4 (3 bit)
access : write
P83SET : Set P83OUT
bits : 3 - 6 (4 bit)
access : write
P84SET : Set P84OUT
bits : 4 - 8 (5 bit)
access : write
P85SET : Set P85OUT
bits : 5 - 10 (6 bit)
access : write
P86SET : Set P86OUT
bits : 6 - 12 (7 bit)
access : write
P87SET : Set P87OUT
bits : 7 - 14 (8 bit)
access : write
Port 9 Output Set Register
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90SET : Set P90OUT
bits : 0 - 0 (1 bit)
access : write
P91SET : Set P91OUT
bits : 1 - 2 (2 bit)
access : write
P92SET : Set P92OUT
bits : 2 - 4 (3 bit)
access : write
P93SET : Set P93OUT
bits : 3 - 6 (4 bit)
access : write
P94SET : Set P94OUT
bits : 4 - 8 (5 bit)
access : write
P95SET : Set P95OUT
bits : 5 - 10 (6 bit)
access : write
P96SET : Set P96OUT
bits : 6 - 12 (7 bit)
access : write
P97SET : Set P97OUT
bits : 7 - 14 (8 bit)
access : write
Port A Output Set Register
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0SET : Set PA0OUT
bits : 0 - 0 (1 bit)
access : write
PA1SET : Set PA1OUT
bits : 1 - 2 (2 bit)
access : write
PA2SET : Set PA2OUT
bits : 2 - 4 (3 bit)
access : write
PA3SET : Set PA3OUT
bits : 3 - 6 (4 bit)
access : write
PA4SET : Set PA4OUT
bits : 4 - 8 (5 bit)
access : write
PA5SET : Set PA5OUT
bits : 5 - 10 (6 bit)
access : write
PA6SET : Set PA6OUT
bits : 6 - 12 (7 bit)
access : write
PA7SET : Set PA7OUT
bits : 7 - 14 (8 bit)
access : write
Port B Output Set Register
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0SET : Set PB0OUT
bits : 0 - 0 (1 bit)
access : write
PB1SET : Set PB1OUT
bits : 1 - 2 (2 bit)
access : write
PB2SET : Set PB2OUT
bits : 2 - 4 (3 bit)
access : write
PB3SET : Set PB3OUT
bits : 3 - 6 (4 bit)
access : write
PB4SET : Set PB4OUT
bits : 4 - 8 (5 bit)
access : write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : write
PB6SET : Set PB6OUT
bits : 6 - 12 (7 bit)
access : write
PB7SET : Set PB7OUT
bits : 7 - 14 (8 bit)
access : write
Port C Output Set Register
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4SET : Set PC4OUT
bits : 4 - 8 (5 bit)
access : write
PC5SET : Set PC5OUT
bits : 5 - 10 (6 bit)
access : write
PC6SET : Set PC6OUT
bits : 6 - 12 (7 bit)
access : write
PC7SET : Set PC7OUT
bits : 7 - 14 (8 bit)
access : write
Port D Output Set Register
address_offset : 0x2D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2SET : Set PD2OUT
bits : 2 - 4 (3 bit)
access : write
PD3SET : Set PD3OUT
bits : 3 - 6 (4 bit)
access : write
PD4SET : Set PD4OUT
bits : 4 - 8 (5 bit)
access : write
PD5SET : Set PD5OUT
bits : 5 - 10 (6 bit)
access : write
PD6SET : Set PD6OUT
bits : 6 - 12 (7 bit)
access : write
PD7SET : Set PD7OUT
bits : 7 - 14 (8 bit)
access : write
Port E Output Set Register
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2SET : Set PE2OUT
bits : 2 - 4 (3 bit)
access : write
PE3SET : Set PE3OUT
bits : 3 - 6 (4 bit)
access : write
PE4SET : Set PE4OUT
bits : 4 - 8 (5 bit)
access : write
PE5SET : Set PE5OUT
bits : 5 - 10 (6 bit)
access : write
PE6SET : Set PE6OUT
bits : 6 - 12 (7 bit)
access : write
PE7SET : Set PE7OUT
bits : 7 - 14 (8 bit)
access : write
Port F Output Set Register
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0SET : Set PF0OUT
bits : 0 - 0 (1 bit)
access : write
PF1SET : Set PF1OUT
bits : 1 - 2 (2 bit)
access : write
PF2SET : Set PF2OUT
bits : 2 - 4 (3 bit)
access : write
PF3SET : Set PF3OUT
bits : 3 - 6 (4 bit)
access : write
PF4SET : Set PF4OUT
bits : 4 - 8 (5 bit)
access : write
PF5SET : Set PF5OUT
bits : 5 - 10 (6 bit)
access : write
PF6SET : Set PF6OUT
bits : 6 - 12 (7 bit)
access : write
PF7SET : Set PF7OUT
bits : 7 - 14 (8 bit)
access : write
Port 3 Output Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30OUT : Set output data of P30
bits : 0 - 0 (1 bit)
access : read-write
P31OUT : Set output data of P31
bits : 1 - 2 (2 bit)
access : read-write
P32OUT : Set output data of P32
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34OUT : Set output data of P34
bits : 4 - 8 (5 bit)
access : read-write
P35OUT : Set output data of P35
bits : 5 - 10 (6 bit)
access : read-write
P36OUT : Set output data of P36
bits : 6 - 12 (7 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 0 Output Toggle Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00TGL : Invert P00OUT
bits : 0 - 0 (1 bit)
access : write
P01TGL : Invert P01OUT
bits : 1 - 2 (2 bit)
access : write
P02TGL : Invert P02OUT
bits : 2 - 4 (3 bit)
access : write
P03TGL : Invert P03OUT
bits : 3 - 6 (4 bit)
access : write
P04TGL : Invert P04OUT
bits : 4 - 8 (5 bit)
access : write
P05TGL : Invert P05OUT
bits : 5 - 10 (6 bit)
access : write
P06TGL : Invert P06OUT
bits : 6 - 12 (7 bit)
access : write
P07TGL : Invert P07OUT
bits : 7 - 14 (8 bit)
access : write
Port 1 Output Toggle Register
address_offset : 0x31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10TGL : Invert P10OUT
bits : 0 - 0 (1 bit)
access : write
P11TGL : Invert P11OUT
bits : 1 - 2 (2 bit)
access : write
P12TGL : Invert P12OUT
bits : 2 - 4 (3 bit)
access : write
P13TGL : Invert P13OUT
bits : 3 - 6 (4 bit)
access : write
P14TGL : Invert P14OUT
bits : 4 - 8 (5 bit)
access : write
P15TGL : Invert P15OUT
bits : 5 - 10 (6 bit)
access : write
P16TGL : Invert P16OUT
bits : 6 - 12 (7 bit)
access : write
P17TGL : Invert P17OUT
bits : 7 - 14 (8 bit)
access : write
Port 2 Output Toggle Register
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20TGL : Invert P20OUT
bits : 0 - 0 (1 bit)
access : write
P21TGL : Invert P21OUT
bits : 1 - 2 (2 bit)
access : write
P22TGL : Invert P22OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24TGL : Invert P24OUT
bits : 4 - 8 (5 bit)
access : write
P25TGL : Invert P25OUT
bits : 5 - 10 (6 bit)
access : write
P26TGL : Invert P26OUT
bits : 6 - 12 (7 bit)
access : write
P27TGL : Invert P27OUT
bits : 7 - 14 (8 bit)
access : write
Port 3 Output Toggle Register
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30TGL : Invert P30OUT
bits : 0 - 0 (1 bit)
access : write
P31TGL : Invert P31OUT
bits : 1 - 2 (2 bit)
access : write
P32TGL : Invert P32OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34TGL : Invert P34OUT
bits : 4 - 8 (5 bit)
access : write
P35TGL : Invert P35OUT
bits : 5 - 10 (6 bit)
access : write
P36TGL : Invert P36OUT
bits : 6 - 12 (7 bit)
access : write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Output Toggle Register
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40TGL : Invert P40OUT
bits : 0 - 0 (1 bit)
access : write
P41TGL : Invert P41OUT
bits : 1 - 2 (2 bit)
access : write
P42TGL : Invert P42OUT
bits : 2 - 4 (3 bit)
access : write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44TGL : Invert P44OUT
bits : 4 - 8 (5 bit)
access : write
P45TGL : Invert P45OUT
bits : 5 - 10 (6 bit)
access : write
P46TGL : Invert P46OUT
bits : 6 - 12 (7 bit)
access : write
P47TGL : Invert P47OUT
bits : 7 - 14 (8 bit)
access : write
Port 5 Output Toggle Register
address_offset : 0x35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50TGL : Invert P50OUT
bits : 0 - 0 (1 bit)
access : write
P51TGL : Invert P51OUT
bits : 1 - 2 (2 bit)
access : write
P52TGL : Invert P52OUT
bits : 2 - 4 (3 bit)
access : write
P53TGL : Invert P53OUT
bits : 3 - 6 (4 bit)
access : write
P54TGL : Invert P54OUT
bits : 4 - 8 (5 bit)
access : write
P55TGL : Invert P55OUT
bits : 5 - 10 (6 bit)
access : write
P56TGL : Invert P56OUT
bits : 6 - 12 (7 bit)
access : write
P57TGL : Invert P57OUT
bits : 7 - 14 (8 bit)
access : write
Port 6 Output Toggle Register
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60TGL : Invert P60OUT
bits : 0 - 0 (1 bit)
access : write
P61TGL : Invert P61OUT
bits : 1 - 2 (2 bit)
access : write
P62TGL : Invert P62OUT
bits : 2 - 4 (3 bit)
access : write
P63TGL : Invert P63OUT
bits : 3 - 6 (4 bit)
access : write
P64TGL : Invert P64OUT
bits : 4 - 8 (5 bit)
access : write
P65TGL : Invert P65OUT
bits : 5 - 10 (6 bit)
access : write
P66TGL : Invert P66OUT
bits : 6 - 12 (7 bit)
access : write
P67TGL : Invert P67OUT
bits : 7 - 14 (8 bit)
access : write
Port 7 Output Toggle Register
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70TGL : Invert P70OUT
bits : 0 - 0 (1 bit)
access : write
P71TGL : Invert P71OUT
bits : 1 - 2 (2 bit)
access : write
P72TGL : Invert P72OUT
bits : 2 - 4 (3 bit)
access : write
P73TGL : Invert P73OUT
bits : 3 - 6 (4 bit)
access : write
P74TGL : Invert P74OUT
bits : 4 - 8 (5 bit)
access : write
P75TGL : Invert P75OUT
bits : 5 - 10 (6 bit)
access : write
P76TGL : Invert P76OUT
bits : 6 - 12 (7 bit)
access : write
P77TGL : Invert P77OUT
bits : 7 - 14 (8 bit)
access : write
Port 8 Output Toggle Register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80TGL : Invert P80OUT
bits : 0 - 0 (1 bit)
access : write
P81TGL : Invert P81OUT
bits : 1 - 2 (2 bit)
access : write
P82TGL : Invert P82OUT
bits : 2 - 4 (3 bit)
access : write
P83TGL : Invert P83OUT
bits : 3 - 6 (4 bit)
access : write
P84TGL : Invert P84OUT
bits : 4 - 8 (5 bit)
access : write
P85TGL : Invert P85OUT
bits : 5 - 10 (6 bit)
access : write
P86TGL : Invert P86OUT
bits : 6 - 12 (7 bit)
access : write
P87TGL : Invert P87OUT
bits : 7 - 14 (8 bit)
access : write
Port 9 Output Toggle Register
address_offset : 0x39 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90TGL : Invert P90OUT
bits : 0 - 0 (1 bit)
access : write
P91TGL : Invert P91OUT
bits : 1 - 2 (2 bit)
access : write
P92TGL : Invert P92OUT
bits : 2 - 4 (3 bit)
access : write
P93TGL : Invert P93OUT
bits : 3 - 6 (4 bit)
access : write
P94TGL : Invert P94OUT
bits : 4 - 8 (5 bit)
access : write
P95TGL : Invert P95OUT
bits : 5 - 10 (6 bit)
access : write
P96TGL : Invert P96OUT
bits : 6 - 12 (7 bit)
access : write
P97TGL : Invert P97OUT
bits : 7 - 14 (8 bit)
access : write
Port A Output Toggle Register
address_offset : 0x3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0TGL : Invert PA0OUT
bits : 0 - 0 (1 bit)
access : write
PA1TGL : Invert PA1OUT
bits : 1 - 2 (2 bit)
access : write
PA2TGL : Invert PA2OUT
bits : 2 - 4 (3 bit)
access : write
PA3TGL : Invert PA3OUT
bits : 3 - 6 (4 bit)
access : write
PA4TGL : Invert PA4OUT
bits : 4 - 8 (5 bit)
access : write
PA5TGL : Invert PA5OUT
bits : 5 - 10 (6 bit)
access : write
PA6TGL : Invert PA6OUT
bits : 6 - 12 (7 bit)
access : write
PA7TGL : Invert PA7OUT
bits : 7 - 14 (8 bit)
access : write
Port B Output Toggle Register
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0TGL : Invert PB0OUT
bits : 0 - 0 (1 bit)
access : write
PB1TGL : Invert PB1OUT
bits : 1 - 2 (2 bit)
access : write
PB2TGL : Invert PB2OUT
bits : 2 - 4 (3 bit)
access : write
PB3TGL : Invert PB3OUT
bits : 3 - 6 (4 bit)
access : write
PB4TGL : Invert PB4OUT
bits : 4 - 8 (5 bit)
access : write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : write
PB6TGL : Invert PB6OUT
bits : 6 - 12 (7 bit)
access : write
PB7TGL : Invert PB7OUT
bits : 7 - 14 (8 bit)
access : write
Port C Output Toggle Register
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4TGL : Invert PC4OUT
bits : 4 - 8 (5 bit)
access : write
PC5TGL : Invert PC5OUT
bits : 5 - 10 (6 bit)
access : write
PC6TGL : Invert PC6OUT
bits : 6 - 12 (7 bit)
access : write
PC7TGL : Invert PC7OUT
bits : 7 - 14 (8 bit)
access : write
Port D Output Toggle Register
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2TGL : Invert PD2OUT
bits : 2 - 4 (3 bit)
access : write
PD3TGL : Invert PD3OUT
bits : 3 - 6 (4 bit)
access : write
PD4TGL : Invert PD4OUT
bits : 4 - 8 (5 bit)
access : write
PD5TGL : Invert PD5OUT
bits : 5 - 10 (6 bit)
access : write
PD6TGL : Invert PD6OUT
bits : 6 - 12 (7 bit)
access : write
PD7TGL : Invert PD7OUT
bits : 7 - 14 (8 bit)
access : write
Port E Output Toggle Register
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2TGL : Invert PE2OUT
bits : 2 - 4 (3 bit)
access : write
PE3TGL : Invert PE3OUT
bits : 3 - 6 (4 bit)
access : write
PE4TGL : Invert PE4OUT
bits : 4 - 8 (5 bit)
access : write
PE5TGL : Invert PE5OUT
bits : 5 - 10 (6 bit)
access : write
PE6TGL : Invert PE6OUT
bits : 6 - 12 (7 bit)
access : write
PE7TGL : Invert PE7OUT
bits : 7 - 14 (8 bit)
access : write
Port F Output Toggle Register
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0TGL : Invert PF0OUT
bits : 0 - 0 (1 bit)
access : write
PF1TGL : Invert PF1OUT
bits : 1 - 2 (2 bit)
access : write
PF2TGL : Invert PF2OUT
bits : 2 - 4 (3 bit)
access : write
PF3TGL : Invert PF3OUT
bits : 3 - 6 (4 bit)
access : write
PF4TGL : Invert PF4OUT
bits : 4 - 8 (5 bit)
access : write
PF5TGL : Invert PF5OUT
bits : 5 - 10 (6 bit)
access : write
PF6TGL : Invert PF6OUT
bits : 6 - 12 (7 bit)
access : write
PF7TGL : Invert PF7OUT
bits : 7 - 14 (8 bit)
access : write
Port 4 Output Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40OUT : Set output data of P40
bits : 0 - 0 (1 bit)
access : read-write
P41OUT : Set output data of P41
bits : 1 - 2 (2 bit)
access : read-write
P42OUT : Set output data of P42
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44OUT : Set output data of P44
bits : 4 - 8 (5 bit)
access : read-write
P45OUT : Set output data of P45
bits : 5 - 10 (6 bit)
access : read-write
P46OUT : Set output data of P46
bits : 6 - 12 (7 bit)
access : read-write
P47OUT : Set output data of P47
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Input Register
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00IN : Input data of P00 is read out.
bits : 0 - 0 (1 bit)
access : read
P01IN : Input data of P01 is read out.
bits : 1 - 2 (2 bit)
access : read
P02IN : Input data of P02 is read out.
bits : 2 - 4 (3 bit)
access : read
P03IN : Input data of P03 is read out.
bits : 3 - 6 (4 bit)
access : read
P04IN : Input data of P04 is read out.
bits : 4 - 8 (5 bit)
access : read
P05IN : Input data of P05 is read out.
bits : 5 - 10 (6 bit)
access : read
P06IN : Input data of P06 is read out.
bits : 6 - 12 (7 bit)
access : read
P07IN : Input data of P07 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 1 Input Register
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10IN : Input data of P10 is read out.
bits : 0 - 0 (1 bit)
access : read
P11IN : Input data of P11 is read out.
bits : 1 - 2 (2 bit)
access : read
P12IN : Input data of P12 is read out.
bits : 2 - 4 (3 bit)
access : read
P13IN : Input data of P13 is read out.
bits : 3 - 6 (4 bit)
access : read
P14IN : Input data of P14 is read out.
bits : 4 - 8 (5 bit)
access : read
P15IN : Input data of P15 is read out.
bits : 5 - 10 (6 bit)
access : read
P16IN : Input data of P16 is read out.
bits : 6 - 12 (7 bit)
access : read
P17IN : Input data of P17 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 2 Input Register
address_offset : 0x42 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20IN : Input data of P20 is read out.
bits : 0 - 0 (1 bit)
access : read
P21IN : Input data of P21 is read out.
bits : 1 - 2 (2 bit)
access : read
P22IN : Input data of P22 is read out.
bits : 2 - 4 (3 bit)
access : read
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24IN : Input data of P24 is read out.
bits : 4 - 8 (5 bit)
access : read
P25IN : Input data of P25 is read out.
bits : 5 - 10 (6 bit)
access : read
P26IN : Input data of P26 is read out.
bits : 6 - 12 (7 bit)
access : read
P27IN : Input data of P27 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 3 Input Register
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30IN : Input data of P30 is read out.
bits : 0 - 0 (1 bit)
access : read
P31IN : Input data of P31 is read out.
bits : 1 - 2 (2 bit)
access : read
P32IN : Input data of P32 is read out.
bits : 2 - 4 (3 bit)
access : read
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34IN : Input data of P34 is read out.
bits : 4 - 8 (5 bit)
access : read
P35IN : Input data of P35 is read out.
bits : 5 - 10 (6 bit)
access : read
P36IN : Input data of P36 is read out.
bits : 6 - 12 (7 bit)
access : read
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Input Register
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40IN : Input data of P40 is read out.
bits : 0 - 0 (1 bit)
access : read
P41IN : Input data of P41 is read out.
bits : 1 - 2 (2 bit)
access : read
P42IN : Input data of P42 is read out.
bits : 2 - 4 (3 bit)
access : read
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44IN : Input data of P44 is read out.
bits : 4 - 8 (5 bit)
access : read
P45IN : Input data of P45 is read out.
bits : 5 - 10 (6 bit)
access : read
P46IN : Input data of P46 is read out.
bits : 6 - 12 (7 bit)
access : read
P47IN : Input data of P47 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 5 Input Register
address_offset : 0x45 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50IN : Input data of P50 is read out.
bits : 0 - 0 (1 bit)
access : read
P51IN : Input data of P51 is read out.
bits : 1 - 2 (2 bit)
access : read
P52IN : Input data of P52 is read out.
bits : 2 - 4 (3 bit)
access : read
P53IN : Input data of P53 is read out.
bits : 3 - 6 (4 bit)
access : read
P54IN : Input data of P54 is read out.
bits : 4 - 8 (5 bit)
access : read
P55IN : Input data of P55 is read out.
bits : 5 - 10 (6 bit)
access : read
P56IN : Input data of P56 is read out.
bits : 6 - 12 (7 bit)
access : read
P57IN : Input data of P57 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 6 Input Register
address_offset : 0x46 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60IN : Input data of P60 is read out.
bits : 0 - 0 (1 bit)
access : read
P61IN : Input data of P61 is read out.
bits : 1 - 2 (2 bit)
access : read
P62IN : Input data of P62 is read out.
bits : 2 - 4 (3 bit)
access : read
P63IN : Input data of P63 is read out.
bits : 3 - 6 (4 bit)
access : read
P64IN : Input data of P64 is read out.
bits : 4 - 8 (5 bit)
access : read
P65IN : Input data of P65 is read out.
bits : 5 - 10 (6 bit)
access : read
P66IN : Input data of P66 is read out.
bits : 6 - 12 (7 bit)
access : read
P67IN : Input data of P67 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 7 Input Register
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70IN : Input data of P70 is read out.
bits : 0 - 0 (1 bit)
access : read
P71IN : Input data of P71 is read out.
bits : 1 - 2 (2 bit)
access : read
P72IN : Input data of P72 is read out.
bits : 2 - 4 (3 bit)
access : read
P73IN : Input data of P73 is read out.
bits : 3 - 6 (4 bit)
access : read
P74IN : Input data of P74 is read out.
bits : 4 - 8 (5 bit)
access : read
P75IN : Input data of P75 is read out.
bits : 5 - 10 (6 bit)
access : read
P76IN : Input data of P76 is read out.
bits : 6 - 12 (7 bit)
access : read
P77IN : Input data of P77 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 8 Input Register
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80IN : Input data of P80 is read out.
bits : 0 - 0 (1 bit)
access : read
P81IN : Input data of P81 is read out.
bits : 1 - 2 (2 bit)
access : read
P82IN : Input data of P82 is read out.
bits : 2 - 4 (3 bit)
access : read
P83IN : Input data of P83 is read out.
bits : 3 - 6 (4 bit)
access : read
P84IN : Input data of P84 is read out.
bits : 4 - 8 (5 bit)
access : read
P85IN : Input data of P85 is read out.
bits : 5 - 10 (6 bit)
access : read
P86IN : Input data of P86 is read out.
bits : 6 - 12 (7 bit)
access : read
P87IN : Input data of P87 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 9 Input Register
address_offset : 0x49 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90IN : Input data of P90 is read out.
bits : 0 - 0 (1 bit)
access : read
P91IN : Input data of P91 is read out.
bits : 1 - 2 (2 bit)
access : read
P92IN : Input data of P92 is read out.
bits : 2 - 4 (3 bit)
access : read
P93IN : Input data of P93 is read out.
bits : 3 - 6 (4 bit)
access : read
P94IN : Input data of P94 is read out.
bits : 4 - 8 (5 bit)
access : read
P95IN : Input data of P95 is read out.
bits : 5 - 10 (6 bit)
access : read
P96IN : Input data of P96 is read out.
bits : 6 - 12 (7 bit)
access : read
P97IN : Input data of P97 is read out.
bits : 7 - 14 (8 bit)
access : read
Port A Input Register
address_offset : 0x4A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0IN : Input data of PA0 is read out.
bits : 0 - 0 (1 bit)
access : read
PA1IN : Input data of PA1 is read out.
bits : 1 - 2 (2 bit)
access : read
PA2IN : Input data of PA2 is read out.
bits : 2 - 4 (3 bit)
access : read
PA3IN : Input data of PA3 is read out.
bits : 3 - 6 (4 bit)
access : read
PA4IN : Input data of PA4 is read out.
bits : 4 - 8 (5 bit)
access : read
PA5IN : Input data of PA5 is read out.
bits : 5 - 10 (6 bit)
access : read
PA6IN : Input data of PA6 is read out.
bits : 6 - 12 (7 bit)
access : read
PA7IN : Input data of PA7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port B Input Register
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0IN : Input data of PB0 is read out.
bits : 0 - 0 (1 bit)
access : read
PB1IN : Input data of PB1 is read out.
bits : 1 - 2 (2 bit)
access : read
PB2IN : Input data of PB2 is read out.
bits : 2 - 4 (3 bit)
access : read
PB3IN : Input data of PB3 is read out.
bits : 3 - 6 (4 bit)
access : read
PB4IN : Input data of PB4 is read out.
bits : 4 - 8 (5 bit)
access : read
__reserve0 : Undefined value will be read
bits : 5 - 10 (6 bit)
access : read
PB6IN : Input data of PB6 is read out.
bits : 6 - 12 (7 bit)
access : read
PB7IN : Input data of PB7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port C Input Register
address_offset : 0x4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PC0IN : Input data of PC0 is read out.
bits : 0 - 0 (1 bit)
access : read
PC1IN : Input data of PC1 is read out.
bits : 1 - 2 (2 bit)
access : read
PC2IN : Input data of PC2 is read out.
bits : 2 - 4 (3 bit)
access : read
PC3IN : Input data of PC3 is read out.
bits : 3 - 6 (4 bit)
access : read
PC4IN : Input data of PC4 is read out.
bits : 4 - 8 (5 bit)
access : read
PC5IN : Input data of PC5 is read out.
bits : 5 - 10 (6 bit)
access : read
PC6IN : Input data of PC6 is read out.
bits : 6 - 12 (7 bit)
access : read
PC7IN : Input data of PC7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port D Input Register
address_offset : 0x4D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PD0IN : Input data of PD0 is read out.
bits : 0 - 0 (1 bit)
access : read
PD1IN : Input data of PD1 is read out.
bits : 1 - 2 (2 bit)
access : read
PD2IN : Input data of PD2 is read out.
bits : 2 - 4 (3 bit)
access : read
PD3IN : Input data of PD3 is read out.
bits : 3 - 6 (4 bit)
access : read
PD4IN : Input data of PD4 is read out.
bits : 4 - 8 (5 bit)
access : read
PD5IN : Input data of PD5 is read out.
bits : 5 - 10 (6 bit)
access : read
PD6IN : Input data of PD6 is read out.
bits : 6 - 12 (7 bit)
access : read
PD7IN : Input data of PD7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port E Input Register
address_offset : 0x4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PE0IN : Input data of PE0 is read out.
bits : 0 - 0 (1 bit)
access : read
PE1IN : Input data of PE1 is read out.
bits : 1 - 2 (2 bit)
access : read
PE2IN : Input data of PE2 is read out.
bits : 2 - 4 (3 bit)
access : read
PE3IN : Input data of PE3 is read out.
bits : 3 - 6 (4 bit)
access : read
PE4IN : Input data of PE4 is read out.
bits : 4 - 8 (5 bit)
access : read
PE5IN : Input data of PE5 is read out.
bits : 5 - 10 (6 bit)
access : read
PE6IN : Input data of PE6 is read out.
bits : 6 - 12 (7 bit)
access : read
PE7IN : Input data of PE7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port F Input Register
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0IN : Input data of PF0 is read out.
bits : 0 - 0 (1 bit)
access : read
PF1IN : Input data of PF1 is read out.
bits : 1 - 2 (2 bit)
access : read
PF2IN : Input data of PF2 is read out.
bits : 2 - 4 (3 bit)
access : read
PF3IN : Input data of PF3 is read out.
bits : 3 - 6 (4 bit)
access : read
PF4IN : Input data of PF4 is read out.
bits : 4 - 8 (5 bit)
access : read
PF5IN : Input data of PF5 is read out.
bits : 5 - 10 (6 bit)
access : read
PF6IN : Input data of PF6 is read out.
bits : 6 - 12 (7 bit)
access : read
PF7IN : Input data of PF7 is read out.
bits : 7 - 14 (8 bit)
access : read
Port 5 Output Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50OUT : Set output data of P50
bits : 0 - 0 (1 bit)
access : read-write
P51OUT : Set output data of P51
bits : 1 - 2 (2 bit)
access : read-write
P52OUT : Set output data of P52
bits : 2 - 4 (3 bit)
access : read-write
P53OUT : Set output data of P53
bits : 3 - 6 (4 bit)
access : read-write
P54OUT : Set output data of P54
bits : 4 - 8 (5 bit)
access : read-write
P55OUT : Set output data of P55
bits : 5 - 10 (6 bit)
access : read-write
P56OUT : Set output data of P56
bits : 6 - 12 (7 bit)
access : read-write
P57OUT : Set output data of P57
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Output Enable Register
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00OE : P00 output enable
bits : 0 - 0 (1 bit)
access : read-write
P01OE : P01 output enable
bits : 1 - 2 (2 bit)
access : read-write
P02OE : P02 output enable
bits : 2 - 4 (3 bit)
access : read-write
P03OE : P03 output enable
bits : 3 - 6 (4 bit)
access : read-write
P04OE : P04 output enable
bits : 4 - 8 (5 bit)
access : read-write
P05OE : P05 output enable
bits : 5 - 10 (6 bit)
access : read-write
P06OE : P06 output enable
bits : 6 - 12 (7 bit)
access : read-write
P07OE : P07 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Output Enable Register
address_offset : 0x51 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10OE : P10 output enable
bits : 0 - 0 (1 bit)
access : read-write
P11OE : P11 output enable
bits : 1 - 2 (2 bit)
access : read-write
P12OE : P12 output enable
bits : 2 - 4 (3 bit)
access : read-write
P13OE : P13 output enable
bits : 3 - 6 (4 bit)
access : read-write
P14OE : P14 output enable
bits : 4 - 8 (5 bit)
access : read-write
P15OE : P15 output enable
bits : 5 - 10 (6 bit)
access : read-write
P16OE : P16 output enable
bits : 6 - 12 (7 bit)
access : read-write
P17OE : P17 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 2 Output Enable Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20OE : P20 output enable
bits : 0 - 0 (1 bit)
access : read-write
P21OE : P21 output enable
bits : 1 - 2 (2 bit)
access : read-write
P22OE : P22 output enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24OE : P24 output enable
bits : 4 - 8 (5 bit)
access : read-write
P25OE : P25 output enable
bits : 5 - 10 (6 bit)
access : read-write
P26OE : P26 output enable
bits : 6 - 12 (7 bit)
access : read-write
P27OE : P27 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 3 Output Enable Register
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30OE : P30 output enable
bits : 0 - 0 (1 bit)
access : read-write
P31OE : P31 output enable
bits : 1 - 2 (2 bit)
access : read-write
P32OE : P32 output enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34OE : P34 output enable
bits : 4 - 8 (5 bit)
access : read-write
P35OE : P35 output enable
bits : 5 - 10 (6 bit)
access : read-write
P36OE : P36 output enable
bits : 6 - 12 (7 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Output Enable Register
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40OE : P40 output enable
bits : 0 - 0 (1 bit)
access : read-write
P41OE : P41 output enable
bits : 1 - 2 (2 bit)
access : read-write
P42OE : P42 output enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44OE : P44 output enable
bits : 4 - 8 (5 bit)
access : read-write
P45OE : P45 output enable
bits : 5 - 10 (6 bit)
access : read-write
P46OE : P46 output enable
bits : 6 - 12 (7 bit)
access : read-write
P47OE : P47 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 5 Output Enable Register
address_offset : 0x55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50OE : P50 output enable
bits : 0 - 0 (1 bit)
access : read-write
P51OE : P51 output enable
bits : 1 - 2 (2 bit)
access : read-write
P52OE : P52 output enable
bits : 2 - 4 (3 bit)
access : read-write
P53OE : P53 output enable
bits : 3 - 6 (4 bit)
access : read-write
P54OE : P54 output enable
bits : 4 - 8 (5 bit)
access : read-write
P55OE : P55 output enable
bits : 5 - 10 (6 bit)
access : read-write
P56OE : P56 output enable
bits : 6 - 12 (7 bit)
access : read-write
P57OE : P57 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 6 Output Enable Register
address_offset : 0x56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60OE : P60 output enable
bits : 0 - 0 (1 bit)
access : read-write
P61OE : P61 output enable
bits : 1 - 2 (2 bit)
access : read-write
P62OE : P62 output enable
bits : 2 - 4 (3 bit)
access : read-write
P63OE : P63 output enable
bits : 3 - 6 (4 bit)
access : read-write
P64OE : P64 output enable
bits : 4 - 8 (5 bit)
access : read-write
P65OE : P65 output enable
bits : 5 - 10 (6 bit)
access : read-write
P66OE : P66 output enable
bits : 6 - 12 (7 bit)
access : read-write
P67OE : P67 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 7 Output Enable Register
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70OE : P70 output enable
bits : 0 - 0 (1 bit)
access : read-write
P71OE : P71 output enable
bits : 1 - 2 (2 bit)
access : read-write
P72OE : P72 output enable
bits : 2 - 4 (3 bit)
access : read-write
P73OE : P73 output enable
bits : 3 - 6 (4 bit)
access : read-write
P74OE : P74 output enable
bits : 4 - 8 (5 bit)
access : read-write
P75OE : P75 output enable
bits : 5 - 10 (6 bit)
access : read-write
P76OE : P76 output enable
bits : 6 - 12 (7 bit)
access : read-write
P77OE : P77 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 8 Output Enable Register
address_offset : 0x58 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80OE : P80 output enable
bits : 0 - 0 (1 bit)
access : read-write
P81OE : P81 output enable
bits : 1 - 2 (2 bit)
access : read-write
P82OE : P82 output enable
bits : 2 - 4 (3 bit)
access : read-write
P83OE : P83 output enable
bits : 3 - 6 (4 bit)
access : read-write
P84OE : P84 output enable
bits : 4 - 8 (5 bit)
access : read-write
P85OE : P85 output enable
bits : 5 - 10 (6 bit)
access : read-write
P86OE : P86 output enable
bits : 6 - 12 (7 bit)
access : read-write
P87OE : P87 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 9 Output Enable Register
address_offset : 0x59 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90OE : P90 output enable
bits : 0 - 0 (1 bit)
access : read-write
P91OE : P91 output enable
bits : 1 - 2 (2 bit)
access : read-write
P92OE : P92 output enable
bits : 2 - 4 (3 bit)
access : read-write
P93OE : P93 output enable
bits : 3 - 6 (4 bit)
access : read-write
P94OE : P94 output enable
bits : 4 - 8 (5 bit)
access : read-write
P95OE : P95 output enable
bits : 5 - 10 (6 bit)
access : read-write
P96OE : P96 output enable
bits : 6 - 12 (7 bit)
access : read-write
P97OE : P97 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port A Output Enable Register
address_offset : 0x5A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0OE : PA0 output enable
bits : 0 - 0 (1 bit)
access : read-write
PA1OE : PA1 output enable
bits : 1 - 2 (2 bit)
access : read-write
PA2OE : PA2 output enable
bits : 2 - 4 (3 bit)
access : read-write
PA3OE : PA3 output enable
bits : 3 - 6 (4 bit)
access : read-write
PA4OE : PA4 output enable
bits : 4 - 8 (5 bit)
access : read-write
PA5OE : PA5 output enable
bits : 5 - 10 (6 bit)
access : read-write
PA6OE : PA6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PA7OE : PA7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port B Output Enable Register
address_offset : 0x5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0OE : PB0 output enable
bits : 0 - 0 (1 bit)
access : read-write
PB1OE : PB1 output enable
bits : 1 - 2 (2 bit)
access : read-write
PB2OE : PB2 output enable
bits : 2 - 4 (3 bit)
access : read-write
PB3OE : PB3 output enable
bits : 3 - 6 (4 bit)
access : read-write
PB4OE : PB4 output enable
bits : 4 - 8 (5 bit)
access : read-write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write
PB6OE : PB6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PB7OE : PB7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port C Output Enable Register
address_offset : 0x5C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4OE : PC4 output enable
bits : 4 - 8 (5 bit)
access : read-write
PC5OE : PC5 output enable
bits : 5 - 10 (6 bit)
access : read-write
PC6OE : PC6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PC7OE : PC7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port D Output Enable Register
address_offset : 0x5D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2OE : PD2 output enable
bits : 2 - 4 (3 bit)
access : read-write
PD3OE : PD3 output enable
bits : 3 - 6 (4 bit)
access : read-write
PD4OE : PD4 output enable
bits : 4 - 8 (5 bit)
access : read-write
PD5OE : PD5 output enable
bits : 5 - 10 (6 bit)
access : read-write
PD6OE : PD6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PD7OE : PD7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port E Output Enable Register
address_offset : 0x5E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2OE : PE2 output enable
bits : 2 - 4 (3 bit)
access : read-write
PE3OE : PE3 output enable
bits : 3 - 6 (4 bit)
access : read-write
PE4OE : PE4 output enable
bits : 4 - 8 (5 bit)
access : read-write
PE5OE : PE5 output enable
bits : 5 - 10 (6 bit)
access : read-write
PE6OE : PE6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PE7OE : PE7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port F Output Enable Register
address_offset : 0x5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0OE : PF0 output enable
bits : 0 - 0 (1 bit)
access : read-write
PF1OE : PF1 output enable
bits : 1 - 2 (2 bit)
access : read-write
PF2OE : PF2 output enable
bits : 2 - 4 (3 bit)
access : read-write
PF3OE : PF3 output enable
bits : 3 - 6 (4 bit)
access : read-write
PF4OE : PF4 output enable
bits : 4 - 8 (5 bit)
access : read-write
PF5OE : PF5 output enable
bits : 5 - 10 (6 bit)
access : read-write
PF6OE : PF6 output enable
bits : 6 - 12 (7 bit)
access : read-write
PF7OE : PF7 output enable
bits : 7 - 14 (8 bit)
access : read-write
Port 6 Output Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60OUT : Set output data of P60
bits : 0 - 0 (1 bit)
access : read-write
P61OUT : Set output data of P61
bits : 1 - 2 (2 bit)
access : read-write
P62OUT : Set output data of P62
bits : 2 - 4 (3 bit)
access : read-write
P63OUT : Set output data of P63
bits : 3 - 6 (4 bit)
access : read-write
P64OUT : Set output data of P64
bits : 4 - 8 (5 bit)
access : read-write
P65OUT : Set output data of P65
bits : 5 - 10 (6 bit)
access : read-write
P66OUT : Set output data of P66
bits : 6 - 12 (7 bit)
access : read-write
P67OUT : Set output data of P67
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Input Enable Register
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00IE : P00 input enable
bits : 0 - 0 (1 bit)
access : read-write
P01IE : P01 input enable
bits : 1 - 2 (2 bit)
access : read-write
P02IE : P02 input enable
bits : 2 - 4 (3 bit)
access : read-write
P03IE : P03 input enable
bits : 3 - 6 (4 bit)
access : read-write
P04IE : P04 input enable
bits : 4 - 8 (5 bit)
access : read-write
P05IE : P05 input enable
bits : 5 - 10 (6 bit)
access : read-write
P06IE : P06 input enable
bits : 6 - 12 (7 bit)
access : read-write
P07IE : P07 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Input Enable Register
address_offset : 0x61 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10IE : P10 input enable
bits : 0 - 0 (1 bit)
access : read-write
P11IE : P11 input enable
bits : 1 - 2 (2 bit)
access : read-write
P12IE : P12 input enable
bits : 2 - 4 (3 bit)
access : read-write
P13IE : P13 input enable
bits : 3 - 6 (4 bit)
access : read-write
P14IE : P14 input enable
bits : 4 - 8 (5 bit)
access : read-write
P15IE : P15 input enable
bits : 5 - 10 (6 bit)
access : read-write
P16IE : P16 input enable
bits : 6 - 12 (7 bit)
access : read-write
P17IE : P17 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 2 Input Enable Register
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20IE : P20 input enable
bits : 0 - 0 (1 bit)
access : read-write
P21IE : P21 input enable
bits : 1 - 2 (2 bit)
access : read-write
P22IE : P22 input enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24IE : P24 input enable
bits : 4 - 8 (5 bit)
access : read-write
P25IE : P25 input enable
bits : 5 - 10 (6 bit)
access : read-write
P26IE : P26 input enable
bits : 6 - 12 (7 bit)
access : read-write
P27IE : P27 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 3 Input Enable Register
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30IE : P30 input enable
bits : 0 - 0 (1 bit)
access : read-write
P31IE : P31 input enable
bits : 1 - 2 (2 bit)
access : read-write
P32IE : P32 input enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34IE : P34 input enable
bits : 4 - 8 (5 bit)
access : read-write
P35IE : P35 input enable
bits : 5 - 10 (6 bit)
access : read-write
P36IE : P36 input enable
bits : 6 - 12 (7 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Input Enable Register
address_offset : 0x64 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40IE : P40 input enable
bits : 0 - 0 (1 bit)
access : read-write
P41IE : P41 input enable
bits : 1 - 2 (2 bit)
access : read-write
P42IE : P42 input enable
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44IE : P44 input enable
bits : 4 - 8 (5 bit)
access : read-write
P45IE : P45 input enable
bits : 5 - 10 (6 bit)
access : read-write
P46IE : P46 input enable
bits : 6 - 12 (7 bit)
access : read-write
P47IE : P47 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 5 Input Enable Register
address_offset : 0x65 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50IE : P50 input enable
bits : 0 - 0 (1 bit)
access : read-write
P51IE : P51 input enable
bits : 1 - 2 (2 bit)
access : read-write
P52IE : P52 input enable
bits : 2 - 4 (3 bit)
access : read-write
P53IE : P53 input enable
bits : 3 - 6 (4 bit)
access : read-write
P54IE : P54 input enable
bits : 4 - 8 (5 bit)
access : read-write
P55IE : P55 input enable
bits : 5 - 10 (6 bit)
access : read-write
P56IE : P56 input enable
bits : 6 - 12 (7 bit)
access : read-write
P57IE : P57 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 6 Input Enable Register
address_offset : 0x66 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60IE : P60 input enable
bits : 0 - 0 (1 bit)
access : read-write
P61IE : P61 input enable
bits : 1 - 2 (2 bit)
access : read-write
P62IE : P62 input enable
bits : 2 - 4 (3 bit)
access : read-write
P63IE : P63 input enable
bits : 3 - 6 (4 bit)
access : read-write
P64IE : P64 input enable
bits : 4 - 8 (5 bit)
access : read-write
P65IE : P65 input enable
bits : 5 - 10 (6 bit)
access : read-write
P66IE : P66 input enable
bits : 6 - 12 (7 bit)
access : read-write
P67IE : P67 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 7 Input Enable Register
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70IE : P70 input enable
bits : 0 - 0 (1 bit)
access : read-write
P71IE : P71 input enable
bits : 1 - 2 (2 bit)
access : read-write
P72IE : P72 input enable
bits : 2 - 4 (3 bit)
access : read-write
P73IE : P73 input enable
bits : 3 - 6 (4 bit)
access : read-write
P74IE : P74 input enable
bits : 4 - 8 (5 bit)
access : read-write
P75IE : P75 input enable
bits : 5 - 10 (6 bit)
access : read-write
P76IE : P76 input enable
bits : 6 - 12 (7 bit)
access : read-write
P77IE : P77 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 8 Input Enable Register
address_offset : 0x68 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80IE : P80 input enable
bits : 0 - 0 (1 bit)
access : read-write
P81IE : P81 input enable
bits : 1 - 2 (2 bit)
access : read-write
P82IE : P82 input enable
bits : 2 - 4 (3 bit)
access : read-write
P83IE : P83 input enable
bits : 3 - 6 (4 bit)
access : read-write
P84IE : P84 input enable
bits : 4 - 8 (5 bit)
access : read-write
P85IE : P85 input enable
bits : 5 - 10 (6 bit)
access : read-write
P86IE : P86 input enable
bits : 6 - 12 (7 bit)
access : read-write
P87IE : P87 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 9 Input Enable Register
address_offset : 0x69 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90IE : P90 input enable
bits : 0 - 0 (1 bit)
access : read-write
P91IE : P91 input enable
bits : 1 - 2 (2 bit)
access : read-write
P92IE : P92 input enable
bits : 2 - 4 (3 bit)
access : read-write
P93IE : P93 input enable
bits : 3 - 6 (4 bit)
access : read-write
P94IE : P94 input enable
bits : 4 - 8 (5 bit)
access : read-write
P95IE : P95 input enable
bits : 5 - 10 (6 bit)
access : read-write
P96IE : P96 input enable
bits : 6 - 12 (7 bit)
access : read-write
P97IE : P97 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port A Input Enable Register
address_offset : 0x6A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0IE : PA0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PA1IE : PA1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PA2IE : PA2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PA3IE : PA3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PA4IE : PA4 input enable
bits : 4 - 8 (5 bit)
access : read-write
PA5IE : PA5 input enable
bits : 5 - 10 (6 bit)
access : read-write
PA6IE : PA6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PA7IE : PA7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port B Input Enable Register
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0IE : PB0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PB1IE : PB1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PB2IE : PB2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PB3IE : PB3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PB4IE : PB4 input enable
bits : 4 - 8 (5 bit)
access : read-write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write
PB6IE : PB6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PB7IE : PB7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port C Input Enable Register
address_offset : 0x6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PC0IE : PC0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PC1IE : PC1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PC2IE : PC2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PC3IE : PC3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PC4IE : PC4 input enable
bits : 4 - 8 (5 bit)
access : read-write
PC5IE : PC5 input enable
bits : 5 - 10 (6 bit)
access : read-write
PC6IE : PC6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PC7IE : PC7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port D Input Enable Register
address_offset : 0x6D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PD0IE : PD0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PD1IE : PD1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PD2IE : PD2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PD3IE : PD3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PD4IE : PD4 input enable
bits : 4 - 8 (5 bit)
access : read-write
PD5IE : PD5 input enable
bits : 5 - 10 (6 bit)
access : read-write
PD6IE : PD6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PD7IE : PD7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port E Input Enable Register
address_offset : 0x6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PE0IE : PE0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PE1IE : PE1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PE2IE : PE2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PE3IE : PE3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PE4IE : PE4 input enable
bits : 4 - 8 (5 bit)
access : read-write
PE5IE : PE5 input enable
bits : 5 - 10 (6 bit)
access : read-write
PE6IE : PE6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PE7IE : PE7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port F Input Enable Register
address_offset : 0x6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0IE : PF0 input enable
bits : 0 - 0 (1 bit)
access : read-write
PF1IE : PF1 input enable
bits : 1 - 2 (2 bit)
access : read-write
PF2IE : PF2 input enable
bits : 2 - 4 (3 bit)
access : read-write
PF3IE : PF3 input enable
bits : 3 - 6 (4 bit)
access : read-write
PF4IE : PF4 input enable
bits : 4 - 8 (5 bit)
access : read-write
PF5IE : PF5 input enable
bits : 5 - 10 (6 bit)
access : read-write
PF6IE : PF6 input enable
bits : 6 - 12 (7 bit)
access : read-write
PF7IE : PF7 input enable
bits : 7 - 14 (8 bit)
access : read-write
Port 7 Output Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70OUT : Set output data of P70
bits : 0 - 0 (1 bit)
access : read-write
P71OUT : Set output data of P71
bits : 1 - 2 (2 bit)
access : read-write
P72OUT : Set output data of P72
bits : 2 - 4 (3 bit)
access : read-write
P73OUT : Set output data of P73
bits : 3 - 6 (4 bit)
access : read-write
P74OUT : Set output data of P74
bits : 4 - 8 (5 bit)
access : read-write
P75OUT : Set output data of P75
bits : 5 - 10 (6 bit)
access : read-write
P76OUT : Set output data of P76
bits : 6 - 12 (7 bit)
access : read-write
P77OUT : Set output data of P77
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Nch Open-drain Control Register
address_offset : 0x70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 5 (6 bit)
access : read
P06ODC : P06 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write
P07ODC : P07 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Nch Open-drain Control Register
address_offset : 0x71 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10ODC : P10 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read
Port 2 Nch Open-drain Control Register
address_offset : 0x72 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 4 (5 bit)
access : read
P25ODC : P25 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write
P26ODC : P26 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write
P27ODC : P27 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write
Port 3 Nch Open-drain Control Register
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30ODC : P30 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write
P31ODC : P31 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 5 (4 bit)
access : read
P34ODC : P34 Nch open-drain selection
bits : 4 - 8 (5 bit)
access : read-write
P35ODC : P35 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 13 (8 bit)
access : read
Port 4 Nch Open-drain Control Register
address_offset : 0x74 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40ODC : P40 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write
P41ODC : P41 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 5 (4 bit)
access : read
P44ODC : P44 Nch open-drain selection
bits : 4 - 8 (5 bit)
access : read-write
P45ODC : P45 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 12 (7 bit)
access : read
P47ODC : P47 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write
Port 5 Nch Open-drain Control Register
address_offset : 0x75 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50ODC : P50 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 1 - 2 (2 bit)
access : read
P52ODC : P52 Nch open-drain selection
bits : 2 - 4 (3 bit)
access : read-write
P53ODC : P53 Nch open-drain selection
bits : 3 - 6 (4 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 4 - 8 (5 bit)
access : read
P55ODC : P55 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write
P56ODC : P56 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write
P57ODC : P57 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write
Port 6 Nch Open-drain Control Register
address_offset : 0x76 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 0 (1 bit)
access : read
P61ODC : P61 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write
P62ODC : P62 Nch open-drain selection
bits : 2 - 4 (3 bit)
access : read-write
P63ODC : P63 Nch open-drain selection
bits : 3 - 6 (4 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
Port 8 Output Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80OUT : Set output data of P80
bits : 0 - 0 (1 bit)
access : read-write
P81OUT : Set output data of P81
bits : 1 - 2 (2 bit)
access : read-write
P82OUT : Set output data of P82
bits : 2 - 4 (3 bit)
access : read-write
P83OUT : Set output data of P83
bits : 3 - 6 (4 bit)
access : read-write
P84OUT : Set output data of P84
bits : 4 - 8 (5 bit)
access : read-write
P85OUT : Set output data of P85
bits : 5 - 10 (6 bit)
access : read-write
P86OUT : Set output data of P86
bits : 6 - 12 (7 bit)
access : read-write
P87OUT : Set output data of P87
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Mode Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P00MD : P00 function selection
bits : 0 - 3 (4 bit)
access : read-write
P01MD : P01 function selection
bits : 4 - 11 (8 bit)
access : read-write
P02MD : P02 function selection
bits : 8 - 19 (12 bit)
access : read-write
P03MD : P03 function selection
bits : 12 - 27 (16 bit)
access : read-write
P04MD : P04 function selection
bits : 16 - 35 (20 bit)
access : read-write
P05MD : P05 function selection
bits : 20 - 43 (24 bit)
access : read-write
P06MD : P06 function selection
bits : 24 - 51 (28 bit)
access : read-write
P07MD : P07 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 1 Mode Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P10MD : P10 function selection
bits : 0 - 3 (4 bit)
access : read-write
P11MD : P11 function selection
bits : 4 - 11 (8 bit)
access : read-write
P12MD : P12 function selection
bits : 8 - 19 (12 bit)
access : read-write
P13MD : P13 function selection
bits : 12 - 27 (16 bit)
access : read-write
P14MD : P14 function selection
bits : 16 - 35 (20 bit)
access : read-write
P15MD : P15 function selection
bits : 20 - 43 (24 bit)
access : read-write
P16MD : P16 function selection
bits : 24 - 51 (28 bit)
access : read-write
P17MD : P17 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 2 Mode Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P20MD : P20 function selection
bits : 0 - 3 (4 bit)
access : read-write
P21MD : P21 function selection
bits : 4 - 11 (8 bit)
access : read-write
P22MD : P22 function selection
bits : 8 - 19 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
P24MD : P24 function selection
bits : 16 - 35 (20 bit)
access : read-write
P25MD : P25 function selection
bits : 20 - 43 (24 bit)
access : read-write
P26MD : P26 function selection
bits : 24 - 51 (28 bit)
access : read-write
P27MD : P27 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 3 Mode Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P30MD : P30 function selection
bits : 0 - 3 (4 bit)
access : read-write
P31MD : P31 function selection
bits : 4 - 11 (8 bit)
access : read-write
P32MD : P32 function selection
bits : 8 - 19 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
P34MD : P34 function selection
bits : 16 - 35 (20 bit)
access : read-write
P35MD : P35 function selection
bits : 20 - 43 (24 bit)
access : read-write
P36MD : P36 function selection
bits : 24 - 51 (28 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 28 - 59 (32 bit)
access : read
Port 9 Output Register
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90OUT : Set output data of P90
bits : 0 - 0 (1 bit)
access : read-write
P91OUT : Set output data of P91
bits : 1 - 2 (2 bit)
access : read-write
P92OUT : Set output data of P92
bits : 2 - 4 (3 bit)
access : read-write
P93OUT : Set output data of P93
bits : 3 - 6 (4 bit)
access : read-write
P94OUT : Set output data of P94
bits : 4 - 8 (5 bit)
access : read-write
P95OUT : Set output data of P95
bits : 5 - 10 (6 bit)
access : read-write
P96OUT : Set output data of P96
bits : 6 - 12 (7 bit)
access : read-write
P97OUT : Set output data of P97
bits : 7 - 14 (8 bit)
access : read-write
Port 4 Mode Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P40MD : P40 function selection
bits : 0 - 3 (4 bit)
access : read-write
P41MD : P41 function selection
bits : 4 - 11 (8 bit)
access : read-write
P42MD : P42 function selection
bits : 8 - 19 (12 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read
P44MD : P44 function selection
bits : 16 - 35 (20 bit)
access : read-write
P45MD : P45 function selection
bits : 20 - 43 (24 bit)
access : read-write
P46MD : P46 function selection
bits : 24 - 51 (28 bit)
access : read-write
P47MD : P47 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 5 Mode Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P50MD : P50 function selection
bits : 0 - 3 (4 bit)
access : read-write
P51MD : P51 function selection
bits : 4 - 11 (8 bit)
access : read-write
P52MD : P52 function selection
bits : 8 - 19 (12 bit)
access : read-write
P53MD : P53 function selection
bits : 12 - 27 (16 bit)
access : read-write
P54MD : P54 function selection
bits : 16 - 35 (20 bit)
access : read-write
P55MD : P55 function selection
bits : 20 - 43 (24 bit)
access : read-write
P56MD : P56 function selection
bits : 24 - 51 (28 bit)
access : read-write
P57MD : P57 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 6 Mode Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P60MD : P60 function selection
bits : 0 - 3 (4 bit)
access : read-write
P61MD : P61 function selection
bits : 4 - 11 (8 bit)
access : read-write
P62MD : P62 function selection
bits : 8 - 19 (12 bit)
access : read-write
P63MD : P63 function selection
bits : 12 - 27 (16 bit)
access : read-write
P64MD : P64 function selection
bits : 16 - 35 (20 bit)
access : read-write
P65MD : P65 function selection
bits : 20 - 43 (24 bit)
access : read-write
P66MD : P66 function selection
bits : 24 - 51 (28 bit)
access : read-write
P67MD : P67 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 7 Mode Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P70MD : P70 function selection
bits : 0 - 3 (4 bit)
access : read-write
P71MD : P71 function selection
bits : 4 - 11 (8 bit)
access : read-write
P72MD : P72 function selection
bits : 8 - 19 (12 bit)
access : read-write
P73MD : P73 function selection
bits : 12 - 27 (16 bit)
access : read-write
P74MD : P74 function selection
bits : 16 - 35 (20 bit)
access : read-write
P75MD : P75 function selection
bits : 20 - 43 (24 bit)
access : read-write
P76MD : P76 function selection
bits : 24 - 51 (28 bit)
access : read-write
P77MD : P77 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port A Output Register
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0OUT : Set output data of PA0
bits : 0 - 0 (1 bit)
access : read-write
PA1OUT : Set output data of PA1
bits : 1 - 2 (2 bit)
access : read-write
PA2OUT : Set output data of PA2
bits : 2 - 4 (3 bit)
access : read-write
PA3OUT : Set output data of PA3
bits : 3 - 6 (4 bit)
access : read-write
PA4OUT : Set output data of PA4
bits : 4 - 8 (5 bit)
access : read-write
PA5OUT : Set output data of PA5
bits : 5 - 10 (6 bit)
access : read-write
PA6OUT : Set output data of PA6
bits : 6 - 12 (7 bit)
access : read-write
PA7OUT : Set output data of PA7
bits : 7 - 14 (8 bit)
access : read-write
Port 8 Mode Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P80MD : P80 function selection
bits : 0 - 3 (4 bit)
access : read-write
P81MD : P81 function selection
bits : 4 - 11 (8 bit)
access : read-write
P82MD : P82 function selection
bits : 8 - 19 (12 bit)
access : read-write
P83MD : P83 function selection
bits : 12 - 27 (16 bit)
access : read-write
P84MD : P84 function selection
bits : 16 - 35 (20 bit)
access : read-write
P85MD : P85 function selection
bits : 20 - 43 (24 bit)
access : read-write
P86MD : P86 function selection
bits : 24 - 51 (28 bit)
access : read-write
P87MD : P87 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port 9 Mode Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
P90MD : P90 function selection
bits : 0 - 3 (4 bit)
access : read-write
P91MD : P91 function selection
bits : 4 - 11 (8 bit)
access : read-write
P92MD : P92 function selection
bits : 8 - 19 (12 bit)
access : read-write
P93MD : P93 function selection
bits : 12 - 27 (16 bit)
access : read-write
P94MD : P94 function selection
bits : 16 - 35 (20 bit)
access : read-write
P95MD : P95 function selection
bits : 20 - 43 (24 bit)
access : read-write
P96MD : P96 function selection
bits : 24 - 51 (28 bit)
access : read-write
P97MD : P97 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port A Mode Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PA0MD : PA0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PA1MD : PA1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PA2MD : PA2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PA3MD : PA3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PA4MD : PA4 function selection
bits : 16 - 35 (20 bit)
access : read-write
PA5MD : PA5 function selection
bits : 20 - 43 (24 bit)
access : read-write
PA6MD : PA6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PA7MD : PA7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port B Mode Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PB0MD : PB0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PB1MD : PB1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PB2MD : PB2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PB3MD : PB3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PB4MD : PB4 function selection
bits : 16 - 35 (20 bit)
access : read-write
__reserve0 : -
bits : 20 - 43 (24 bit)
access : read-write
PB6MD : PB6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PB7MD : PB7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port B Output Register
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0OUT : Set output data of PB0
bits : 0 - 0 (1 bit)
access : read-write
PB1OUT : Set output data of PB1
bits : 1 - 2 (2 bit)
access : read-write
PB2OUT : Set output data of PB2
bits : 2 - 4 (3 bit)
access : read-write
PB3OUT : Set output data of PB3
bits : 3 - 6 (4 bit)
access : read-write
PB4OUT : Set output data of PB4
bits : 4 - 8 (5 bit)
access : read-write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write
PB6OUT : Set output data of PB6
bits : 6 - 12 (7 bit)
access : read-write
PB7OUT : Set output data of PB7
bits : 7 - 14 (8 bit)
access : read-write
Port C Mode Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PC0MD : PC0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PC1MD : PC1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PC2MD : PC2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PC3MD : PC3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PC4MD : PC4 function selection
bits : 16 - 35 (20 bit)
access : read-write
PC5MD : PC5 function selection
bits : 20 - 43 (24 bit)
access : read-write
PC6MD : PC6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PC7MD : PC7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port D Mode Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PD0MD : PD0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PD1MD : PD1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PD2MD : PD2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PD3MD : PD3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PD4MD : PD4 function selection
bits : 16 - 35 (20 bit)
access : read-write
PD5MD : PD5 function selection
bits : 20 - 43 (24 bit)
access : read-write
PD6MD : PD6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PD7MD : PD7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port E Mode Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PE0MD : PE0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PE1MD : PE1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PE2MD : PE2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PE3MD : PE3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PE4MD : PE4 function selection
bits : 16 - 35 (20 bit)
access : read-write
PE5MD : PE5 function selection
bits : 20 - 43 (24 bit)
access : read-write
PE6MD : PE6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PE7MD : PE7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port F Mode Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
PF0MD : PF0 function selection
bits : 0 - 3 (4 bit)
access : read-write
PF1MD : PF1 function selection
bits : 4 - 11 (8 bit)
access : read-write
PF2MD : PF2 function selection
bits : 8 - 19 (12 bit)
access : read-write
PF3MD : PF3 function selection
bits : 12 - 27 (16 bit)
access : read-write
PF4MD : PF4 function selection
bits : 16 - 35 (20 bit)
access : read-write
PF5MD : PF5 function selection
bits : 20 - 43 (24 bit)
access : read-write
PF6MD : PF6 function selection
bits : 24 - 51 (28 bit)
access : read-write
PF7MD : PF7 function selection
bits : 28 - 59 (32 bit)
access : read-write
Port C Output Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4OUT : Set output data of PC4
bits : 4 - 8 (5 bit)
access : read-write
PC5OUT : Set output data of PC5
bits : 5 - 10 (6 bit)
access : read-write
PC6OUT : Set output data of PC6
bits : 6 - 12 (7 bit)
access : read-write
PC7OUT : Set output data of PC7
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Pull-up Control Register
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P00PLU : P00 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P01PLU : P01 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P02PLU : P02 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P03PLU : P03 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P04PLU : P04 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P05PLU : P05 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P06PLU : P06 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P07PLU : P07 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Pull-up Control Register
address_offset : 0xC1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P10PLU : P10 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P11PLU : P11 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P12PLU : P12 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P13PLU : P13 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P14PLU : P14 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P15PLU : P15 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P16PLU : P16 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P17PLU : P17 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 2 Pull-up Control Register
address_offset : 0xC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20PLU : P20 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P21PLU : P21 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P22PLU : P22 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P24PLU : P24 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P25PLU : P25 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P26PLU : P26 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P27PLU : P27 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 3 Pull-up Control Register
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P30PLU : P30 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P31PLU : P31 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P32PLU : P32 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P34PLU : P34 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P35PLU : P35 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P36PLU : P36 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read
Port 4 Pull-up Control Register
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P40PLU : P40 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P41PLU : P41 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P42PLU : P42 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read
P44PLU : P44 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P45PLU : P45 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P46PLU : P46 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P47PLU : P47 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 5 Pull-up Control Register
address_offset : 0xC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P50PLU : P50 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P51PLU : P51 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P52PLU : P52 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P53PLU : P53 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P54PLU : P54 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P55PLU : P55 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P56PLU : P56 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P57PLU : P57 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 6 Pull-up Control Register
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P60PLU : P60 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P61PLU : P61 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P62PLU : P62 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P63PLU : P63 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P64PLU : P64 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P65PLU : P65 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P66PLU : P66 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P67PLU : P67 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 7 Pull-up Control Register
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P70PLU : P70 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P71PLU : P71 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P72PLU : P72 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P73PLU : P73 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P74PLU : P74 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P75PLU : P75 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P76PLU : P76 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P77PLU : P77 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 8 Pull-up Control Register
address_offset : 0xC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P80PLU : P80 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P81PLU : P81 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P82PLU : P82 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P83PLU : P83 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P84PLU : P84 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P85PLU : P85 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P86PLU : P86 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P87PLU : P87 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port 9 Pull-up Control Register
address_offset : 0xC9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P90PLU : P90 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
P91PLU : P91 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
P92PLU : P92 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
P93PLU : P93 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
P94PLU : P94 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
P95PLU : P95 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
P96PLU : P96 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
P97PLU : P97 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port A Pull-up Control Register
address_offset : 0xCA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PA0PLU : PA0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
PA1PLU : PA1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
PA2PLU : PA2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
PA3PLU : PA3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
PA4PLU : PA4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
PA5PLU : PA5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
PA6PLU : PA6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PA7PLU : PA7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port B Pull-up Control Register
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PB0PLU : PB0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
PB1PLU : PB1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
PB2PLU : PB2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
PB3PLU : PB3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
PB4PLU : PB4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write
PB6PLU : PB6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PB7PLU : PB7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port C Pull-up Control Register
address_offset : 0xCC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read
PC4PLU : PC4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
PC5PLU : PC5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
PC6PLU : PC6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PC7PLU : PC7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port D Pull-up Control Register
address_offset : 0xCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2PLU : PD2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
PD3PLU : PD3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
PD4PLU : PD4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
PD5PLU : PD5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
PD6PLU : PD6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PD7PLU : PD7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port E Pull-up Control Register
address_offset : 0xCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2PLU : PE2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
PE3PLU : PE3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
PE4PLU : PE4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
PE5PLU : PE5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
PE6PLU : PE6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PE7PLU : PE7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port F Pull-up Control Register
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0PLU : PF0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write
PF1PLU : PF1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write
PF2PLU : PF2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write
PF3PLU : PF3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write
PF4PLU : PF4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write
PF5PLU : PF5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write
PF6PLU : PF6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write
PF7PLU : PF7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write
Port D Output Register
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PD2OUT : Set output data of PD2
bits : 2 - 4 (3 bit)
access : read-write
PD3OUT : Set output data of PD3
bits : 3 - 6 (4 bit)
access : read-write
PD4OUT : Set output data of PD4
bits : 4 - 8 (5 bit)
access : read-write
PD5OUT : Set output data of PD5
bits : 5 - 10 (6 bit)
access : read-write
PD6OUT : Set output data of PD6
bits : 6 - 12 (7 bit)
access : read-write
PD7OUT : Set output data of PD7
bits : 7 - 14 (8 bit)
access : read-write
Port E Output Register
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
PE2OUT : Set output data of PE2
bits : 2 - 4 (3 bit)
access : read-write
PE3OUT : Set output data of PE3
bits : 3 - 6 (4 bit)
access : read-write
PE4OUT : Set output data of PE4
bits : 4 - 8 (5 bit)
access : read-write
PE5OUT : Set output data of PE5
bits : 5 - 10 (6 bit)
access : read-write
PE6OUT : Set output data of PE6
bits : 6 - 12 (7 bit)
access : read-write
PE7OUT : Set output data of PE7
bits : 7 - 14 (8 bit)
access : read-write
Port 0 Input Level Selection Register
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 5 (6 bit)
access : read
P06ILV : P06 Input level selection
bits : 6 - 12 (7 bit)
access : read-write
P07ILV : P07 Input level selection
bits : 7 - 14 (8 bit)
access : read-write
Port 1 Input Level Selection Register
address_offset : 0xE1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
P12ILV : P12 Input level selection
bits : 2 - 4 (3 bit)
access : read-write
P13ILV : P13 Input level selection
bits : 3 - 6 (4 bit)
access : read-write
P14ILV : P14 Input level selection
bits : 4 - 8 (5 bit)
access : read-write
P15ILV : P15 Input level selection
bits : 5 - 10 (6 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 6 - 13 (8 bit)
access : read
Port 2 Input Level Selection Register
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
P20ILV : P20 Input level selection
bits : 0 - 0 (1 bit)
access : read-write
P21ILV : P21 Input level selection
bits : 1 - 2 (2 bit)
access : read-write
__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read
Port 5 Input Level Selection Register
address_offset : 0xE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read
P52ILV : P52 Input level selection
bits : 2 - 4 (3 bit)
access : read-write
P53ILV : P53 Input level selection
bits : 3 - 6 (4 bit)
access : read-write
__reserve1 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read
Port F Output Register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
PF0OUT : Set output data of PF0
bits : 0 - 0 (1 bit)
access : read-write
PF1OUT : Set output data of PF1
bits : 1 - 2 (2 bit)
access : read-write
PF2OUT : Set output data of PF2
bits : 2 - 4 (3 bit)
access : read-write
PF3OUT : Set output data of PF3
bits : 3 - 6 (4 bit)
access : read-write
PF4OUT : Set output data of PF4
bits : 4 - 8 (5 bit)
access : read-write
PF5OUT : Set output data of PF5
bits : 5 - 10 (6 bit)
access : read-write
PF6OUT : Set output data of PF6
bits : 6 - 12 (7 bit)
access : read-write
PF7OUT : Set output data of PF7
bits : 7 - 14 (8 bit)
access : read-write
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