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PORT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xE9 byte (0x0)
mem_usage : registers
protection :

Registers

IOP0OUT

IOP1OUT

IOP0CLR

IOP1CLR

IOP2CLR

IOP3CLR

IOP4CLR

IOP5CLR

IOP6CLR

IOP7CLR

IOP8CLR

IOP9CLR

IOPACLR

IOPBCLR

IOPCCLR

IOPDCLR

IOPECLR

IOPFCLR

IOP2OUT

IOP0SET

IOP1SET

IOP2SET

IOP3SET

IOP4SET

IOP5SET

IOP6SET

IOP7SET

IOP8SET

IOP9SET

IOPASET

IOPBSET

IOPCSET

IOPDSET

IOPESET

IOPFSET

IOP3OUT

IOP0TGL

IOP1TGL

IOP2TGL

IOP3TGL

IOP4TGL

IOP5TGL

IOP6TGL

IOP7TGL

IOP8TGL

IOP9TGL

IOPATGL

IOPBTGL

IOPCTGL

IOPDTGL

IOPETGL

IOPFTGL

IOP4OUT

IOP0IN

IOP1IN

IOP2IN

IOP3IN

IOP4IN

IOP5IN

IOP6IN

IOP7IN

IOP8IN

IOP9IN

IOPAIN

IOPBIN

IOPCIN

IOPDIN

IOPEIN

IOPFIN

IOP5OUT

IOP0OE

IOP1OE

IOP2OE

IOP3OE

IOP4OE

IOP5OE

IOP6OE

IOP7OE

IOP8OE

IOP9OE

IOPAOE

IOPBOE

IOPCOE

IOPDOE

IOPEOE

IOPFOE

IOP6OUT

IOP0IE

IOP1IE

IOP2IE

IOP3IE

IOP4IE

IOP5IE

IOP6IE

IOP7IE

IOP8IE

IOP9IE

IOPAIE

IOPBIE

IOPCIE

IOPDIE

IOPEIE

IOPFIE

IOP7OUT

IOP0ODC

IOP1ODC

IOP2ODC

IOP3ODC

IOP4ODC

IOP5ODC

IOP6ODC

IOP8OUT

IOP0MD

IOP1MD

IOP2MD

IOP3MD

IOP9OUT

IOP4MD

IOP5MD

IOP6MD

IOP7MD

IOPAOUT

IOP8MD

IOP9MD

IOPAMD

IOPBMD

IOPBOUT

IOPCMD

IOPDMD

IOPEMD

IOPFMD

IOPCOUT

IOP0PLU

IOP1PLU

IOP2PLU

IOP3PLU

IOP4PLU

IOP5PLU

IOP6PLU

IOP7PLU

IOP8PLU

IOP9PLU

IOPAPLU

IOPBPLU

IOPCPLU

IOPDPLU

IOPEPLU

IOPFPLU

IOPDOUT

IOPEOUT

IOP0ILV

IOP1ILV

IOP2ILV

IOP5ILV

IOPFOUT


IOP0OUT

Port 0 Output Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0OUT IOP0OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00OUT P01OUT P02OUT P03OUT P04OUT P05OUT P06OUT P07OUT

P00OUT : Set output data of P00
bits : 0 - 0 (1 bit)
access : read-write

P01OUT : Set output data of P01
bits : 1 - 2 (2 bit)
access : read-write

P02OUT : Set output data of P02
bits : 2 - 4 (3 bit)
access : read-write

P03OUT : Set output data of P03
bits : 3 - 6 (4 bit)
access : read-write

P04OUT : Set output data of P04
bits : 4 - 8 (5 bit)
access : read-write

P05OUT : Set output data of P05
bits : 5 - 10 (6 bit)
access : read-write

P06OUT : Set output data of P06
bits : 6 - 12 (7 bit)
access : read-write

P07OUT : Set output data of P07
bits : 7 - 14 (8 bit)
access : read-write


IOP1OUT

Port 1 Output Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1OUT IOP1OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10OUT P11OUT P12OUT P13OUT P14OUT P15OUT P16OUT P17OUT

P10OUT : Set output data of P10
bits : 0 - 0 (1 bit)
access : read-write

P11OUT : Set output data of P11
bits : 1 - 2 (2 bit)
access : read-write

P12OUT : Set output data of P12
bits : 2 - 4 (3 bit)
access : read-write

P13OUT : Set output data of P13
bits : 3 - 6 (4 bit)
access : read-write

P14OUT : Set output data of P14
bits : 4 - 8 (5 bit)
access : read-write

P15OUT : Set output data of P15
bits : 5 - 10 (6 bit)
access : read-write

P16OUT : Set output data of P16
bits : 6 - 12 (7 bit)
access : read-write

P17OUT : Set output data of P17
bits : 7 - 14 (8 bit)
access : read-write


IOP0CLR

Port 0 Output Clear Register
address_offset : 0x10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0CLR IOP0CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00CLR P01CLR P02CLR P03CLR P04CLR P05CLR P06CLR P07CLR

P00CLR : Clear P00OUT
bits : 0 - 0 (1 bit)
access : write

P01CLR : Clear P01OUT
bits : 1 - 2 (2 bit)
access : write

P02CLR : Clear P02OUT
bits : 2 - 4 (3 bit)
access : write

P03CLR : Clear P03OUT
bits : 3 - 6 (4 bit)
access : write

P04CLR : Clear P04OUT
bits : 4 - 8 (5 bit)
access : write

P05CLR : Clear P05OUT
bits : 5 - 10 (6 bit)
access : write

P06CLR : Clear P06OUT
bits : 6 - 12 (7 bit)
access : write

P07CLR : Clear P07OUT
bits : 7 - 14 (8 bit)
access : write


IOP1CLR

Port 1 Output Clear Register
address_offset : 0x11 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1CLR IOP1CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10CLR P11CLR P12CLR P13CLR P14CLR P15CLR P16CLR P17CLR

P10CLR : Clear P10OUT
bits : 0 - 0 (1 bit)
access : write

P11CLR : Clear P11OUT
bits : 1 - 2 (2 bit)
access : write

P12CLR : Clear P12OUT
bits : 2 - 4 (3 bit)
access : write

P13CLR : Clear P13OUT
bits : 3 - 6 (4 bit)
access : write

P14CLR : Clear P14OUT
bits : 4 - 8 (5 bit)
access : write

P15CLR : Clear P15OUT
bits : 5 - 10 (6 bit)
access : write

P16CLR : Clear P16OUT
bits : 6 - 12 (7 bit)
access : write

P17CLR : Clear P17OUT
bits : 7 - 14 (8 bit)
access : write


IOP2CLR

Port 2 Output Clear Register
address_offset : 0x12 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2CLR IOP2CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20CLR P21CLR P22CLR __reserve0 P24CLR P25CLR P26CLR P27CLR

P20CLR : Clear P20OUT
bits : 0 - 0 (1 bit)
access : write

P21CLR : Clear P21OUT
bits : 1 - 2 (2 bit)
access : write

P22CLR : Clear P22OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24CLR : Clear P24OUT
bits : 4 - 8 (5 bit)
access : write

P25CLR : Clear P25OUT
bits : 5 - 10 (6 bit)
access : write

P26CLR : Clear P26OUT
bits : 6 - 12 (7 bit)
access : write

P27CLR : Clear P27OUT
bits : 7 - 14 (8 bit)
access : write


IOP3CLR

Port 3 Output Clear Register
address_offset : 0x13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3CLR IOP3CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30CLR P31CLR P32CLR __reserve0 P34CLR P35CLR P36CLR __reserve1

P30CLR : Clear P30OUT
bits : 0 - 0 (1 bit)
access : write

P31CLR : Clear P31OUT
bits : 1 - 2 (2 bit)
access : write

P32CLR : Clear P32OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34CLR : Clear P34OUT
bits : 4 - 8 (5 bit)
access : write

P35CLR : Clear P35OUT
bits : 5 - 10 (6 bit)
access : write

P36CLR : Clear P36OUT
bits : 6 - 12 (7 bit)
access : write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4CLR

Port 4 Output Clear Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4CLR IOP4CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40CLR P41CLR P42CLR __reserve0 P44CLR P45CLR P46CLR P47CLR

P40CLR : Clear P40OUT
bits : 0 - 0 (1 bit)
access : write

P41CLR : Clear P41OUT
bits : 1 - 2 (2 bit)
access : write

P42CLR : Clear P42OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44CLR : Clear P44OUT
bits : 4 - 8 (5 bit)
access : write

P45CLR : Clear P45OUT
bits : 5 - 10 (6 bit)
access : write

P46CLR : Clear P46OUT
bits : 6 - 12 (7 bit)
access : write

P47CLR : Clear P47OUT
bits : 7 - 14 (8 bit)
access : write


IOP5CLR

Port 5 Output Clear Register
address_offset : 0x15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5CLR IOP5CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50CLR P51CLR P52CLR P53CLR P54CLR P55CLR P56CLR P57CLR

P50CLR : Clear P50OUT
bits : 0 - 0 (1 bit)
access : write

P51CLR : Clear P51OUT
bits : 1 - 2 (2 bit)
access : write

P52CLR : Clear P52OUT
bits : 2 - 4 (3 bit)
access : write

P53CLR : Clear P53OUT
bits : 3 - 6 (4 bit)
access : write

P54CLR : Clear P54OUT
bits : 4 - 8 (5 bit)
access : write

P55CLR : Clear P55OUT
bits : 5 - 10 (6 bit)
access : write

P56CLR : Clear P56OUT
bits : 6 - 12 (7 bit)
access : write

P57CLR : Clear P57OUT
bits : 7 - 14 (8 bit)
access : write


IOP6CLR

Port 6 Output Clear Register
address_offset : 0x16 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6CLR IOP6CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60CLR P61CLR P62CLR P63CLR P64CLR P65CLR P66CLR P67CLR

P60CLR : Clear P60OUT
bits : 0 - 0 (1 bit)
access : write

P61CLR : Clear P61OUT
bits : 1 - 2 (2 bit)
access : write

P62CLR : Clear P62OUT
bits : 2 - 4 (3 bit)
access : write

P63CLR : Clear P63OUT
bits : 3 - 6 (4 bit)
access : write

P64CLR : Clear P64OUT
bits : 4 - 8 (5 bit)
access : write

P65CLR : Clear P65OUT
bits : 5 - 10 (6 bit)
access : write

P66CLR : Clear P66OUT
bits : 6 - 12 (7 bit)
access : write

P67CLR : Clear P67OUT
bits : 7 - 14 (8 bit)
access : write


IOP7CLR

Port 7 Output Clear Register
address_offset : 0x17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7CLR IOP7CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70CLR P71CLR P72CLR P73CLR P74CLR P75CLR P76CLR P77CLR

P70CLR : Clear P70OUT
bits : 0 - 0 (1 bit)
access : write

P71CLR : Clear P71OUT
bits : 1 - 2 (2 bit)
access : write

P72CLR : Clear P72OUT
bits : 2 - 4 (3 bit)
access : write

P73CLR : Clear P73OUT
bits : 3 - 6 (4 bit)
access : write

P74CLR : Clear P74OUT
bits : 4 - 8 (5 bit)
access : write

P75CLR : Clear P75OUT
bits : 5 - 10 (6 bit)
access : write

P76CLR : Clear P76OUT
bits : 6 - 12 (7 bit)
access : write

P77CLR : Clear P77OUT
bits : 7 - 14 (8 bit)
access : write


IOP8CLR

Port 8 Output Clear Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8CLR IOP8CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80CLR P81CLR P82CLR P83CLR P84CLR P85CLR P86CLR P87CLR

P80CLR : Clear P80OUT
bits : 0 - 0 (1 bit)
access : write

P81CLR : Clear P81OUT
bits : 1 - 2 (2 bit)
access : write

P82CLR : Clear P82OUT
bits : 2 - 4 (3 bit)
access : write

P83CLR : Clear P83OUT
bits : 3 - 6 (4 bit)
access : write

P84CLR : Clear P84OUT
bits : 4 - 8 (5 bit)
access : write

P85CLR : Clear P85OUT
bits : 5 - 10 (6 bit)
access : write

P86CLR : Clear P86OUT
bits : 6 - 12 (7 bit)
access : write

P87CLR : Clear P87OUT
bits : 7 - 14 (8 bit)
access : write


IOP9CLR

Port 9 Output Clear Register
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9CLR IOP9CLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90CLR P91CLR P92CLR P93CLR P94CLR P95CLR P96CLR P97CLR

P90CLR : Clear P90OUT
bits : 0 - 0 (1 bit)
access : write

P91CLR : Clear P91OUT
bits : 1 - 2 (2 bit)
access : write

P92CLR : Clear P92OUT
bits : 2 - 4 (3 bit)
access : write

P93CLR : Clear P93OUT
bits : 3 - 6 (4 bit)
access : write

P94CLR : Clear P94OUT
bits : 4 - 8 (5 bit)
access : write

P95CLR : Clear P95OUT
bits : 5 - 10 (6 bit)
access : write

P96CLR : Clear P96OUT
bits : 6 - 12 (7 bit)
access : write

P97CLR : Clear P97OUT
bits : 7 - 14 (8 bit)
access : write


IOPACLR

Port A Output Clear Register
address_offset : 0x1A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPACLR IOPACLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0CLR PA1CLR PA2CLR PA3CLR PA4CLR PA5CLR PA6CLR PA7CLR

PA0CLR : Clear PA0OUT
bits : 0 - 0 (1 bit)
access : write

PA1CLR : Clear PA1OUT
bits : 1 - 2 (2 bit)
access : write

PA2CLR : Clear PA2OUT
bits : 2 - 4 (3 bit)
access : write

PA3CLR : Clear PA3OUT
bits : 3 - 6 (4 bit)
access : write

PA4CLR : Clear PA4OUT
bits : 4 - 8 (5 bit)
access : write

PA5CLR : Clear PA5OUT
bits : 5 - 10 (6 bit)
access : write

PA6CLR : Clear PA6OUT
bits : 6 - 12 (7 bit)
access : write

PA7CLR : Clear PA7OUT
bits : 7 - 14 (8 bit)
access : write


IOPBCLR

Port B Output Clear Register
address_offset : 0x1B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBCLR IOPBCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0CLR PB1CLR PB2CLR PB3CLR PB4CLR __reserve0 PB6CLR PB7CLR

PB0CLR : Clear PB0OUT
bits : 0 - 0 (1 bit)
access : write

PB1CLR : Clear PB1OUT
bits : 1 - 2 (2 bit)
access : write

PB2CLR : Clear PB2OUT
bits : 2 - 4 (3 bit)
access : write

PB3CLR : Clear PB3OUT
bits : 3 - 6 (4 bit)
access : write

PB4CLR : Clear PB4OUT
bits : 4 - 8 (5 bit)
access : write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : write

PB6CLR : Clear PB6OUT
bits : 6 - 12 (7 bit)
access : write

PB7CLR : Clear PB7OUT
bits : 7 - 14 (8 bit)
access : write


IOPCCLR

Port C Output Clear Register
address_offset : 0x1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCCLR IOPCCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4CLR PC5CLR PC6CLR PC7CLR

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4CLR : Clear PC4OUT
bits : 4 - 8 (5 bit)
access : write

PC5CLR : Clear PC5OUT
bits : 5 - 10 (6 bit)
access : write

PC6CLR : Clear PC6OUT
bits : 6 - 12 (7 bit)
access : write

PC7CLR : Clear PC7OUT
bits : 7 - 14 (8 bit)
access : write


IOPDCLR

Port D Output Clear Register
address_offset : 0x1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDCLR IOPDCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2CLR PD3CLR PD4CLR PD5CLR PD6CLR PD7CLR

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2CLR : Clear PD2OUT
bits : 2 - 4 (3 bit)
access : write

PD3CLR : Clear PD3OUT
bits : 3 - 6 (4 bit)
access : write

PD4CLR : Clear PD4OUT
bits : 4 - 8 (5 bit)
access : write

PD5CLR : Clear PD5OUT
bits : 5 - 10 (6 bit)
access : write

PD6CLR : Clear PD6OUT
bits : 6 - 12 (7 bit)
access : write

PD7CLR : Clear PD7OUT
bits : 7 - 14 (8 bit)
access : write


IOPECLR

Port E Output Clear Register
address_offset : 0x1E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPECLR IOPECLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2CLR PE3CLR PE4CLR PE5CLR PE6CLR PE7CLR

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2CLR : Clear PE2OUT
bits : 2 - 4 (3 bit)
access : write

PE3CLR : Clear PE3OUT
bits : 3 - 6 (4 bit)
access : write

PE4CLR : Clear PE4OUT
bits : 4 - 8 (5 bit)
access : write

PE5CLR : Clear PE5OUT
bits : 5 - 10 (6 bit)
access : write

PE6CLR : Clear PE6OUT
bits : 6 - 12 (7 bit)
access : write

PE7CLR : Clear PE7OUT
bits : 7 - 14 (8 bit)
access : write


IOPFCLR

Port F Output Clear Register
address_offset : 0x1F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFCLR IOPFCLR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0CLR PF1CLR PF2CLR PF3CLR PF4CLR PF5CLR PF6CLR PF7CLR

PF0CLR : Clear PF0OUT
bits : 0 - 0 (1 bit)
access : write

PF1CLR : Clear PF1OUT
bits : 1 - 2 (2 bit)
access : write

PF2CLR : Clear PF2OUT
bits : 2 - 4 (3 bit)
access : write

PF3CLR : Clear PF3OUT
bits : 3 - 6 (4 bit)
access : write

PF4CLR : Clear PF4OUT
bits : 4 - 8 (5 bit)
access : write

PF5CLR : Clear PF5OUT
bits : 5 - 10 (6 bit)
access : write

PF6CLR : Clear PF6OUT
bits : 6 - 12 (7 bit)
access : write

PF7CLR : Clear PF7OUT
bits : 7 - 14 (8 bit)
access : write


IOP2OUT

Port 2 Output Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2OUT IOP2OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20OUT P21OUT P22OUT __reserve0 P24OUT P25OUT P26OUT P27OUT

P20OUT : Set output data of P20
bits : 0 - 0 (1 bit)
access : read-write

P21OUT : Set output data of P21
bits : 1 - 2 (2 bit)
access : read-write

P22OUT : Set output data of P22
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24OUT : Set output data of P24
bits : 4 - 8 (5 bit)
access : read-write

P25OUT : Set output data of P25
bits : 5 - 10 (6 bit)
access : read-write

P26OUT : Set output data of P26
bits : 6 - 12 (7 bit)
access : read-write

P27OUT : Set output data of P27
bits : 7 - 14 (8 bit)
access : read-write


IOP0SET

Port 0 Output Set Register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0SET IOP0SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00SET P01SET P02SET P03SET P04SET P05SET P06SET P07SET

P00SET : Set P00OUT
bits : 0 - 0 (1 bit)
access : write

P01SET : Set P01OUT
bits : 1 - 2 (2 bit)
access : write

P02SET : Set P02OUT
bits : 2 - 4 (3 bit)
access : write

P03SET : Set P03OUT
bits : 3 - 6 (4 bit)
access : write

P04SET : Set P04OUT
bits : 4 - 8 (5 bit)
access : write

P05SET : Set P05OUT
bits : 5 - 10 (6 bit)
access : write

P06SET : Set P06OUT
bits : 6 - 12 (7 bit)
access : write

P07SET : Set P07OUT
bits : 7 - 14 (8 bit)
access : write


IOP1SET

Port 1 Output Set Register
address_offset : 0x21 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1SET IOP1SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10SET P11SET P12SET P13SET P14SET P15SET P16SET P17SET

P10SET : Set P10OUT
bits : 0 - 0 (1 bit)
access : write

P11SET : Set P11OUT
bits : 1 - 2 (2 bit)
access : write

P12SET : Set P12OUT
bits : 2 - 4 (3 bit)
access : write

P13SET : Set P13OUT
bits : 3 - 6 (4 bit)
access : write

P14SET : Set P14OUT
bits : 4 - 8 (5 bit)
access : write

P15SET : Set P15OUT
bits : 5 - 10 (6 bit)
access : write

P16SET : Set P16OUT
bits : 6 - 12 (7 bit)
access : write

P17SET : Set P17OUT
bits : 7 - 14 (8 bit)
access : write


IOP2SET

Port 2 Output Set Register
address_offset : 0x22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2SET IOP2SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20SET P21SET P22SET __reserve0 P24SET P25SET P26SET P27SET

P20SET : Set P20OUT
bits : 0 - 0 (1 bit)
access : write

P21SET : Set P21OUT
bits : 1 - 2 (2 bit)
access : write

P22SET : Set P22OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24SET : Set P24OUT
bits : 4 - 8 (5 bit)
access : write

P25SET : Set P25OUT
bits : 5 - 10 (6 bit)
access : write

P26SET : Set P26OUT
bits : 6 - 12 (7 bit)
access : write

P27SET : Set P27OUT
bits : 7 - 14 (8 bit)
access : write


IOP3SET

Port 3 Output Set Register
address_offset : 0x23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3SET IOP3SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30SET P31SET P32SET __reserve0 P34SET P35SET P36SET __reserve1

P30SET : Set P30OUT
bits : 0 - 0 (1 bit)
access : write

P31SET : Set P31OUT
bits : 1 - 2 (2 bit)
access : write

P32SET : Set P32OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34SET : Set P34OUT
bits : 4 - 8 (5 bit)
access : write

P35SET : Set P35OUT
bits : 5 - 10 (6 bit)
access : write

P36SET : Set P36OUT
bits : 6 - 12 (7 bit)
access : write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4SET

Port 4 Output Set Register
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4SET IOP4SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40SET P41SET P42SET __reserve0 P44SET P45SET P46SET P47SET

P40SET : Set P40OUT
bits : 0 - 0 (1 bit)
access : write

P41SET : Set P41OUT
bits : 1 - 2 (2 bit)
access : write

P42SET : Set P42OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44SET : Set P44OUT
bits : 4 - 8 (5 bit)
access : write

P45SET : Set P45OUT
bits : 5 - 10 (6 bit)
access : write

P46SET : Set P46OUT
bits : 6 - 12 (7 bit)
access : write

P47SET : Set P47OUT
bits : 7 - 14 (8 bit)
access : write


IOP5SET

Port 5 Output Set Register
address_offset : 0x25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5SET IOP5SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50SET P51SET P52SET P53SET P54SET P55SET P56SET P57SET

P50SET : Set P50OUT
bits : 0 - 0 (1 bit)
access : write

P51SET : Set P51OUT
bits : 1 - 2 (2 bit)
access : write

P52SET : Set P52OUT
bits : 2 - 4 (3 bit)
access : write

P53SET : Set P53OUT
bits : 3 - 6 (4 bit)
access : write

P54SET : Set P54OUT
bits : 4 - 8 (5 bit)
access : write

P55SET : Set P55OUT
bits : 5 - 10 (6 bit)
access : write

P56SET : Set P56OUT
bits : 6 - 12 (7 bit)
access : write

P57SET : Set P57OUT
bits : 7 - 14 (8 bit)
access : write


IOP6SET

Port 6 Output Set Register
address_offset : 0x26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6SET IOP6SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60SET P61SET P62SET P63SET P64SET P65SET P66SET P67SET

P60SET : Set P60OUT
bits : 0 - 0 (1 bit)
access : write

P61SET : Set P61OUT
bits : 1 - 2 (2 bit)
access : write

P62SET : Set P62OUT
bits : 2 - 4 (3 bit)
access : write

P63SET : Set P63OUT
bits : 3 - 6 (4 bit)
access : write

P64SET : Set P64OUT
bits : 4 - 8 (5 bit)
access : write

P65SET : Set P65OUT
bits : 5 - 10 (6 bit)
access : write

P66SET : Set P66OUT
bits : 6 - 12 (7 bit)
access : write

P67SET : Set P67OUT
bits : 7 - 14 (8 bit)
access : write


IOP7SET

Port 7 Output Set Register
address_offset : 0x27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7SET IOP7SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70SET P71SET P72SET P73SET P74SET P75SET P76SET P77SET

P70SET : Set P70OUT
bits : 0 - 0 (1 bit)
access : write

P71SET : Set P71OUT
bits : 1 - 2 (2 bit)
access : write

P72SET : Set P72OUT
bits : 2 - 4 (3 bit)
access : write

P73SET : Set P73OUT
bits : 3 - 6 (4 bit)
access : write

P74SET : Set P74OUT
bits : 4 - 8 (5 bit)
access : write

P75SET : Set P75OUT
bits : 5 - 10 (6 bit)
access : write

P76SET : Set P76OUT
bits : 6 - 12 (7 bit)
access : write

P77SET : Set P77OUT
bits : 7 - 14 (8 bit)
access : write


IOP8SET

Port 8 Output Set Register
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8SET IOP8SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80SET P81SET P82SET P83SET P84SET P85SET P86SET P87SET

P80SET : Set P80OUT
bits : 0 - 0 (1 bit)
access : write

P81SET : Set P81OUT
bits : 1 - 2 (2 bit)
access : write

P82SET : Set P82OUT
bits : 2 - 4 (3 bit)
access : write

P83SET : Set P83OUT
bits : 3 - 6 (4 bit)
access : write

P84SET : Set P84OUT
bits : 4 - 8 (5 bit)
access : write

P85SET : Set P85OUT
bits : 5 - 10 (6 bit)
access : write

P86SET : Set P86OUT
bits : 6 - 12 (7 bit)
access : write

P87SET : Set P87OUT
bits : 7 - 14 (8 bit)
access : write


IOP9SET

Port 9 Output Set Register
address_offset : 0x29 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9SET IOP9SET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90SET P91SET P92SET P93SET P94SET P95SET P96SET P97SET

P90SET : Set P90OUT
bits : 0 - 0 (1 bit)
access : write

P91SET : Set P91OUT
bits : 1 - 2 (2 bit)
access : write

P92SET : Set P92OUT
bits : 2 - 4 (3 bit)
access : write

P93SET : Set P93OUT
bits : 3 - 6 (4 bit)
access : write

P94SET : Set P94OUT
bits : 4 - 8 (5 bit)
access : write

P95SET : Set P95OUT
bits : 5 - 10 (6 bit)
access : write

P96SET : Set P96OUT
bits : 6 - 12 (7 bit)
access : write

P97SET : Set P97OUT
bits : 7 - 14 (8 bit)
access : write


IOPASET

Port A Output Set Register
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPASET IOPASET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0SET PA1SET PA2SET PA3SET PA4SET PA5SET PA6SET PA7SET

PA0SET : Set PA0OUT
bits : 0 - 0 (1 bit)
access : write

PA1SET : Set PA1OUT
bits : 1 - 2 (2 bit)
access : write

PA2SET : Set PA2OUT
bits : 2 - 4 (3 bit)
access : write

PA3SET : Set PA3OUT
bits : 3 - 6 (4 bit)
access : write

PA4SET : Set PA4OUT
bits : 4 - 8 (5 bit)
access : write

PA5SET : Set PA5OUT
bits : 5 - 10 (6 bit)
access : write

PA6SET : Set PA6OUT
bits : 6 - 12 (7 bit)
access : write

PA7SET : Set PA7OUT
bits : 7 - 14 (8 bit)
access : write


IOPBSET

Port B Output Set Register
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBSET IOPBSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0SET PB1SET PB2SET PB3SET PB4SET __reserve0 PB6SET PB7SET

PB0SET : Set PB0OUT
bits : 0 - 0 (1 bit)
access : write

PB1SET : Set PB1OUT
bits : 1 - 2 (2 bit)
access : write

PB2SET : Set PB2OUT
bits : 2 - 4 (3 bit)
access : write

PB3SET : Set PB3OUT
bits : 3 - 6 (4 bit)
access : write

PB4SET : Set PB4OUT
bits : 4 - 8 (5 bit)
access : write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : write

PB6SET : Set PB6OUT
bits : 6 - 12 (7 bit)
access : write

PB7SET : Set PB7OUT
bits : 7 - 14 (8 bit)
access : write


IOPCSET

Port C Output Set Register
address_offset : 0x2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCSET IOPCSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4SET PC5SET PC6SET PC7SET

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4SET : Set PC4OUT
bits : 4 - 8 (5 bit)
access : write

PC5SET : Set PC5OUT
bits : 5 - 10 (6 bit)
access : write

PC6SET : Set PC6OUT
bits : 6 - 12 (7 bit)
access : write

PC7SET : Set PC7OUT
bits : 7 - 14 (8 bit)
access : write


IOPDSET

Port D Output Set Register
address_offset : 0x2D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDSET IOPDSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2SET PD3SET PD4SET PD5SET PD6SET PD7SET

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2SET : Set PD2OUT
bits : 2 - 4 (3 bit)
access : write

PD3SET : Set PD3OUT
bits : 3 - 6 (4 bit)
access : write

PD4SET : Set PD4OUT
bits : 4 - 8 (5 bit)
access : write

PD5SET : Set PD5OUT
bits : 5 - 10 (6 bit)
access : write

PD6SET : Set PD6OUT
bits : 6 - 12 (7 bit)
access : write

PD7SET : Set PD7OUT
bits : 7 - 14 (8 bit)
access : write


IOPESET

Port E Output Set Register
address_offset : 0x2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPESET IOPESET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2SET PE3SET PE4SET PE5SET PE6SET PE7SET

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2SET : Set PE2OUT
bits : 2 - 4 (3 bit)
access : write

PE3SET : Set PE3OUT
bits : 3 - 6 (4 bit)
access : write

PE4SET : Set PE4OUT
bits : 4 - 8 (5 bit)
access : write

PE5SET : Set PE5OUT
bits : 5 - 10 (6 bit)
access : write

PE6SET : Set PE6OUT
bits : 6 - 12 (7 bit)
access : write

PE7SET : Set PE7OUT
bits : 7 - 14 (8 bit)
access : write


IOPFSET

Port F Output Set Register
address_offset : 0x2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFSET IOPFSET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0SET PF1SET PF2SET PF3SET PF4SET PF5SET PF6SET PF7SET

PF0SET : Set PF0OUT
bits : 0 - 0 (1 bit)
access : write

PF1SET : Set PF1OUT
bits : 1 - 2 (2 bit)
access : write

PF2SET : Set PF2OUT
bits : 2 - 4 (3 bit)
access : write

PF3SET : Set PF3OUT
bits : 3 - 6 (4 bit)
access : write

PF4SET : Set PF4OUT
bits : 4 - 8 (5 bit)
access : write

PF5SET : Set PF5OUT
bits : 5 - 10 (6 bit)
access : write

PF6SET : Set PF6OUT
bits : 6 - 12 (7 bit)
access : write

PF7SET : Set PF7OUT
bits : 7 - 14 (8 bit)
access : write


IOP3OUT

Port 3 Output Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3OUT IOP3OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30OUT P31OUT P32OUT __reserve0 P34OUT P35OUT P36OUT __reserve1

P30OUT : Set output data of P30
bits : 0 - 0 (1 bit)
access : read-write

P31OUT : Set output data of P31
bits : 1 - 2 (2 bit)
access : read-write

P32OUT : Set output data of P32
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34OUT : Set output data of P34
bits : 4 - 8 (5 bit)
access : read-write

P35OUT : Set output data of P35
bits : 5 - 10 (6 bit)
access : read-write

P36OUT : Set output data of P36
bits : 6 - 12 (7 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP0TGL

Port 0 Output Toggle Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0TGL IOP0TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00TGL P01TGL P02TGL P03TGL P04TGL P05TGL P06TGL P07TGL

P00TGL : Invert P00OUT
bits : 0 - 0 (1 bit)
access : write

P01TGL : Invert P01OUT
bits : 1 - 2 (2 bit)
access : write

P02TGL : Invert P02OUT
bits : 2 - 4 (3 bit)
access : write

P03TGL : Invert P03OUT
bits : 3 - 6 (4 bit)
access : write

P04TGL : Invert P04OUT
bits : 4 - 8 (5 bit)
access : write

P05TGL : Invert P05OUT
bits : 5 - 10 (6 bit)
access : write

P06TGL : Invert P06OUT
bits : 6 - 12 (7 bit)
access : write

P07TGL : Invert P07OUT
bits : 7 - 14 (8 bit)
access : write


IOP1TGL

Port 1 Output Toggle Register
address_offset : 0x31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1TGL IOP1TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10TGL P11TGL P12TGL P13TGL P14TGL P15TGL P16TGL P17TGL

P10TGL : Invert P10OUT
bits : 0 - 0 (1 bit)
access : write

P11TGL : Invert P11OUT
bits : 1 - 2 (2 bit)
access : write

P12TGL : Invert P12OUT
bits : 2 - 4 (3 bit)
access : write

P13TGL : Invert P13OUT
bits : 3 - 6 (4 bit)
access : write

P14TGL : Invert P14OUT
bits : 4 - 8 (5 bit)
access : write

P15TGL : Invert P15OUT
bits : 5 - 10 (6 bit)
access : write

P16TGL : Invert P16OUT
bits : 6 - 12 (7 bit)
access : write

P17TGL : Invert P17OUT
bits : 7 - 14 (8 bit)
access : write


IOP2TGL

Port 2 Output Toggle Register
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2TGL IOP2TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20TGL P21TGL P22TGL __reserve0 P24TGL P25TGL P26TGL P27TGL

P20TGL : Invert P20OUT
bits : 0 - 0 (1 bit)
access : write

P21TGL : Invert P21OUT
bits : 1 - 2 (2 bit)
access : write

P22TGL : Invert P22OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24TGL : Invert P24OUT
bits : 4 - 8 (5 bit)
access : write

P25TGL : Invert P25OUT
bits : 5 - 10 (6 bit)
access : write

P26TGL : Invert P26OUT
bits : 6 - 12 (7 bit)
access : write

P27TGL : Invert P27OUT
bits : 7 - 14 (8 bit)
access : write


IOP3TGL

Port 3 Output Toggle Register
address_offset : 0x33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3TGL IOP3TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30TGL P31TGL P32TGL __reserve0 P34TGL P35TGL P36TGL __reserve1

P30TGL : Invert P30OUT
bits : 0 - 0 (1 bit)
access : write

P31TGL : Invert P31OUT
bits : 1 - 2 (2 bit)
access : write

P32TGL : Invert P32OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34TGL : Invert P34OUT
bits : 4 - 8 (5 bit)
access : write

P35TGL : Invert P35OUT
bits : 5 - 10 (6 bit)
access : write

P36TGL : Invert P36OUT
bits : 6 - 12 (7 bit)
access : write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4TGL

Port 4 Output Toggle Register
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4TGL IOP4TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40TGL P41TGL P42TGL __reserve0 P44TGL P45TGL P46TGL P47TGL

P40TGL : Invert P40OUT
bits : 0 - 0 (1 bit)
access : write

P41TGL : Invert P41OUT
bits : 1 - 2 (2 bit)
access : write

P42TGL : Invert P42OUT
bits : 2 - 4 (3 bit)
access : write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44TGL : Invert P44OUT
bits : 4 - 8 (5 bit)
access : write

P45TGL : Invert P45OUT
bits : 5 - 10 (6 bit)
access : write

P46TGL : Invert P46OUT
bits : 6 - 12 (7 bit)
access : write

P47TGL : Invert P47OUT
bits : 7 - 14 (8 bit)
access : write


IOP5TGL

Port 5 Output Toggle Register
address_offset : 0x35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5TGL IOP5TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50TGL P51TGL P52TGL P53TGL P54TGL P55TGL P56TGL P57TGL

P50TGL : Invert P50OUT
bits : 0 - 0 (1 bit)
access : write

P51TGL : Invert P51OUT
bits : 1 - 2 (2 bit)
access : write

P52TGL : Invert P52OUT
bits : 2 - 4 (3 bit)
access : write

P53TGL : Invert P53OUT
bits : 3 - 6 (4 bit)
access : write

P54TGL : Invert P54OUT
bits : 4 - 8 (5 bit)
access : write

P55TGL : Invert P55OUT
bits : 5 - 10 (6 bit)
access : write

P56TGL : Invert P56OUT
bits : 6 - 12 (7 bit)
access : write

P57TGL : Invert P57OUT
bits : 7 - 14 (8 bit)
access : write


IOP6TGL

Port 6 Output Toggle Register
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6TGL IOP6TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60TGL P61TGL P62TGL P63TGL P64TGL P65TGL P66TGL P67TGL

P60TGL : Invert P60OUT
bits : 0 - 0 (1 bit)
access : write

P61TGL : Invert P61OUT
bits : 1 - 2 (2 bit)
access : write

P62TGL : Invert P62OUT
bits : 2 - 4 (3 bit)
access : write

P63TGL : Invert P63OUT
bits : 3 - 6 (4 bit)
access : write

P64TGL : Invert P64OUT
bits : 4 - 8 (5 bit)
access : write

P65TGL : Invert P65OUT
bits : 5 - 10 (6 bit)
access : write

P66TGL : Invert P66OUT
bits : 6 - 12 (7 bit)
access : write

P67TGL : Invert P67OUT
bits : 7 - 14 (8 bit)
access : write


IOP7TGL

Port 7 Output Toggle Register
address_offset : 0x37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7TGL IOP7TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70TGL P71TGL P72TGL P73TGL P74TGL P75TGL P76TGL P77TGL

P70TGL : Invert P70OUT
bits : 0 - 0 (1 bit)
access : write

P71TGL : Invert P71OUT
bits : 1 - 2 (2 bit)
access : write

P72TGL : Invert P72OUT
bits : 2 - 4 (3 bit)
access : write

P73TGL : Invert P73OUT
bits : 3 - 6 (4 bit)
access : write

P74TGL : Invert P74OUT
bits : 4 - 8 (5 bit)
access : write

P75TGL : Invert P75OUT
bits : 5 - 10 (6 bit)
access : write

P76TGL : Invert P76OUT
bits : 6 - 12 (7 bit)
access : write

P77TGL : Invert P77OUT
bits : 7 - 14 (8 bit)
access : write


IOP8TGL

Port 8 Output Toggle Register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8TGL IOP8TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80TGL P81TGL P82TGL P83TGL P84TGL P85TGL P86TGL P87TGL

P80TGL : Invert P80OUT
bits : 0 - 0 (1 bit)
access : write

P81TGL : Invert P81OUT
bits : 1 - 2 (2 bit)
access : write

P82TGL : Invert P82OUT
bits : 2 - 4 (3 bit)
access : write

P83TGL : Invert P83OUT
bits : 3 - 6 (4 bit)
access : write

P84TGL : Invert P84OUT
bits : 4 - 8 (5 bit)
access : write

P85TGL : Invert P85OUT
bits : 5 - 10 (6 bit)
access : write

P86TGL : Invert P86OUT
bits : 6 - 12 (7 bit)
access : write

P87TGL : Invert P87OUT
bits : 7 - 14 (8 bit)
access : write


IOP9TGL

Port 9 Output Toggle Register
address_offset : 0x39 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9TGL IOP9TGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90TGL P91TGL P92TGL P93TGL P94TGL P95TGL P96TGL P97TGL

P90TGL : Invert P90OUT
bits : 0 - 0 (1 bit)
access : write

P91TGL : Invert P91OUT
bits : 1 - 2 (2 bit)
access : write

P92TGL : Invert P92OUT
bits : 2 - 4 (3 bit)
access : write

P93TGL : Invert P93OUT
bits : 3 - 6 (4 bit)
access : write

P94TGL : Invert P94OUT
bits : 4 - 8 (5 bit)
access : write

P95TGL : Invert P95OUT
bits : 5 - 10 (6 bit)
access : write

P96TGL : Invert P96OUT
bits : 6 - 12 (7 bit)
access : write

P97TGL : Invert P97OUT
bits : 7 - 14 (8 bit)
access : write


IOPATGL

Port A Output Toggle Register
address_offset : 0x3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPATGL IOPATGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0TGL PA1TGL PA2TGL PA3TGL PA4TGL PA5TGL PA6TGL PA7TGL

PA0TGL : Invert PA0OUT
bits : 0 - 0 (1 bit)
access : write

PA1TGL : Invert PA1OUT
bits : 1 - 2 (2 bit)
access : write

PA2TGL : Invert PA2OUT
bits : 2 - 4 (3 bit)
access : write

PA3TGL : Invert PA3OUT
bits : 3 - 6 (4 bit)
access : write

PA4TGL : Invert PA4OUT
bits : 4 - 8 (5 bit)
access : write

PA5TGL : Invert PA5OUT
bits : 5 - 10 (6 bit)
access : write

PA6TGL : Invert PA6OUT
bits : 6 - 12 (7 bit)
access : write

PA7TGL : Invert PA7OUT
bits : 7 - 14 (8 bit)
access : write


IOPBTGL

Port B Output Toggle Register
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBTGL IOPBTGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0TGL PB1TGL PB2TGL PB3TGL PB4TGL __reserve0 PB6TGL PB7TGL

PB0TGL : Invert PB0OUT
bits : 0 - 0 (1 bit)
access : write

PB1TGL : Invert PB1OUT
bits : 1 - 2 (2 bit)
access : write

PB2TGL : Invert PB2OUT
bits : 2 - 4 (3 bit)
access : write

PB3TGL : Invert PB3OUT
bits : 3 - 6 (4 bit)
access : write

PB4TGL : Invert PB4OUT
bits : 4 - 8 (5 bit)
access : write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : write

PB6TGL : Invert PB6OUT
bits : 6 - 12 (7 bit)
access : write

PB7TGL : Invert PB7OUT
bits : 7 - 14 (8 bit)
access : write


IOPCTGL

Port C Output Toggle Register
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCTGL IOPCTGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4TGL PC5TGL PC6TGL PC7TGL

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4TGL : Invert PC4OUT
bits : 4 - 8 (5 bit)
access : write

PC5TGL : Invert PC5OUT
bits : 5 - 10 (6 bit)
access : write

PC6TGL : Invert PC6OUT
bits : 6 - 12 (7 bit)
access : write

PC7TGL : Invert PC7OUT
bits : 7 - 14 (8 bit)
access : write


IOPDTGL

Port D Output Toggle Register
address_offset : 0x3D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDTGL IOPDTGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2TGL PD3TGL PD4TGL PD5TGL PD6TGL PD7TGL

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2TGL : Invert PD2OUT
bits : 2 - 4 (3 bit)
access : write

PD3TGL : Invert PD3OUT
bits : 3 - 6 (4 bit)
access : write

PD4TGL : Invert PD4OUT
bits : 4 - 8 (5 bit)
access : write

PD5TGL : Invert PD5OUT
bits : 5 - 10 (6 bit)
access : write

PD6TGL : Invert PD6OUT
bits : 6 - 12 (7 bit)
access : write

PD7TGL : Invert PD7OUT
bits : 7 - 14 (8 bit)
access : write


IOPETGL

Port E Output Toggle Register
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPETGL IOPETGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2TGL PE3TGL PE4TGL PE5TGL PE6TGL PE7TGL

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2TGL : Invert PE2OUT
bits : 2 - 4 (3 bit)
access : write

PE3TGL : Invert PE3OUT
bits : 3 - 6 (4 bit)
access : write

PE4TGL : Invert PE4OUT
bits : 4 - 8 (5 bit)
access : write

PE5TGL : Invert PE5OUT
bits : 5 - 10 (6 bit)
access : write

PE6TGL : Invert PE6OUT
bits : 6 - 12 (7 bit)
access : write

PE7TGL : Invert PE7OUT
bits : 7 - 14 (8 bit)
access : write


IOPFTGL

Port F Output Toggle Register
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFTGL IOPFTGL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0TGL PF1TGL PF2TGL PF3TGL PF4TGL PF5TGL PF6TGL PF7TGL

PF0TGL : Invert PF0OUT
bits : 0 - 0 (1 bit)
access : write

PF1TGL : Invert PF1OUT
bits : 1 - 2 (2 bit)
access : write

PF2TGL : Invert PF2OUT
bits : 2 - 4 (3 bit)
access : write

PF3TGL : Invert PF3OUT
bits : 3 - 6 (4 bit)
access : write

PF4TGL : Invert PF4OUT
bits : 4 - 8 (5 bit)
access : write

PF5TGL : Invert PF5OUT
bits : 5 - 10 (6 bit)
access : write

PF6TGL : Invert PF6OUT
bits : 6 - 12 (7 bit)
access : write

PF7TGL : Invert PF7OUT
bits : 7 - 14 (8 bit)
access : write


IOP4OUT

Port 4 Output Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4OUT IOP4OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40OUT P41OUT P42OUT __reserve0 P44OUT P45OUT P46OUT P47OUT

P40OUT : Set output data of P40
bits : 0 - 0 (1 bit)
access : read-write

P41OUT : Set output data of P41
bits : 1 - 2 (2 bit)
access : read-write

P42OUT : Set output data of P42
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44OUT : Set output data of P44
bits : 4 - 8 (5 bit)
access : read-write

P45OUT : Set output data of P45
bits : 5 - 10 (6 bit)
access : read-write

P46OUT : Set output data of P46
bits : 6 - 12 (7 bit)
access : read-write

P47OUT : Set output data of P47
bits : 7 - 14 (8 bit)
access : read-write


IOP0IN

Port 0 Input Register
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0IN IOP0IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00IN P01IN P02IN P03IN P04IN P05IN P06IN P07IN

P00IN : Input data of P00 is read out.
bits : 0 - 0 (1 bit)
access : read

P01IN : Input data of P01 is read out.
bits : 1 - 2 (2 bit)
access : read

P02IN : Input data of P02 is read out.
bits : 2 - 4 (3 bit)
access : read

P03IN : Input data of P03 is read out.
bits : 3 - 6 (4 bit)
access : read

P04IN : Input data of P04 is read out.
bits : 4 - 8 (5 bit)
access : read

P05IN : Input data of P05 is read out.
bits : 5 - 10 (6 bit)
access : read

P06IN : Input data of P06 is read out.
bits : 6 - 12 (7 bit)
access : read

P07IN : Input data of P07 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP1IN

Port 1 Input Register
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1IN IOP1IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10IN P11IN P12IN P13IN P14IN P15IN P16IN P17IN

P10IN : Input data of P10 is read out.
bits : 0 - 0 (1 bit)
access : read

P11IN : Input data of P11 is read out.
bits : 1 - 2 (2 bit)
access : read

P12IN : Input data of P12 is read out.
bits : 2 - 4 (3 bit)
access : read

P13IN : Input data of P13 is read out.
bits : 3 - 6 (4 bit)
access : read

P14IN : Input data of P14 is read out.
bits : 4 - 8 (5 bit)
access : read

P15IN : Input data of P15 is read out.
bits : 5 - 10 (6 bit)
access : read

P16IN : Input data of P16 is read out.
bits : 6 - 12 (7 bit)
access : read

P17IN : Input data of P17 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP2IN

Port 2 Input Register
address_offset : 0x42 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2IN IOP2IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20IN P21IN P22IN __reserve0 P24IN P25IN P26IN P27IN

P20IN : Input data of P20 is read out.
bits : 0 - 0 (1 bit)
access : read

P21IN : Input data of P21 is read out.
bits : 1 - 2 (2 bit)
access : read

P22IN : Input data of P22 is read out.
bits : 2 - 4 (3 bit)
access : read

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24IN : Input data of P24 is read out.
bits : 4 - 8 (5 bit)
access : read

P25IN : Input data of P25 is read out.
bits : 5 - 10 (6 bit)
access : read

P26IN : Input data of P26 is read out.
bits : 6 - 12 (7 bit)
access : read

P27IN : Input data of P27 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP3IN

Port 3 Input Register
address_offset : 0x43 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3IN IOP3IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30IN P31IN P32IN __reserve0 P34IN P35IN P36IN __reserve1

P30IN : Input data of P30 is read out.
bits : 0 - 0 (1 bit)
access : read

P31IN : Input data of P31 is read out.
bits : 1 - 2 (2 bit)
access : read

P32IN : Input data of P32 is read out.
bits : 2 - 4 (3 bit)
access : read

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34IN : Input data of P34 is read out.
bits : 4 - 8 (5 bit)
access : read

P35IN : Input data of P35 is read out.
bits : 5 - 10 (6 bit)
access : read

P36IN : Input data of P36 is read out.
bits : 6 - 12 (7 bit)
access : read

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4IN

Port 4 Input Register
address_offset : 0x44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4IN IOP4IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40IN P41IN P42IN __reserve0 P44IN P45IN P46IN P47IN

P40IN : Input data of P40 is read out.
bits : 0 - 0 (1 bit)
access : read

P41IN : Input data of P41 is read out.
bits : 1 - 2 (2 bit)
access : read

P42IN : Input data of P42 is read out.
bits : 2 - 4 (3 bit)
access : read

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44IN : Input data of P44 is read out.
bits : 4 - 8 (5 bit)
access : read

P45IN : Input data of P45 is read out.
bits : 5 - 10 (6 bit)
access : read

P46IN : Input data of P46 is read out.
bits : 6 - 12 (7 bit)
access : read

P47IN : Input data of P47 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP5IN

Port 5 Input Register
address_offset : 0x45 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5IN IOP5IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50IN P51IN P52IN P53IN P54IN P55IN P56IN P57IN

P50IN : Input data of P50 is read out.
bits : 0 - 0 (1 bit)
access : read

P51IN : Input data of P51 is read out.
bits : 1 - 2 (2 bit)
access : read

P52IN : Input data of P52 is read out.
bits : 2 - 4 (3 bit)
access : read

P53IN : Input data of P53 is read out.
bits : 3 - 6 (4 bit)
access : read

P54IN : Input data of P54 is read out.
bits : 4 - 8 (5 bit)
access : read

P55IN : Input data of P55 is read out.
bits : 5 - 10 (6 bit)
access : read

P56IN : Input data of P56 is read out.
bits : 6 - 12 (7 bit)
access : read

P57IN : Input data of P57 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP6IN

Port 6 Input Register
address_offset : 0x46 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6IN IOP6IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60IN P61IN P62IN P63IN P64IN P65IN P66IN P67IN

P60IN : Input data of P60 is read out.
bits : 0 - 0 (1 bit)
access : read

P61IN : Input data of P61 is read out.
bits : 1 - 2 (2 bit)
access : read

P62IN : Input data of P62 is read out.
bits : 2 - 4 (3 bit)
access : read

P63IN : Input data of P63 is read out.
bits : 3 - 6 (4 bit)
access : read

P64IN : Input data of P64 is read out.
bits : 4 - 8 (5 bit)
access : read

P65IN : Input data of P65 is read out.
bits : 5 - 10 (6 bit)
access : read

P66IN : Input data of P66 is read out.
bits : 6 - 12 (7 bit)
access : read

P67IN : Input data of P67 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP7IN

Port 7 Input Register
address_offset : 0x47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7IN IOP7IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70IN P71IN P72IN P73IN P74IN P75IN P76IN P77IN

P70IN : Input data of P70 is read out.
bits : 0 - 0 (1 bit)
access : read

P71IN : Input data of P71 is read out.
bits : 1 - 2 (2 bit)
access : read

P72IN : Input data of P72 is read out.
bits : 2 - 4 (3 bit)
access : read

P73IN : Input data of P73 is read out.
bits : 3 - 6 (4 bit)
access : read

P74IN : Input data of P74 is read out.
bits : 4 - 8 (5 bit)
access : read

P75IN : Input data of P75 is read out.
bits : 5 - 10 (6 bit)
access : read

P76IN : Input data of P76 is read out.
bits : 6 - 12 (7 bit)
access : read

P77IN : Input data of P77 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP8IN

Port 8 Input Register
address_offset : 0x48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8IN IOP8IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80IN P81IN P82IN P83IN P84IN P85IN P86IN P87IN

P80IN : Input data of P80 is read out.
bits : 0 - 0 (1 bit)
access : read

P81IN : Input data of P81 is read out.
bits : 1 - 2 (2 bit)
access : read

P82IN : Input data of P82 is read out.
bits : 2 - 4 (3 bit)
access : read

P83IN : Input data of P83 is read out.
bits : 3 - 6 (4 bit)
access : read

P84IN : Input data of P84 is read out.
bits : 4 - 8 (5 bit)
access : read

P85IN : Input data of P85 is read out.
bits : 5 - 10 (6 bit)
access : read

P86IN : Input data of P86 is read out.
bits : 6 - 12 (7 bit)
access : read

P87IN : Input data of P87 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP9IN

Port 9 Input Register
address_offset : 0x49 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9IN IOP9IN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90IN P91IN P92IN P93IN P94IN P95IN P96IN P97IN

P90IN : Input data of P90 is read out.
bits : 0 - 0 (1 bit)
access : read

P91IN : Input data of P91 is read out.
bits : 1 - 2 (2 bit)
access : read

P92IN : Input data of P92 is read out.
bits : 2 - 4 (3 bit)
access : read

P93IN : Input data of P93 is read out.
bits : 3 - 6 (4 bit)
access : read

P94IN : Input data of P94 is read out.
bits : 4 - 8 (5 bit)
access : read

P95IN : Input data of P95 is read out.
bits : 5 - 10 (6 bit)
access : read

P96IN : Input data of P96 is read out.
bits : 6 - 12 (7 bit)
access : read

P97IN : Input data of P97 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPAIN

Port A Input Register
address_offset : 0x4A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPAIN IOPAIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0IN PA1IN PA2IN PA3IN PA4IN PA5IN PA6IN PA7IN

PA0IN : Input data of PA0 is read out.
bits : 0 - 0 (1 bit)
access : read

PA1IN : Input data of PA1 is read out.
bits : 1 - 2 (2 bit)
access : read

PA2IN : Input data of PA2 is read out.
bits : 2 - 4 (3 bit)
access : read

PA3IN : Input data of PA3 is read out.
bits : 3 - 6 (4 bit)
access : read

PA4IN : Input data of PA4 is read out.
bits : 4 - 8 (5 bit)
access : read

PA5IN : Input data of PA5 is read out.
bits : 5 - 10 (6 bit)
access : read

PA6IN : Input data of PA6 is read out.
bits : 6 - 12 (7 bit)
access : read

PA7IN : Input data of PA7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPBIN

Port B Input Register
address_offset : 0x4B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBIN IOPBIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0IN PB1IN PB2IN PB3IN PB4IN __reserve0 PB6IN PB7IN

PB0IN : Input data of PB0 is read out.
bits : 0 - 0 (1 bit)
access : read

PB1IN : Input data of PB1 is read out.
bits : 1 - 2 (2 bit)
access : read

PB2IN : Input data of PB2 is read out.
bits : 2 - 4 (3 bit)
access : read

PB3IN : Input data of PB3 is read out.
bits : 3 - 6 (4 bit)
access : read

PB4IN : Input data of PB4 is read out.
bits : 4 - 8 (5 bit)
access : read

__reserve0 : Undefined value will be read
bits : 5 - 10 (6 bit)
access : read

PB6IN : Input data of PB6 is read out.
bits : 6 - 12 (7 bit)
access : read

PB7IN : Input data of PB7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPCIN

Port C Input Register
address_offset : 0x4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCIN IOPCIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PC0IN PC1IN PC2IN PC3IN PC4IN PC5IN PC6IN PC7IN

PC0IN : Input data of PC0 is read out.
bits : 0 - 0 (1 bit)
access : read

PC1IN : Input data of PC1 is read out.
bits : 1 - 2 (2 bit)
access : read

PC2IN : Input data of PC2 is read out.
bits : 2 - 4 (3 bit)
access : read

PC3IN : Input data of PC3 is read out.
bits : 3 - 6 (4 bit)
access : read

PC4IN : Input data of PC4 is read out.
bits : 4 - 8 (5 bit)
access : read

PC5IN : Input data of PC5 is read out.
bits : 5 - 10 (6 bit)
access : read

PC6IN : Input data of PC6 is read out.
bits : 6 - 12 (7 bit)
access : read

PC7IN : Input data of PC7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPDIN

Port D Input Register
address_offset : 0x4D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDIN IOPDIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PD0IN PD1IN PD2IN PD3IN PD4IN PD5IN PD6IN PD7IN

PD0IN : Input data of PD0 is read out.
bits : 0 - 0 (1 bit)
access : read

PD1IN : Input data of PD1 is read out.
bits : 1 - 2 (2 bit)
access : read

PD2IN : Input data of PD2 is read out.
bits : 2 - 4 (3 bit)
access : read

PD3IN : Input data of PD3 is read out.
bits : 3 - 6 (4 bit)
access : read

PD4IN : Input data of PD4 is read out.
bits : 4 - 8 (5 bit)
access : read

PD5IN : Input data of PD5 is read out.
bits : 5 - 10 (6 bit)
access : read

PD6IN : Input data of PD6 is read out.
bits : 6 - 12 (7 bit)
access : read

PD7IN : Input data of PD7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPEIN

Port E Input Register
address_offset : 0x4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPEIN IOPEIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PE0IN PE1IN PE2IN PE3IN PE4IN PE5IN PE6IN PE7IN

PE0IN : Input data of PE0 is read out.
bits : 0 - 0 (1 bit)
access : read

PE1IN : Input data of PE1 is read out.
bits : 1 - 2 (2 bit)
access : read

PE2IN : Input data of PE2 is read out.
bits : 2 - 4 (3 bit)
access : read

PE3IN : Input data of PE3 is read out.
bits : 3 - 6 (4 bit)
access : read

PE4IN : Input data of PE4 is read out.
bits : 4 - 8 (5 bit)
access : read

PE5IN : Input data of PE5 is read out.
bits : 5 - 10 (6 bit)
access : read

PE6IN : Input data of PE6 is read out.
bits : 6 - 12 (7 bit)
access : read

PE7IN : Input data of PE7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOPFIN

Port F Input Register
address_offset : 0x4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFIN IOPFIN read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0IN PF1IN PF2IN PF3IN PF4IN PF5IN PF6IN PF7IN

PF0IN : Input data of PF0 is read out.
bits : 0 - 0 (1 bit)
access : read

PF1IN : Input data of PF1 is read out.
bits : 1 - 2 (2 bit)
access : read

PF2IN : Input data of PF2 is read out.
bits : 2 - 4 (3 bit)
access : read

PF3IN : Input data of PF3 is read out.
bits : 3 - 6 (4 bit)
access : read

PF4IN : Input data of PF4 is read out.
bits : 4 - 8 (5 bit)
access : read

PF5IN : Input data of PF5 is read out.
bits : 5 - 10 (6 bit)
access : read

PF6IN : Input data of PF6 is read out.
bits : 6 - 12 (7 bit)
access : read

PF7IN : Input data of PF7 is read out.
bits : 7 - 14 (8 bit)
access : read


IOP5OUT

Port 5 Output Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5OUT IOP5OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50OUT P51OUT P52OUT P53OUT P54OUT P55OUT P56OUT P57OUT

P50OUT : Set output data of P50
bits : 0 - 0 (1 bit)
access : read-write

P51OUT : Set output data of P51
bits : 1 - 2 (2 bit)
access : read-write

P52OUT : Set output data of P52
bits : 2 - 4 (3 bit)
access : read-write

P53OUT : Set output data of P53
bits : 3 - 6 (4 bit)
access : read-write

P54OUT : Set output data of P54
bits : 4 - 8 (5 bit)
access : read-write

P55OUT : Set output data of P55
bits : 5 - 10 (6 bit)
access : read-write

P56OUT : Set output data of P56
bits : 6 - 12 (7 bit)
access : read-write

P57OUT : Set output data of P57
bits : 7 - 14 (8 bit)
access : read-write


IOP0OE

Port 0 Output Enable Register
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0OE IOP0OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00OE P01OE P02OE P03OE P04OE P05OE P06OE P07OE

P00OE : P00 output enable
bits : 0 - 0 (1 bit)
access : read-write

P01OE : P01 output enable
bits : 1 - 2 (2 bit)
access : read-write

P02OE : P02 output enable
bits : 2 - 4 (3 bit)
access : read-write

P03OE : P03 output enable
bits : 3 - 6 (4 bit)
access : read-write

P04OE : P04 output enable
bits : 4 - 8 (5 bit)
access : read-write

P05OE : P05 output enable
bits : 5 - 10 (6 bit)
access : read-write

P06OE : P06 output enable
bits : 6 - 12 (7 bit)
access : read-write

P07OE : P07 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP1OE

Port 1 Output Enable Register
address_offset : 0x51 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1OE IOP1OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10OE P11OE P12OE P13OE P14OE P15OE P16OE P17OE

P10OE : P10 output enable
bits : 0 - 0 (1 bit)
access : read-write

P11OE : P11 output enable
bits : 1 - 2 (2 bit)
access : read-write

P12OE : P12 output enable
bits : 2 - 4 (3 bit)
access : read-write

P13OE : P13 output enable
bits : 3 - 6 (4 bit)
access : read-write

P14OE : P14 output enable
bits : 4 - 8 (5 bit)
access : read-write

P15OE : P15 output enable
bits : 5 - 10 (6 bit)
access : read-write

P16OE : P16 output enable
bits : 6 - 12 (7 bit)
access : read-write

P17OE : P17 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP2OE

Port 2 Output Enable Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2OE IOP2OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20OE P21OE P22OE __reserve0 P24OE P25OE P26OE P27OE

P20OE : P20 output enable
bits : 0 - 0 (1 bit)
access : read-write

P21OE : P21 output enable
bits : 1 - 2 (2 bit)
access : read-write

P22OE : P22 output enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24OE : P24 output enable
bits : 4 - 8 (5 bit)
access : read-write

P25OE : P25 output enable
bits : 5 - 10 (6 bit)
access : read-write

P26OE : P26 output enable
bits : 6 - 12 (7 bit)
access : read-write

P27OE : P27 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP3OE

Port 3 Output Enable Register
address_offset : 0x53 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3OE IOP3OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30OE P31OE P32OE __reserve0 P34OE P35OE P36OE __reserve1

P30OE : P30 output enable
bits : 0 - 0 (1 bit)
access : read-write

P31OE : P31 output enable
bits : 1 - 2 (2 bit)
access : read-write

P32OE : P32 output enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34OE : P34 output enable
bits : 4 - 8 (5 bit)
access : read-write

P35OE : P35 output enable
bits : 5 - 10 (6 bit)
access : read-write

P36OE : P36 output enable
bits : 6 - 12 (7 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4OE

Port 4 Output Enable Register
address_offset : 0x54 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4OE IOP4OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40OE P41OE P42OE __reserve0 P44OE P45OE P46OE P47OE

P40OE : P40 output enable
bits : 0 - 0 (1 bit)
access : read-write

P41OE : P41 output enable
bits : 1 - 2 (2 bit)
access : read-write

P42OE : P42 output enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44OE : P44 output enable
bits : 4 - 8 (5 bit)
access : read-write

P45OE : P45 output enable
bits : 5 - 10 (6 bit)
access : read-write

P46OE : P46 output enable
bits : 6 - 12 (7 bit)
access : read-write

P47OE : P47 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP5OE

Port 5 Output Enable Register
address_offset : 0x55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5OE IOP5OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50OE P51OE P52OE P53OE P54OE P55OE P56OE P57OE

P50OE : P50 output enable
bits : 0 - 0 (1 bit)
access : read-write

P51OE : P51 output enable
bits : 1 - 2 (2 bit)
access : read-write

P52OE : P52 output enable
bits : 2 - 4 (3 bit)
access : read-write

P53OE : P53 output enable
bits : 3 - 6 (4 bit)
access : read-write

P54OE : P54 output enable
bits : 4 - 8 (5 bit)
access : read-write

P55OE : P55 output enable
bits : 5 - 10 (6 bit)
access : read-write

P56OE : P56 output enable
bits : 6 - 12 (7 bit)
access : read-write

P57OE : P57 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP6OE

Port 6 Output Enable Register
address_offset : 0x56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6OE IOP6OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60OE P61OE P62OE P63OE P64OE P65OE P66OE P67OE

P60OE : P60 output enable
bits : 0 - 0 (1 bit)
access : read-write

P61OE : P61 output enable
bits : 1 - 2 (2 bit)
access : read-write

P62OE : P62 output enable
bits : 2 - 4 (3 bit)
access : read-write

P63OE : P63 output enable
bits : 3 - 6 (4 bit)
access : read-write

P64OE : P64 output enable
bits : 4 - 8 (5 bit)
access : read-write

P65OE : P65 output enable
bits : 5 - 10 (6 bit)
access : read-write

P66OE : P66 output enable
bits : 6 - 12 (7 bit)
access : read-write

P67OE : P67 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP7OE

Port 7 Output Enable Register
address_offset : 0x57 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7OE IOP7OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70OE P71OE P72OE P73OE P74OE P75OE P76OE P77OE

P70OE : P70 output enable
bits : 0 - 0 (1 bit)
access : read-write

P71OE : P71 output enable
bits : 1 - 2 (2 bit)
access : read-write

P72OE : P72 output enable
bits : 2 - 4 (3 bit)
access : read-write

P73OE : P73 output enable
bits : 3 - 6 (4 bit)
access : read-write

P74OE : P74 output enable
bits : 4 - 8 (5 bit)
access : read-write

P75OE : P75 output enable
bits : 5 - 10 (6 bit)
access : read-write

P76OE : P76 output enable
bits : 6 - 12 (7 bit)
access : read-write

P77OE : P77 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP8OE

Port 8 Output Enable Register
address_offset : 0x58 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8OE IOP8OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80OE P81OE P82OE P83OE P84OE P85OE P86OE P87OE

P80OE : P80 output enable
bits : 0 - 0 (1 bit)
access : read-write

P81OE : P81 output enable
bits : 1 - 2 (2 bit)
access : read-write

P82OE : P82 output enable
bits : 2 - 4 (3 bit)
access : read-write

P83OE : P83 output enable
bits : 3 - 6 (4 bit)
access : read-write

P84OE : P84 output enable
bits : 4 - 8 (5 bit)
access : read-write

P85OE : P85 output enable
bits : 5 - 10 (6 bit)
access : read-write

P86OE : P86 output enable
bits : 6 - 12 (7 bit)
access : read-write

P87OE : P87 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP9OE

Port 9 Output Enable Register
address_offset : 0x59 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9OE IOP9OE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90OE P91OE P92OE P93OE P94OE P95OE P96OE P97OE

P90OE : P90 output enable
bits : 0 - 0 (1 bit)
access : read-write

P91OE : P91 output enable
bits : 1 - 2 (2 bit)
access : read-write

P92OE : P92 output enable
bits : 2 - 4 (3 bit)
access : read-write

P93OE : P93 output enable
bits : 3 - 6 (4 bit)
access : read-write

P94OE : P94 output enable
bits : 4 - 8 (5 bit)
access : read-write

P95OE : P95 output enable
bits : 5 - 10 (6 bit)
access : read-write

P96OE : P96 output enable
bits : 6 - 12 (7 bit)
access : read-write

P97OE : P97 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPAOE

Port A Output Enable Register
address_offset : 0x5A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPAOE IOPAOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0OE PA1OE PA2OE PA3OE PA4OE PA5OE PA6OE PA7OE

PA0OE : PA0 output enable
bits : 0 - 0 (1 bit)
access : read-write

PA1OE : PA1 output enable
bits : 1 - 2 (2 bit)
access : read-write

PA2OE : PA2 output enable
bits : 2 - 4 (3 bit)
access : read-write

PA3OE : PA3 output enable
bits : 3 - 6 (4 bit)
access : read-write

PA4OE : PA4 output enable
bits : 4 - 8 (5 bit)
access : read-write

PA5OE : PA5 output enable
bits : 5 - 10 (6 bit)
access : read-write

PA6OE : PA6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PA7OE : PA7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPBOE

Port B Output Enable Register
address_offset : 0x5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBOE IOPBOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0OE PB1OE PB2OE PB3OE PB4OE __reserve0 PB6OE PB7OE

PB0OE : PB0 output enable
bits : 0 - 0 (1 bit)
access : read-write

PB1OE : PB1 output enable
bits : 1 - 2 (2 bit)
access : read-write

PB2OE : PB2 output enable
bits : 2 - 4 (3 bit)
access : read-write

PB3OE : PB3 output enable
bits : 3 - 6 (4 bit)
access : read-write

PB4OE : PB4 output enable
bits : 4 - 8 (5 bit)
access : read-write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write

PB6OE : PB6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PB7OE : PB7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPCOE

Port C Output Enable Register
address_offset : 0x5C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCOE IOPCOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4OE PC5OE PC6OE PC7OE

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4OE : PC4 output enable
bits : 4 - 8 (5 bit)
access : read-write

PC5OE : PC5 output enable
bits : 5 - 10 (6 bit)
access : read-write

PC6OE : PC6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PC7OE : PC7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPDOE

Port D Output Enable Register
address_offset : 0x5D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDOE IOPDOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2OE PD3OE PD4OE PD5OE PD6OE PD7OE

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2OE : PD2 output enable
bits : 2 - 4 (3 bit)
access : read-write

PD3OE : PD3 output enable
bits : 3 - 6 (4 bit)
access : read-write

PD4OE : PD4 output enable
bits : 4 - 8 (5 bit)
access : read-write

PD5OE : PD5 output enable
bits : 5 - 10 (6 bit)
access : read-write

PD6OE : PD6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PD7OE : PD7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPEOE

Port E Output Enable Register
address_offset : 0x5E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPEOE IOPEOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2OE PE3OE PE4OE PE5OE PE6OE PE7OE

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2OE : PE2 output enable
bits : 2 - 4 (3 bit)
access : read-write

PE3OE : PE3 output enable
bits : 3 - 6 (4 bit)
access : read-write

PE4OE : PE4 output enable
bits : 4 - 8 (5 bit)
access : read-write

PE5OE : PE5 output enable
bits : 5 - 10 (6 bit)
access : read-write

PE6OE : PE6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PE7OE : PE7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOPFOE

Port F Output Enable Register
address_offset : 0x5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFOE IOPFOE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0OE PF1OE PF2OE PF3OE PF4OE PF5OE PF6OE PF7OE

PF0OE : PF0 output enable
bits : 0 - 0 (1 bit)
access : read-write

PF1OE : PF1 output enable
bits : 1 - 2 (2 bit)
access : read-write

PF2OE : PF2 output enable
bits : 2 - 4 (3 bit)
access : read-write

PF3OE : PF3 output enable
bits : 3 - 6 (4 bit)
access : read-write

PF4OE : PF4 output enable
bits : 4 - 8 (5 bit)
access : read-write

PF5OE : PF5 output enable
bits : 5 - 10 (6 bit)
access : read-write

PF6OE : PF6 output enable
bits : 6 - 12 (7 bit)
access : read-write

PF7OE : PF7 output enable
bits : 7 - 14 (8 bit)
access : read-write


IOP6OUT

Port 6 Output Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6OUT IOP6OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60OUT P61OUT P62OUT P63OUT P64OUT P65OUT P66OUT P67OUT

P60OUT : Set output data of P60
bits : 0 - 0 (1 bit)
access : read-write

P61OUT : Set output data of P61
bits : 1 - 2 (2 bit)
access : read-write

P62OUT : Set output data of P62
bits : 2 - 4 (3 bit)
access : read-write

P63OUT : Set output data of P63
bits : 3 - 6 (4 bit)
access : read-write

P64OUT : Set output data of P64
bits : 4 - 8 (5 bit)
access : read-write

P65OUT : Set output data of P65
bits : 5 - 10 (6 bit)
access : read-write

P66OUT : Set output data of P66
bits : 6 - 12 (7 bit)
access : read-write

P67OUT : Set output data of P67
bits : 7 - 14 (8 bit)
access : read-write


IOP0IE

Port 0 Input Enable Register
address_offset : 0x60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0IE IOP0IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00IE P01IE P02IE P03IE P04IE P05IE P06IE P07IE

P00IE : P00 input enable
bits : 0 - 0 (1 bit)
access : read-write

P01IE : P01 input enable
bits : 1 - 2 (2 bit)
access : read-write

P02IE : P02 input enable
bits : 2 - 4 (3 bit)
access : read-write

P03IE : P03 input enable
bits : 3 - 6 (4 bit)
access : read-write

P04IE : P04 input enable
bits : 4 - 8 (5 bit)
access : read-write

P05IE : P05 input enable
bits : 5 - 10 (6 bit)
access : read-write

P06IE : P06 input enable
bits : 6 - 12 (7 bit)
access : read-write

P07IE : P07 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP1IE

Port 1 Input Enable Register
address_offset : 0x61 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1IE IOP1IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10IE P11IE P12IE P13IE P14IE P15IE P16IE P17IE

P10IE : P10 input enable
bits : 0 - 0 (1 bit)
access : read-write

P11IE : P11 input enable
bits : 1 - 2 (2 bit)
access : read-write

P12IE : P12 input enable
bits : 2 - 4 (3 bit)
access : read-write

P13IE : P13 input enable
bits : 3 - 6 (4 bit)
access : read-write

P14IE : P14 input enable
bits : 4 - 8 (5 bit)
access : read-write

P15IE : P15 input enable
bits : 5 - 10 (6 bit)
access : read-write

P16IE : P16 input enable
bits : 6 - 12 (7 bit)
access : read-write

P17IE : P17 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP2IE

Port 2 Input Enable Register
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2IE IOP2IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20IE P21IE P22IE __reserve0 P24IE P25IE P26IE P27IE

P20IE : P20 input enable
bits : 0 - 0 (1 bit)
access : read-write

P21IE : P21 input enable
bits : 1 - 2 (2 bit)
access : read-write

P22IE : P22 input enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24IE : P24 input enable
bits : 4 - 8 (5 bit)
access : read-write

P25IE : P25 input enable
bits : 5 - 10 (6 bit)
access : read-write

P26IE : P26 input enable
bits : 6 - 12 (7 bit)
access : read-write

P27IE : P27 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP3IE

Port 3 Input Enable Register
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3IE IOP3IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30IE P31IE P32IE __reserve0 P34IE P35IE P36IE __reserve1

P30IE : P30 input enable
bits : 0 - 0 (1 bit)
access : read-write

P31IE : P31 input enable
bits : 1 - 2 (2 bit)
access : read-write

P32IE : P32 input enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34IE : P34 input enable
bits : 4 - 8 (5 bit)
access : read-write

P35IE : P35 input enable
bits : 5 - 10 (6 bit)
access : read-write

P36IE : P36 input enable
bits : 6 - 12 (7 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4IE

Port 4 Input Enable Register
address_offset : 0x64 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4IE IOP4IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40IE P41IE P42IE __reserve0 P44IE P45IE P46IE P47IE

P40IE : P40 input enable
bits : 0 - 0 (1 bit)
access : read-write

P41IE : P41 input enable
bits : 1 - 2 (2 bit)
access : read-write

P42IE : P42 input enable
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44IE : P44 input enable
bits : 4 - 8 (5 bit)
access : read-write

P45IE : P45 input enable
bits : 5 - 10 (6 bit)
access : read-write

P46IE : P46 input enable
bits : 6 - 12 (7 bit)
access : read-write

P47IE : P47 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP5IE

Port 5 Input Enable Register
address_offset : 0x65 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5IE IOP5IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50IE P51IE P52IE P53IE P54IE P55IE P56IE P57IE

P50IE : P50 input enable
bits : 0 - 0 (1 bit)
access : read-write

P51IE : P51 input enable
bits : 1 - 2 (2 bit)
access : read-write

P52IE : P52 input enable
bits : 2 - 4 (3 bit)
access : read-write

P53IE : P53 input enable
bits : 3 - 6 (4 bit)
access : read-write

P54IE : P54 input enable
bits : 4 - 8 (5 bit)
access : read-write

P55IE : P55 input enable
bits : 5 - 10 (6 bit)
access : read-write

P56IE : P56 input enable
bits : 6 - 12 (7 bit)
access : read-write

P57IE : P57 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP6IE

Port 6 Input Enable Register
address_offset : 0x66 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6IE IOP6IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60IE P61IE P62IE P63IE P64IE P65IE P66IE P67IE

P60IE : P60 input enable
bits : 0 - 0 (1 bit)
access : read-write

P61IE : P61 input enable
bits : 1 - 2 (2 bit)
access : read-write

P62IE : P62 input enable
bits : 2 - 4 (3 bit)
access : read-write

P63IE : P63 input enable
bits : 3 - 6 (4 bit)
access : read-write

P64IE : P64 input enable
bits : 4 - 8 (5 bit)
access : read-write

P65IE : P65 input enable
bits : 5 - 10 (6 bit)
access : read-write

P66IE : P66 input enable
bits : 6 - 12 (7 bit)
access : read-write

P67IE : P67 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP7IE

Port 7 Input Enable Register
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7IE IOP7IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70IE P71IE P72IE P73IE P74IE P75IE P76IE P77IE

P70IE : P70 input enable
bits : 0 - 0 (1 bit)
access : read-write

P71IE : P71 input enable
bits : 1 - 2 (2 bit)
access : read-write

P72IE : P72 input enable
bits : 2 - 4 (3 bit)
access : read-write

P73IE : P73 input enable
bits : 3 - 6 (4 bit)
access : read-write

P74IE : P74 input enable
bits : 4 - 8 (5 bit)
access : read-write

P75IE : P75 input enable
bits : 5 - 10 (6 bit)
access : read-write

P76IE : P76 input enable
bits : 6 - 12 (7 bit)
access : read-write

P77IE : P77 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP8IE

Port 8 Input Enable Register
address_offset : 0x68 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8IE IOP8IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80IE P81IE P82IE P83IE P84IE P85IE P86IE P87IE

P80IE : P80 input enable
bits : 0 - 0 (1 bit)
access : read-write

P81IE : P81 input enable
bits : 1 - 2 (2 bit)
access : read-write

P82IE : P82 input enable
bits : 2 - 4 (3 bit)
access : read-write

P83IE : P83 input enable
bits : 3 - 6 (4 bit)
access : read-write

P84IE : P84 input enable
bits : 4 - 8 (5 bit)
access : read-write

P85IE : P85 input enable
bits : 5 - 10 (6 bit)
access : read-write

P86IE : P86 input enable
bits : 6 - 12 (7 bit)
access : read-write

P87IE : P87 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP9IE

Port 9 Input Enable Register
address_offset : 0x69 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9IE IOP9IE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90IE P91IE P92IE P93IE P94IE P95IE P96IE P97IE

P90IE : P90 input enable
bits : 0 - 0 (1 bit)
access : read-write

P91IE : P91 input enable
bits : 1 - 2 (2 bit)
access : read-write

P92IE : P92 input enable
bits : 2 - 4 (3 bit)
access : read-write

P93IE : P93 input enable
bits : 3 - 6 (4 bit)
access : read-write

P94IE : P94 input enable
bits : 4 - 8 (5 bit)
access : read-write

P95IE : P95 input enable
bits : 5 - 10 (6 bit)
access : read-write

P96IE : P96 input enable
bits : 6 - 12 (7 bit)
access : read-write

P97IE : P97 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPAIE

Port A Input Enable Register
address_offset : 0x6A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPAIE IOPAIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0IE PA1IE PA2IE PA3IE PA4IE PA5IE PA6IE PA7IE

PA0IE : PA0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PA1IE : PA1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PA2IE : PA2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PA3IE : PA3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PA4IE : PA4 input enable
bits : 4 - 8 (5 bit)
access : read-write

PA5IE : PA5 input enable
bits : 5 - 10 (6 bit)
access : read-write

PA6IE : PA6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PA7IE : PA7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPBIE

Port B Input Enable Register
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBIE IOPBIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0IE PB1IE PB2IE PB3IE PB4IE __reserve0 PB6IE PB7IE

PB0IE : PB0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PB1IE : PB1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PB2IE : PB2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PB3IE : PB3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PB4IE : PB4 input enable
bits : 4 - 8 (5 bit)
access : read-write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write

PB6IE : PB6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PB7IE : PB7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPCIE

Port C Input Enable Register
address_offset : 0x6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCIE IOPCIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PC0IE PC1IE PC2IE PC3IE PC4IE PC5IE PC6IE PC7IE

PC0IE : PC0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PC1IE : PC1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PC2IE : PC2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PC3IE : PC3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PC4IE : PC4 input enable
bits : 4 - 8 (5 bit)
access : read-write

PC5IE : PC5 input enable
bits : 5 - 10 (6 bit)
access : read-write

PC6IE : PC6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PC7IE : PC7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPDIE

Port D Input Enable Register
address_offset : 0x6D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDIE IOPDIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PD0IE PD1IE PD2IE PD3IE PD4IE PD5IE PD6IE PD7IE

PD0IE : PD0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PD1IE : PD1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PD2IE : PD2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PD3IE : PD3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PD4IE : PD4 input enable
bits : 4 - 8 (5 bit)
access : read-write

PD5IE : PD5 input enable
bits : 5 - 10 (6 bit)
access : read-write

PD6IE : PD6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PD7IE : PD7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPEIE

Port E Input Enable Register
address_offset : 0x6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPEIE IOPEIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PE0IE PE1IE PE2IE PE3IE PE4IE PE5IE PE6IE PE7IE

PE0IE : PE0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PE1IE : PE1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PE2IE : PE2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PE3IE : PE3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PE4IE : PE4 input enable
bits : 4 - 8 (5 bit)
access : read-write

PE5IE : PE5 input enable
bits : 5 - 10 (6 bit)
access : read-write

PE6IE : PE6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PE7IE : PE7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOPFIE

Port F Input Enable Register
address_offset : 0x6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFIE IOPFIE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0IE PF1IE PF2IE PF3IE PF4IE PF5IE PF6IE PF7IE

PF0IE : PF0 input enable
bits : 0 - 0 (1 bit)
access : read-write

PF1IE : PF1 input enable
bits : 1 - 2 (2 bit)
access : read-write

PF2IE : PF2 input enable
bits : 2 - 4 (3 bit)
access : read-write

PF3IE : PF3 input enable
bits : 3 - 6 (4 bit)
access : read-write

PF4IE : PF4 input enable
bits : 4 - 8 (5 bit)
access : read-write

PF5IE : PF5 input enable
bits : 5 - 10 (6 bit)
access : read-write

PF6IE : PF6 input enable
bits : 6 - 12 (7 bit)
access : read-write

PF7IE : PF7 input enable
bits : 7 - 14 (8 bit)
access : read-write


IOP7OUT

Port 7 Output Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7OUT IOP7OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70OUT P71OUT P72OUT P73OUT P74OUT P75OUT P76OUT P77OUT

P70OUT : Set output data of P70
bits : 0 - 0 (1 bit)
access : read-write

P71OUT : Set output data of P71
bits : 1 - 2 (2 bit)
access : read-write

P72OUT : Set output data of P72
bits : 2 - 4 (3 bit)
access : read-write

P73OUT : Set output data of P73
bits : 3 - 6 (4 bit)
access : read-write

P74OUT : Set output data of P74
bits : 4 - 8 (5 bit)
access : read-write

P75OUT : Set output data of P75
bits : 5 - 10 (6 bit)
access : read-write

P76OUT : Set output data of P76
bits : 6 - 12 (7 bit)
access : read-write

P77OUT : Set output data of P77
bits : 7 - 14 (8 bit)
access : read-write


IOP0ODC

Port 0 Nch Open-drain Control Register
address_offset : 0x70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0ODC IOP0ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P06ODC P07ODC

__reserve0 : 0 is always read out.
bits : 0 - 5 (6 bit)
access : read

P06ODC : P06 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write

P07ODC : P07 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write


IOP1ODC

Port 1 Nch Open-drain Control Register
address_offset : 0x71 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1ODC IOP1ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10ODC __reserve0

P10ODC : P10 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 8 (8 bit)
access : read


IOP2ODC

Port 2 Nch Open-drain Control Register
address_offset : 0x72 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2ODC IOP2ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P25ODC P26ODC P27ODC

__reserve0 : 0 is always read out.
bits : 0 - 4 (5 bit)
access : read

P25ODC : P25 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write

P26ODC : P26 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write

P27ODC : P27 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write


IOP3ODC

Port 3 Nch Open-drain Control Register
address_offset : 0x73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3ODC IOP3ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30ODC P31ODC __reserve0 P34ODC P35ODC __reserve1

P30ODC : P30 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write

P31ODC : P31 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 5 (4 bit)
access : read

P34ODC : P34 Nch open-drain selection
bits : 4 - 8 (5 bit)
access : read-write

P35ODC : P35 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 6 - 13 (8 bit)
access : read


IOP4ODC

Port 4 Nch Open-drain Control Register
address_offset : 0x74 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4ODC IOP4ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40ODC P41ODC __reserve0 P44ODC P45ODC __reserve1 P47ODC

P40ODC : P40 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write

P41ODC : P41 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 5 (4 bit)
access : read

P44ODC : P44 Nch open-drain selection
bits : 4 - 8 (5 bit)
access : read-write

P45ODC : P45 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 6 - 12 (7 bit)
access : read

P47ODC : P47 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write


IOP5ODC

Port 5 Nch Open-drain Control Register
address_offset : 0x75 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5ODC IOP5ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50ODC __reserve0 P52ODC P53ODC __reserve1 P55ODC P56ODC P57ODC

P50ODC : P50 Nch open-drain selection
bits : 0 - 0 (1 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 1 - 2 (2 bit)
access : read

P52ODC : P52 Nch open-drain selection
bits : 2 - 4 (3 bit)
access : read-write

P53ODC : P53 Nch open-drain selection
bits : 3 - 6 (4 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 4 - 8 (5 bit)
access : read

P55ODC : P55 Nch open-drain selection
bits : 5 - 10 (6 bit)
access : read-write

P56ODC : P56 Nch open-drain selection
bits : 6 - 12 (7 bit)
access : read-write

P57ODC : P57 Nch open-drain selection
bits : 7 - 14 (8 bit)
access : read-write


IOP6ODC

Port 6 Nch Open-drain Control Register
address_offset : 0x76 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6ODC IOP6ODC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P61ODC P62ODC P63ODC __reserve1

__reserve0 : 0 is always read out.
bits : 0 - 0 (1 bit)
access : read

P61ODC : P61 Nch open-drain selection
bits : 1 - 2 (2 bit)
access : read-write

P62ODC : P62 Nch open-drain selection
bits : 2 - 4 (3 bit)
access : read-write

P63ODC : P63 Nch open-drain selection
bits : 3 - 6 (4 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read


IOP8OUT

Port 8 Output Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8OUT IOP8OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80OUT P81OUT P82OUT P83OUT P84OUT P85OUT P86OUT P87OUT

P80OUT : Set output data of P80
bits : 0 - 0 (1 bit)
access : read-write

P81OUT : Set output data of P81
bits : 1 - 2 (2 bit)
access : read-write

P82OUT : Set output data of P82
bits : 2 - 4 (3 bit)
access : read-write

P83OUT : Set output data of P83
bits : 3 - 6 (4 bit)
access : read-write

P84OUT : Set output data of P84
bits : 4 - 8 (5 bit)
access : read-write

P85OUT : Set output data of P85
bits : 5 - 10 (6 bit)
access : read-write

P86OUT : Set output data of P86
bits : 6 - 12 (7 bit)
access : read-write

P87OUT : Set output data of P87
bits : 7 - 14 (8 bit)
access : read-write


IOP0MD

Port 0 Mode Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP0MD IOP0MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P00MD P01MD P02MD P03MD P04MD P05MD P06MD P07MD

P00MD : P00 function selection
bits : 0 - 3 (4 bit)
access : read-write

P01MD : P01 function selection
bits : 4 - 11 (8 bit)
access : read-write

P02MD : P02 function selection
bits : 8 - 19 (12 bit)
access : read-write

P03MD : P03 function selection
bits : 12 - 27 (16 bit)
access : read-write

P04MD : P04 function selection
bits : 16 - 35 (20 bit)
access : read-write

P05MD : P05 function selection
bits : 20 - 43 (24 bit)
access : read-write

P06MD : P06 function selection
bits : 24 - 51 (28 bit)
access : read-write

P07MD : P07 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP1MD

Port 1 Mode Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP1MD IOP1MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P10MD P11MD P12MD P13MD P14MD P15MD P16MD P17MD

P10MD : P10 function selection
bits : 0 - 3 (4 bit)
access : read-write

P11MD : P11 function selection
bits : 4 - 11 (8 bit)
access : read-write

P12MD : P12 function selection
bits : 8 - 19 (12 bit)
access : read-write

P13MD : P13 function selection
bits : 12 - 27 (16 bit)
access : read-write

P14MD : P14 function selection
bits : 16 - 35 (20 bit)
access : read-write

P15MD : P15 function selection
bits : 20 - 43 (24 bit)
access : read-write

P16MD : P16 function selection
bits : 24 - 51 (28 bit)
access : read-write

P17MD : P17 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP2MD

Port 2 Mode Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP2MD IOP2MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P20MD P21MD P22MD __reserve0 P24MD P25MD P26MD P27MD

P20MD : P20 function selection
bits : 0 - 3 (4 bit)
access : read-write

P21MD : P21 function selection
bits : 4 - 11 (8 bit)
access : read-write

P22MD : P22 function selection
bits : 8 - 19 (12 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read

P24MD : P24 function selection
bits : 16 - 35 (20 bit)
access : read-write

P25MD : P25 function selection
bits : 20 - 43 (24 bit)
access : read-write

P26MD : P26 function selection
bits : 24 - 51 (28 bit)
access : read-write

P27MD : P27 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP3MD

Port 3 Mode Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP3MD IOP3MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P30MD P31MD P32MD __reserve0 P34MD P35MD P36MD __reserve1

P30MD : P30 function selection
bits : 0 - 3 (4 bit)
access : read-write

P31MD : P31 function selection
bits : 4 - 11 (8 bit)
access : read-write

P32MD : P32 function selection
bits : 8 - 19 (12 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read

P34MD : P34 function selection
bits : 16 - 35 (20 bit)
access : read-write

P35MD : P35 function selection
bits : 20 - 43 (24 bit)
access : read-write

P36MD : P36 function selection
bits : 24 - 51 (28 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 28 - 59 (32 bit)
access : read


IOP9OUT

Port 9 Output Register
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9OUT IOP9OUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90OUT P91OUT P92OUT P93OUT P94OUT P95OUT P96OUT P97OUT

P90OUT : Set output data of P90
bits : 0 - 0 (1 bit)
access : read-write

P91OUT : Set output data of P91
bits : 1 - 2 (2 bit)
access : read-write

P92OUT : Set output data of P92
bits : 2 - 4 (3 bit)
access : read-write

P93OUT : Set output data of P93
bits : 3 - 6 (4 bit)
access : read-write

P94OUT : Set output data of P94
bits : 4 - 8 (5 bit)
access : read-write

P95OUT : Set output data of P95
bits : 5 - 10 (6 bit)
access : read-write

P96OUT : Set output data of P96
bits : 6 - 12 (7 bit)
access : read-write

P97OUT : Set output data of P97
bits : 7 - 14 (8 bit)
access : read-write


IOP4MD

Port 4 Mode Register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP4MD IOP4MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P40MD P41MD P42MD __reserve0 P44MD P45MD P46MD P47MD

P40MD : P40 function selection
bits : 0 - 3 (4 bit)
access : read-write

P41MD : P41 function selection
bits : 4 - 11 (8 bit)
access : read-write

P42MD : P42 function selection
bits : 8 - 19 (12 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 12 - 27 (16 bit)
access : read

P44MD : P44 function selection
bits : 16 - 35 (20 bit)
access : read-write

P45MD : P45 function selection
bits : 20 - 43 (24 bit)
access : read-write

P46MD : P46 function selection
bits : 24 - 51 (28 bit)
access : read-write

P47MD : P47 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP5MD

Port 5 Mode Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP5MD IOP5MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P50MD P51MD P52MD P53MD P54MD P55MD P56MD P57MD

P50MD : P50 function selection
bits : 0 - 3 (4 bit)
access : read-write

P51MD : P51 function selection
bits : 4 - 11 (8 bit)
access : read-write

P52MD : P52 function selection
bits : 8 - 19 (12 bit)
access : read-write

P53MD : P53 function selection
bits : 12 - 27 (16 bit)
access : read-write

P54MD : P54 function selection
bits : 16 - 35 (20 bit)
access : read-write

P55MD : P55 function selection
bits : 20 - 43 (24 bit)
access : read-write

P56MD : P56 function selection
bits : 24 - 51 (28 bit)
access : read-write

P57MD : P57 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP6MD

Port 6 Mode Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP6MD IOP6MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P60MD P61MD P62MD P63MD P64MD P65MD P66MD P67MD

P60MD : P60 function selection
bits : 0 - 3 (4 bit)
access : read-write

P61MD : P61 function selection
bits : 4 - 11 (8 bit)
access : read-write

P62MD : P62 function selection
bits : 8 - 19 (12 bit)
access : read-write

P63MD : P63 function selection
bits : 12 - 27 (16 bit)
access : read-write

P64MD : P64 function selection
bits : 16 - 35 (20 bit)
access : read-write

P65MD : P65 function selection
bits : 20 - 43 (24 bit)
access : read-write

P66MD : P66 function selection
bits : 24 - 51 (28 bit)
access : read-write

P67MD : P67 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP7MD

Port 7 Mode Register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP7MD IOP7MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P70MD P71MD P72MD P73MD P74MD P75MD P76MD P77MD

P70MD : P70 function selection
bits : 0 - 3 (4 bit)
access : read-write

P71MD : P71 function selection
bits : 4 - 11 (8 bit)
access : read-write

P72MD : P72 function selection
bits : 8 - 19 (12 bit)
access : read-write

P73MD : P73 function selection
bits : 12 - 27 (16 bit)
access : read-write

P74MD : P74 function selection
bits : 16 - 35 (20 bit)
access : read-write

P75MD : P75 function selection
bits : 20 - 43 (24 bit)
access : read-write

P76MD : P76 function selection
bits : 24 - 51 (28 bit)
access : read-write

P77MD : P77 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPAOUT

Port A Output Register
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPAOUT IOPAOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0OUT PA1OUT PA2OUT PA3OUT PA4OUT PA5OUT PA6OUT PA7OUT

PA0OUT : Set output data of PA0
bits : 0 - 0 (1 bit)
access : read-write

PA1OUT : Set output data of PA1
bits : 1 - 2 (2 bit)
access : read-write

PA2OUT : Set output data of PA2
bits : 2 - 4 (3 bit)
access : read-write

PA3OUT : Set output data of PA3
bits : 3 - 6 (4 bit)
access : read-write

PA4OUT : Set output data of PA4
bits : 4 - 8 (5 bit)
access : read-write

PA5OUT : Set output data of PA5
bits : 5 - 10 (6 bit)
access : read-write

PA6OUT : Set output data of PA6
bits : 6 - 12 (7 bit)
access : read-write

PA7OUT : Set output data of PA7
bits : 7 - 14 (8 bit)
access : read-write


IOP8MD

Port 8 Mode Register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP8MD IOP8MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P80MD P81MD P82MD P83MD P84MD P85MD P86MD P87MD

P80MD : P80 function selection
bits : 0 - 3 (4 bit)
access : read-write

P81MD : P81 function selection
bits : 4 - 11 (8 bit)
access : read-write

P82MD : P82 function selection
bits : 8 - 19 (12 bit)
access : read-write

P83MD : P83 function selection
bits : 12 - 27 (16 bit)
access : read-write

P84MD : P84 function selection
bits : 16 - 35 (20 bit)
access : read-write

P85MD : P85 function selection
bits : 20 - 43 (24 bit)
access : read-write

P86MD : P86 function selection
bits : 24 - 51 (28 bit)
access : read-write

P87MD : P87 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOP9MD

Port 9 Mode Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOP9MD IOP9MD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 P90MD P91MD P92MD P93MD P94MD P95MD P96MD P97MD

P90MD : P90 function selection
bits : 0 - 3 (4 bit)
access : read-write

P91MD : P91 function selection
bits : 4 - 11 (8 bit)
access : read-write

P92MD : P92 function selection
bits : 8 - 19 (12 bit)
access : read-write

P93MD : P93 function selection
bits : 12 - 27 (16 bit)
access : read-write

P94MD : P94 function selection
bits : 16 - 35 (20 bit)
access : read-write

P95MD : P95 function selection
bits : 20 - 43 (24 bit)
access : read-write

P96MD : P96 function selection
bits : 24 - 51 (28 bit)
access : read-write

P97MD : P97 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPAMD

Port A Mode Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPAMD IOPAMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0MD PA1MD PA2MD PA3MD PA4MD PA5MD PA6MD PA7MD

PA0MD : PA0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PA1MD : PA1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PA2MD : PA2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PA3MD : PA3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PA4MD : PA4 function selection
bits : 16 - 35 (20 bit)
access : read-write

PA5MD : PA5 function selection
bits : 20 - 43 (24 bit)
access : read-write

PA6MD : PA6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PA7MD : PA7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPBMD

Port B Mode Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPBMD IOPBMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PB0MD PB1MD PB2MD PB3MD PB4MD __reserve0 PB6MD PB7MD

PB0MD : PB0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PB1MD : PB1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PB2MD : PB2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PB3MD : PB3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PB4MD : PB4 function selection
bits : 16 - 35 (20 bit)
access : read-write

__reserve0 : -
bits : 20 - 43 (24 bit)
access : read-write

PB6MD : PB6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PB7MD : PB7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPBOUT

Port B Output Register
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBOUT IOPBOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0OUT PB1OUT PB2OUT PB3OUT PB4OUT __reserve0 PB6OUT PB7OUT

PB0OUT : Set output data of PB0
bits : 0 - 0 (1 bit)
access : read-write

PB1OUT : Set output data of PB1
bits : 1 - 2 (2 bit)
access : read-write

PB2OUT : Set output data of PB2
bits : 2 - 4 (3 bit)
access : read-write

PB3OUT : Set output data of PB3
bits : 3 - 6 (4 bit)
access : read-write

PB4OUT : Set output data of PB4
bits : 4 - 8 (5 bit)
access : read-write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write

PB6OUT : Set output data of PB6
bits : 6 - 12 (7 bit)
access : read-write

PB7OUT : Set output data of PB7
bits : 7 - 14 (8 bit)
access : read-write


IOPCMD

Port C Mode Register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPCMD IOPCMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PC0MD PC1MD PC2MD PC3MD PC4MD PC5MD PC6MD PC7MD

PC0MD : PC0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PC1MD : PC1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PC2MD : PC2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PC3MD : PC3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PC4MD : PC4 function selection
bits : 16 - 35 (20 bit)
access : read-write

PC5MD : PC5 function selection
bits : 20 - 43 (24 bit)
access : read-write

PC6MD : PC6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PC7MD : PC7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPDMD

Port D Mode Register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPDMD IOPDMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD0MD PD1MD PD2MD PD3MD PD4MD PD5MD PD6MD PD7MD

PD0MD : PD0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PD1MD : PD1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PD2MD : PD2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PD3MD : PD3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PD4MD : PD4 function selection
bits : 16 - 35 (20 bit)
access : read-write

PD5MD : PD5 function selection
bits : 20 - 43 (24 bit)
access : read-write

PD6MD : PD6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PD7MD : PD7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPEMD

Port E Mode Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPEMD IOPEMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PE0MD PE1MD PE2MD PE3MD PE4MD PE5MD PE6MD PE7MD

PE0MD : PE0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PE1MD : PE1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PE2MD : PE2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PE3MD : PE3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PE4MD : PE4 function selection
bits : 16 - 35 (20 bit)
access : read-write

PE5MD : PE5 function selection
bits : 20 - 43 (24 bit)
access : read-write

PE6MD : PE6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PE7MD : PE7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPFMD

Port F Mode Register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0

IOPFMD IOPFMD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF0MD PF1MD PF2MD PF3MD PF4MD PF5MD PF6MD PF7MD

PF0MD : PF0 function selection
bits : 0 - 3 (4 bit)
access : read-write

PF1MD : PF1 function selection
bits : 4 - 11 (8 bit)
access : read-write

PF2MD : PF2 function selection
bits : 8 - 19 (12 bit)
access : read-write

PF3MD : PF3 function selection
bits : 12 - 27 (16 bit)
access : read-write

PF4MD : PF4 function selection
bits : 16 - 35 (20 bit)
access : read-write

PF5MD : PF5 function selection
bits : 20 - 43 (24 bit)
access : read-write

PF6MD : PF6 function selection
bits : 24 - 51 (28 bit)
access : read-write

PF7MD : PF7 function selection
bits : 28 - 59 (32 bit)
access : read-write


IOPCOUT

Port C Output Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCOUT IOPCOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4OUT PC5OUT PC6OUT PC7OUT

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4OUT : Set output data of PC4
bits : 4 - 8 (5 bit)
access : read-write

PC5OUT : Set output data of PC5
bits : 5 - 10 (6 bit)
access : read-write

PC6OUT : Set output data of PC6
bits : 6 - 12 (7 bit)
access : read-write

PC7OUT : Set output data of PC7
bits : 7 - 14 (8 bit)
access : read-write


IOP0PLU

Port 0 Pull-up Control Register
address_offset : 0xC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0PLU IOP0PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P00PLU P01PLU P02PLU P03PLU P04PLU P05PLU P06PLU P07PLU

P00PLU : P00 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P01PLU : P01 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P02PLU : P02 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P03PLU : P03 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P04PLU : P04 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P05PLU : P05 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P06PLU : P06 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P07PLU : P07 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP1PLU

Port 1 Pull-up Control Register
address_offset : 0xC1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1PLU IOP1PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P10PLU P11PLU P12PLU P13PLU P14PLU P15PLU P16PLU P17PLU

P10PLU : P10 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P11PLU : P11 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P12PLU : P12 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P13PLU : P13 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P14PLU : P14 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P15PLU : P15 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P16PLU : P16 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P17PLU : P17 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP2PLU

Port 2 Pull-up Control Register
address_offset : 0xC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2PLU IOP2PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20PLU P21PLU P22PLU __reserve0 P24PLU P25PLU P26PLU P27PLU

P20PLU : P20 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P21PLU : P21 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P22PLU : P22 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P24PLU : P24 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P25PLU : P25 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P26PLU : P26 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P27PLU : P27 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP3PLU

Port 3 Pull-up Control Register
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP3PLU IOP3PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P30PLU P31PLU P32PLU __reserve0 P34PLU P35PLU P36PLU __reserve1

P30PLU : P30 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P31PLU : P31 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P32PLU : P32 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P34PLU : P34 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P35PLU : P35 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P36PLU : P36 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 7 - 14 (8 bit)
access : read


IOP4PLU

Port 4 Pull-up Control Register
address_offset : 0xC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP4PLU IOP4PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P40PLU P41PLU P42PLU __reserve0 P44PLU P45PLU P46PLU P47PLU

P40PLU : P40 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P41PLU : P41 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P42PLU : P42 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 3 - 6 (4 bit)
access : read

P44PLU : P44 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P45PLU : P45 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P46PLU : P46 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P47PLU : P47 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP5PLU

Port 5 Pull-up Control Register
address_offset : 0xC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5PLU IOP5PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P50PLU P51PLU P52PLU P53PLU P54PLU P55PLU P56PLU P57PLU

P50PLU : P50 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P51PLU : P51 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P52PLU : P52 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P53PLU : P53 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P54PLU : P54 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P55PLU : P55 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P56PLU : P56 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P57PLU : P57 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP6PLU

Port 6 Pull-up Control Register
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP6PLU IOP6PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P60PLU P61PLU P62PLU P63PLU P64PLU P65PLU P66PLU P67PLU

P60PLU : P60 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P61PLU : P61 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P62PLU : P62 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P63PLU : P63 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P64PLU : P64 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P65PLU : P65 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P66PLU : P66 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P67PLU : P67 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP7PLU

Port 7 Pull-up Control Register
address_offset : 0xC7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP7PLU IOP7PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P70PLU P71PLU P72PLU P73PLU P74PLU P75PLU P76PLU P77PLU

P70PLU : P70 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P71PLU : P71 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P72PLU : P72 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P73PLU : P73 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P74PLU : P74 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P75PLU : P75 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P76PLU : P76 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P77PLU : P77 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP8PLU

Port 8 Pull-up Control Register
address_offset : 0xC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP8PLU IOP8PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P80PLU P81PLU P82PLU P83PLU P84PLU P85PLU P86PLU P87PLU

P80PLU : P80 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P81PLU : P81 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P82PLU : P82 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P83PLU : P83 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P84PLU : P84 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P85PLU : P85 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P86PLU : P86 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P87PLU : P87 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOP9PLU

Port 9 Pull-up Control Register
address_offset : 0xC9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP9PLU IOP9PLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P90PLU P91PLU P92PLU P93PLU P94PLU P95PLU P96PLU P97PLU

P90PLU : P90 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

P91PLU : P91 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

P92PLU : P92 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

P93PLU : P93 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

P94PLU : P94 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

P95PLU : P95 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

P96PLU : P96 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

P97PLU : P97 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPAPLU

Port A Pull-up Control Register
address_offset : 0xCA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPAPLU IOPAPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PA0PLU PA1PLU PA2PLU PA3PLU PA4PLU PA5PLU PA6PLU PA7PLU

PA0PLU : PA0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

PA1PLU : PA1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

PA2PLU : PA2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

PA3PLU : PA3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

PA4PLU : PA4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

PA5PLU : PA5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

PA6PLU : PA6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PA7PLU : PA7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPBPLU

Port B Pull-up Control Register
address_offset : 0xCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPBPLU IOPBPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PB0PLU PB1PLU PB2PLU PB3PLU PB4PLU __reserve0 PB6PLU PB7PLU

PB0PLU : PB0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

PB1PLU : PB1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

PB2PLU : PB2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

PB3PLU : PB3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

PB4PLU : PB4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

__reserve0 : -
bits : 5 - 10 (6 bit)
access : read-write

PB6PLU : PB6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PB7PLU : PB7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPCPLU

Port C Pull-up Control Register
address_offset : 0xCC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPCPLU IOPCPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PC4PLU PC5PLU PC6PLU PC7PLU

__reserve0 : 0 is always read out.
bits : 0 - 3 (4 bit)
access : read

PC4PLU : PC4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

PC5PLU : PC5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

PC6PLU : PC6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PC7PLU : PC7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPDPLU

Port D Pull-up Control Register
address_offset : 0xCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDPLU IOPDPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2PLU PD3PLU PD4PLU PD5PLU PD6PLU PD7PLU

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2PLU : PD2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

PD3PLU : PD3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

PD4PLU : PD4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

PD5PLU : PD5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

PD6PLU : PD6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PD7PLU : PD7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPEPLU

Port E Pull-up Control Register
address_offset : 0xCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPEPLU IOPEPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2PLU PE3PLU PE4PLU PE5PLU PE6PLU PE7PLU

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2PLU : PE2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

PE3PLU : PE3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

PE4PLU : PE4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

PE5PLU : PE5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

PE6PLU : PE6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PE7PLU : PE7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPFPLU

Port F Pull-up Control Register
address_offset : 0xCF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFPLU IOPFPLU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0PLU PF1PLU PF2PLU PF3PLU PF4PLU PF5PLU PF6PLU PF7PLU

PF0PLU : PF0 pull-up resistor selection
bits : 0 - 0 (1 bit)
access : read-write

PF1PLU : PF1 pull-up resistor selection
bits : 1 - 2 (2 bit)
access : read-write

PF2PLU : PF2 pull-up resistor selection
bits : 2 - 4 (3 bit)
access : read-write

PF3PLU : PF3 pull-up resistor selection
bits : 3 - 6 (4 bit)
access : read-write

PF4PLU : PF4 pull-up resistor selection
bits : 4 - 8 (5 bit)
access : read-write

PF5PLU : PF5 pull-up resistor selection
bits : 5 - 10 (6 bit)
access : read-write

PF6PLU : PF6 pull-up resistor selection
bits : 6 - 12 (7 bit)
access : read-write

PF7PLU : PF7 pull-up resistor selection
bits : 7 - 14 (8 bit)
access : read-write


IOPDOUT

Port D Output Register
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPDOUT IOPDOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PD2OUT PD3OUT PD4OUT PD5OUT PD6OUT PD7OUT

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PD2OUT : Set output data of PD2
bits : 2 - 4 (3 bit)
access : read-write

PD3OUT : Set output data of PD3
bits : 3 - 6 (4 bit)
access : read-write

PD4OUT : Set output data of PD4
bits : 4 - 8 (5 bit)
access : read-write

PD5OUT : Set output data of PD5
bits : 5 - 10 (6 bit)
access : read-write

PD6OUT : Set output data of PD6
bits : 6 - 12 (7 bit)
access : read-write

PD7OUT : Set output data of PD7
bits : 7 - 14 (8 bit)
access : read-write


IOPEOUT

Port E Output Register
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPEOUT IOPEOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 PE2OUT PE3OUT PE4OUT PE5OUT PE6OUT PE7OUT

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

PE2OUT : Set output data of PE2
bits : 2 - 4 (3 bit)
access : read-write

PE3OUT : Set output data of PE3
bits : 3 - 6 (4 bit)
access : read-write

PE4OUT : Set output data of PE4
bits : 4 - 8 (5 bit)
access : read-write

PE5OUT : Set output data of PE5
bits : 5 - 10 (6 bit)
access : read-write

PE6OUT : Set output data of PE6
bits : 6 - 12 (7 bit)
access : read-write

PE7OUT : Set output data of PE7
bits : 7 - 14 (8 bit)
access : read-write


IOP0ILV

Port 0 Input Level Selection Register
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP0ILV IOP0ILV read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P06ILV P07ILV

__reserve0 : 0 is always read out.
bits : 0 - 5 (6 bit)
access : read

P06ILV : P06 Input level selection
bits : 6 - 12 (7 bit)
access : read-write

P07ILV : P07 Input level selection
bits : 7 - 14 (8 bit)
access : read-write


IOP1ILV

Port 1 Input Level Selection Register
address_offset : 0xE1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP1ILV IOP1ILV read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P12ILV P13ILV P14ILV P15ILV __reserve1

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

P12ILV : P12 Input level selection
bits : 2 - 4 (3 bit)
access : read-write

P13ILV : P13 Input level selection
bits : 3 - 6 (4 bit)
access : read-write

P14ILV : P14 Input level selection
bits : 4 - 8 (5 bit)
access : read-write

P15ILV : P15 Input level selection
bits : 5 - 10 (6 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 6 - 13 (8 bit)
access : read


IOP2ILV

Port 2 Input Level Selection Register
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP2ILV IOP2ILV read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 P20ILV P21ILV __reserve0

P20ILV : P20 Input level selection
bits : 0 - 0 (1 bit)
access : read-write

P21ILV : P21 Input level selection
bits : 1 - 2 (2 bit)
access : read-write

__reserve0 : 0 is always read out.
bits : 2 - 9 (8 bit)
access : read


IOP5ILV

Port 5 Input Level Selection Register
address_offset : 0xE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOP5ILV IOP5ILV read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 __reserve0 P52ILV P53ILV __reserve1

__reserve0 : 0 is always read out.
bits : 0 - 1 (2 bit)
access : read

P52ILV : P52 Input level selection
bits : 2 - 4 (3 bit)
access : read-write

P53ILV : P53 Input level selection
bits : 3 - 6 (4 bit)
access : read-write

__reserve1 : 0 is always read out.
bits : 4 - 11 (8 bit)
access : read


IOPFOUT

Port F Output Register
address_offset : 0xF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0

IOPFOUT IOPFOUT read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PF0OUT PF1OUT PF2OUT PF3OUT PF4OUT PF5OUT PF6OUT PF7OUT

PF0OUT : Set output data of PF0
bits : 0 - 0 (1 bit)
access : read-write

PF1OUT : Set output data of PF1
bits : 1 - 2 (2 bit)
access : read-write

PF2OUT : Set output data of PF2
bits : 2 - 4 (3 bit)
access : read-write

PF3OUT : Set output data of PF3
bits : 3 - 6 (4 bit)
access : read-write

PF4OUT : Set output data of PF4
bits : 4 - 8 (5 bit)
access : read-write

PF5OUT : Set output data of PF5
bits : 5 - 10 (6 bit)
access : read-write

PF6OUT : Set output data of PF6
bits : 6 - 12 (7 bit)
access : read-write

PF7OUT : Set output data of PF7
bits : 7 - 14 (8 bit)
access : read-write



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