\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :
address_offset : 0xFC Bytes (0x0)
size : 0xCC byte (0x0)
mem_usage : registers
protection :
DPWM Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FIFOWIDTH : FIFO Data Width
This bit field is used to define the bit-width of data word and valid bits in register DPWM_FIFO.
Note: When FLTEN is 0 , FIFOWIDTH is for fixed point setting.
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 0
The bit-width of data word is 24-bit, valid bits is DPWM_FIFO[31:8]
#01 : 1
The bit-width of data word is 16-bit, valid bits is DPWM_FIFO[15:0]
#10 : 2
The bit-width of data word is 8-bit, valid bits is DPWM_FIFO[7:0]
#11 : 3
The bit-width of data word is 24-bit, valid bits is DPWM_FIFO[23:0]
End of enumeration elements list.
DEADTIME : Driver Dead Time Control.
Enabling this bit will insert an additional clock cycle deadtime into the switching of PMOS and NMOS driver transistors.
bits : 3 - 3 (1 bit)
access : read-write
DPWMEN : Audio DPWM Modulator Enable
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#0 : 0
Audio DPWM modulator Disabled
#1 : 1
Audio DPWM modulator Enabled
End of enumeration elements list.
DRVEN : Driver Enable Bit
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Audio DPWM driver Disabled
#1 : 1
Audio DPWM driver Enabled
End of enumeration elements list.
THIE : FIFO Threshold Interrupt
bits : 11 - 11 (1 bit)
access : read-write
Enumeration:
#0 : 0
FIFO threshold interrupt Disabled
#1 : 1
FIFO threshold interrupt Enabled
End of enumeration elements list.
TH : FIFO Threshold Level
If the valid data count of the FIFO data buffer is less than or equal to TH (DPWM_CTL[16:12]) setting, the THIF (DPWM_STATUS[2]) will set to 1, else the THIF (DPWM_STATUS[2]) will be cleared to 0.
bits : 12 - 16 (5 bit)
access : read-write
FLTINTBIT : Floating Integer Bits Setting
bits : 17 - 19 (3 bit)
access : read-write
Enumeration:
#000 : 0
Integer is 0, Data range +/- 0.999
#001 : 1
Integer is 1, Data range +/- 1.9999
#010 : 2
Integer is 2, Data range +/- 3.9999
End of enumeration elements list.
FLTEN : Floating Point Format Enable Bit
bits : 20 - 20 (1 bit)
access : read-write
Enumeration:
#0 : 0
Input data is fixed point
#1 : 1
Input data is single precision point
End of enumeration elements list.
BIQON : BIQ Enable Bit
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
Biquad filter Disabled
#1 : 1
Biquad filter Enabled
End of enumeration elements list.
SPLTON : Splitter Enable Bit
Note: Splitter shared biquad filter 4 bands, the minimum number of BIQBANDNUM is 4, if splitter is enabled.
bits : 22 - 22 (1 bit)
access : read-write
Enumeration:
#0 : 0
4-band splitter Disabled
#1 : 1
4-band splitter Enabled
End of enumeration elements list.
BIQBANDNUM : BIQ Band Number Setting (Total 10 Bands)
This field represents the required number of bands. The minimum number is 1 and can up to 10 when user enables biquad filter or splitter.
bits : 24 - 27 (4 bit)
access : read-write
FCLR : FIFO Clear
Note 1: To clear the FIFO, need to write FCLR (DPWM_CTL[29:28]) to 11b, and can read the EMPTY (DPWM_STATUS[1]) bit to make sure that the FIFO has been cleared.
Note 2: This field is auto cleared by hardware.
bits : 28 - 29 (2 bit)
access : read-write
Enumeration:
#11 : 3
Clear the FIFO
End of enumeration elements list.
CLKSET : Working Clock Selection
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
512 fs working clock
#1 : 1
500 fs working clock
End of enumeration elements list.
DPWM Zero Order Hold Division Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ZOHDIV : Zero Order Hold, Down-sampling Divisor
The input sample rate of the DPWM is set by DPWM_CLK frequency and the divisor set in this register by the following formula:
bits : 0 - 7 (8 bit)
access : read-write
CLKDIV : Clock Divider
Divider to generate the DPWM_CLK
where F_ DPWM _CLK_SRC is the frequency of DPWM module clock source, which is defined in the clock control register DPWMSEL (CLK_CLKSEL2[13:12]) and F_DPWM_CLK is the frequency of DPWM module working clock (DPWM_CLK).
Note 1: If fs is 48 kHz, the frequency of DPWM_CLK must be 24.576 MHz or 24 MHz according to the value of CLKSET (DPWM_CTL[31]).
Note 2: If fs is 96 kHz, the frequency of DPWM_CLK must be 49.152 MHz or 48 MHz according to the value of CLKSET (DPWM_CTL[31]).
bits : 8 - 18 (11 bit)
access : read-write
Coefficient B0 Transfer Function for Band 1
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COEFFDAT : Coefficient Data.
bits : 0 - 23 (24 bit)
access : read-write
Coefficient B1 Transfer Function for Band 1
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x104 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 1
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x108 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 1
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x10C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 1
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 2
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 2
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 2
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x11C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 2
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 2
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x124 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 3
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x128 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 3
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x12C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 3
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x130 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 3
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x134 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 3
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x138 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 4
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x13C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DPWM Output Signal Frequency Control Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FREQSEL : Output Signal FrequencySelection
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
#00 : 0
Output signal frequency is 384 kHz
#01 : 1
Output signal frequency is 307 kHz.
Output signal frequency depends on STEPSEL (DPWM_FREQ[10:8])
End of enumeration elements list.
STEPSEL : Output Signal Frequency
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
#000 : 0
Output signal frequency is 614 kHz
#001 : 1
Output signal frequency is 512 kHz
#010 : 2
Output signal frequency is 438 kHz
#011 : 3
Output signal frequency is 384 kHz
#100 : 4
Output signal frequency is 341 kHz
#101 : 5
Output signal frequency is 307 kHz
End of enumeration elements list.
Coefficient B1 Transfer Function for Band 4
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 4
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x144 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 4
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x148 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 4
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x14C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 5
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x150 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 5
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x154 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 5
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x158 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 5
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x15C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 5
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x160 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 6
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x164 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 6
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x168 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 6
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x16C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 6
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x170 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 6
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x174 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 7
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x178 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 7
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x17C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 7
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x180 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 7
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x184 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 7
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x188 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 8
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x18C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 8
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x190 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 8
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x194 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 8
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x198 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 8
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x19C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 9
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1A0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 9
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1A4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 9
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1A8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 9
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1AC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 9
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1B0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B0 Transfer Function for Band 10
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1B4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B1 Transfer Function for Band 10
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1B8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient B2 Transfer Function for Band 10
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1BC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A1 Transfer Function for Band 10
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1C0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Coefficient A2 Transfer Function for Band 10
Fixed Point - 3.21 Format
Floating Point - Single Precision Point
address_offset : 0x1C4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DPWM Status Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FULL : FIFO Full (Read Only)
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
#0 : 0
FIFO is not full
#1 : 1
FIFO is full
End of enumeration elements list.
EMPTY : FIFO Empty (Read Only)
bits : 1 - 1 (1 bit)
access : read-only
Enumeration:
#0 : 0
FIFO is not empty
#1 : 1
FIFO is empty
End of enumeration elements list.
THIF : FIFO Threshold Interrupt Status (Read Only)
bits : 2 - 2 (1 bit)
access : read-only
Enumeration:
#0 : 0
The valid data count within the FIFO data buffer is more than the setting value of TH (DPWM_CTL[16:12])
#1 : 1
The valid data count within the FIFO data buffer is less than or equal to the setting value of TH (DPWM_CTL[16:12])
End of enumeration elements list.
FIFOPTR : FIFO Pointer (Read Only)
The FULL (DPWM_STATUS[0]) and FIFOPTR (DPWM_STATUS[8:4]) indicates the field that the valid data count within the DPWM FIFO buffer.
The maximum value shown in FIFOPTR is 31. When the using level of DPWM FIFO buffer equal to 32, The FULL (DPWM_STATUS[0]) is set to 1.
bits : 4 - 8 (5 bit)
access : read-only
DPWM PDMA Control Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PDMAEN : PDMA Transfer Enable Bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
PDMA data transfer Disabled
#1 : 1
PDMA data transfer Enabled
End of enumeration elements list.
DPWM FIFO Data Input Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
FIFO : FIFO Data Input Register
DPWM contains 32 words (32x32 bit) data buffer for data transmit. A write to this register pushes data onto the FIFO data buffer and increments the write pointer. This is the address that PDMA writes audio data to. The remaining word number is indicated by FIFOPTR (DPWM_STATUS[8:4]).
bits : 0 - 31 (32 bit)
access : write-only
BIQ Coefficient Control
address_offset : 0xFC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRGCOEFF : Coefficient Programming Control
Note: This bit must be truned off when BIQON (DPWM_CTL[21]) in on.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Coefficient RAM is in normal mode
#1 : 1
Coefficient RAM is under programming mode
End of enumeration elements list.
COEFFFLTEN : Coefficient Single Floating Point
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Coefficient is fixed point
#1 : 1
Coefficient is single floating point
End of enumeration elements list.
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