VAD_SINCCTL (SINCCTL)

VAD_CTL0 (CTL0)

VAD_CTL1 (CTL1)

VAD_CTL2 (CTL2)

VAD_CTL3 (CTL3)

VAD_STATUS0 (STATUS0)

VAD_STATUS1 (STATUS1)

PDMED_CTL

PDMED_STATUS

VAD_BIQCTL0 (BIQCTL0)

VAD_BIQCTL1 (BIQCTL1)

VAD_BIQCTL2 (BIQCTL2)

SINCOSR : VAD SINC Filter OSR Setting
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

End of enumeration elements list.

MCLKDIV : Divider to generate the VAD Working Main Clock The value in this field is the frequency divider for generating the VAD working main clock. The frequency is obtained according to the following equation. where HIRC is the frequency of VAD module clock source, which enable HIRC in the System power down control register PWRCTL (CLK_PWRCTL[2])
bits : 16 - 23 (8 bit)
access : read-write

DATAOFF : VAD Sending Data to SRAM Control When the ACTIVE (VAD_STATUS0[31]) goes high, the data will be transferred to SRAM to store which can be used for keyword detection later. After some time, if user needs to stop sending data to SRAM, write this bit to 1.
bits : 28 - 28 (1 bit)
access : read-write

SW : VAD Path Switch Control After the ACTIVE(VAD_STATUS0[31]) goes high, it will automatically switch to the DMIC path. When the CPU is entering idle mode, write 1 to switch back to the VAD path.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACTCL : VAD Active Flag Clear Note: ACTIVE(VAD_STATUS0[31]) STP(VAD_STATUS0[15:0] LTP(VAD_STATUS1[31:16] DEV(VAD_STATUS1[15:0]) are cleared.
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

VADEN : VAD Enable Control Note: When set this bit to 1, DMIC_CLK is generated by VAD module.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

STAT : Short Term Power Attack Time Slow attack (e.g., 0x99): slow responding to voice, but more stable. Fast attack (e.g., 0xCC): fast responding to voice, but more sensitive to other sounds. Suggested default attack time setting: Long term power attack time (0x5), Short term power attack time (0xAA). The 'Short Term Power', in order to detect the instant power of the voices, requires faster attack time, while 'Long Term Power', in order to get the averaged power of the background environment, requires slower attack time to maintain its stability. So the Short term power attack time should be always bigger than the Long term power attack time.
bits : 0 - 7 (8 bit)
access : read-write

LTAT : Long Term Power Attack Time Slow attack (e.g., 0x5): less sensitive to environment change. Fast attack (e.g., 0x8): more sensitive to environment change.
bits : 16 - 19 (4 bit)
access : read-write

STPTHU : Short Term Power Threshold Upper Limit To check if the incoming signal is big enough to be ready for VAD activation.
bits : 0 - 15 (16 bit)
access : read-write

STPTHL : Short Term Power Threshold Lower Limit To check if the incoming signal is small enough so that VAD status can be terminated.
bits : 16 - 31 (16 bit)
access : read-write

LTTHRE : Long Term Power Threshold To check the background energy, also serve as the lower limit of long term power. When the long term power value is lower than the threshold, it will be set to the threshold value for VAD decision.
bits : 16 - 31 (16 bit)
access : read-write

DEVTHRE : Deviation Threshold To check if the incoming signal is substantially bigger than its background. This may work to exclude breath sound as it is slowly varying, but not other sounds (e.g., footsteps, hand claps) with sudden amplitude increase. Small: easy to trigger, good for far-field pick-up, but requiring quiet environment. Large: good for handheld applications, but requiring louder voice to trigger.
bits : 0 - 15 (16 bit)
access : read-write

HOT : Hang Over time Hang Over time setting, means how many clocks (CLKSD) of the ACTIVE (VAD_STATUS0[31]) staying high when the calculation is no longer bigger than the threshold
bits : 16 - 31 (16 bit)
access : read-write

STP : Short Term Signal Power (Read Only) This field shows the short term signal power value.
bits : 0 - 15 (16 bit)
access : read-only

ACTIVE : VAD Activation Flag (Read Only) When the voice active event occurs, this bit will be set to 1.
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

DEV : Deviation (Read Only) This field shows deviation of the Long Term Signal Power and Short Term Signal Power.
bits : 0 - 15 (16 bit)
access : read-only

LTP : Long Term Signal Power (Read Only) This field shows the long term signal power value.
bits : 16 - 31 (16 bit)
access : read-only

PDMEDEN : PDMED Enable Control
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OSCEN : PDMED 512K Oscillator Enable Control
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DMCH : DMIC Channel Selection
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PDMEDTH : PDMED Threshold Limit To check if the incoming signal is big enough to be ready for PED activation.
bits : 8 - 13 (6 bit)
access : read-write

ACTIVE : Pulse Density Modulation Energy Dection Output to Decision Logic When the voice active event occurs, this bit will be set to 1.
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

BIQA1 : VAD Biquad Filter Coefficient Biquad Filter Coefficient a1, in 3 intergers + 13 fractional bits
bits : 0 - 15 (16 bit)
access : read-write

BIQA2 : VAD Biquad Filter Coefficient Biquad Filter Coefficient a2, in 3 intergers + 13 fractional bits.
bits : 16 - 31 (16 bit)
access : read-write

BIQB0 : VAD Biquad Filter Coefficient Biquad Filter Coefficient b0, in 3 intergers + 13 fractional bits.
bits : 0 - 15 (16 bit)
access : read-write

BIQB1 : VAD Biquad Filter Coefficient Biquad Filter Coefficient b1, in 3 intergers + 13 fractional bits.
bits : 16 - 31 (16 bit)
access : read-write

BIQB2 : VAD Biquad Filter Coefficient Biquad Filter Coefficient b2, in 3 intergers + 13 fractional bits.
bits : 0 - 15 (16 bit)
access : read-write

BIQEN : VAD Biquad Filter Enable Bit
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.