SYS_REGLCTL (REGLCTL)

SYS_IRCTCTL (IRCTCTL)

SYS_PASMTEN (PASMTEN)

SYS_PBSMTEN (PBSMTEN)

SYS_GPA_MFP (GPA_MFP)

SYS_GPB_MFP (GPB_MFP)

SYS_RSTSTS (RSTSTS)

SYS_WKCTL (WKCTL)

SYS_IPRST0 (IPRST0)

SYS_IPRST1 (IPRST1)

REGLCTL : Protected Register Unlock Register
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FREQ0SEL : 8 Bit Trim For Oscillator FREQ0SEL [7:5] are 8 coarse trim ranges which overlap in frequency. FREQ0SEL [4:0] are 32 fine trim steps of approximately 0.5% resolution.
bits : 0 - 7 (8 bit)
access : read-write

RGE0SEL : Range Bit For Oscillator
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

FREQ1SEL : 8 Bit Trim For Oscillator FREQ1SEL [7:5] are 8 coarse trim ranges which overlap in frequency. FREQ1SEL [4:0] are 32 fine trim steps of approximately 0.5% resolution.
bits : 16 - 23 (8 bit)
access : read-write

RGE1SEL : Range Bit For Oscillator
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN16 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN17 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN18 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN19 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN20 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN21 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN22 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN23 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN24 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 24 - 24 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN25 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 25 - 25 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN26 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 26 - 26 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN27 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 27 - 27 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN28 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN29 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN30 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN31 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN16 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN17 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 17 - 17 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN18 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN19 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN20 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN21 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN22 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SMTEN23 : Schmitt Trigger This register controls whether the GPIO input buffer Schmitt trigger is enabled.
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA0MFP : Alternate Function Setting For PA0MFP
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA1MFP : Alternate Function Setting For PA1MFP
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA2MFP : Alternate Function Setting For PA2MFP
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA3MFP : Alternate Function Setting For PA3MFP
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA4MFP : Alternate Function Setting For PA4MFP
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA5MFP : Alternate Function Setting For PA5MFP
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA6MFP : Alternate Function Setting For PA6MFP
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA7MFP : Alternate Function Setting For PA7MFP
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA8MFP : Alternate Function Setting For PA8MFP
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA9MFP : Alternate Function Setting For PA0MFP
bits : 18 - 19 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA10MFP : Alternate Function Setting For PA10MFP
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA11MFP : Alternate Function Setting For PA11MFP
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA12MFP : Alternate Function Setting For PA12MFP
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA13MFP : Alternate Function Setting For PA13MFP
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA14MFP : Alternate Function Setting For PA14MFP
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PA15MFP : Alternate Function Setting For PA15MFP
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB0MFP : Alternate Function Setting For PB0MFP
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB1MFP : Alternate Function Setting For PB1MFP
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB2MFP : Alternate Function Setting For PB2MFP
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB3MFP : Alternate Function Setting For PB3MFP
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB4MFP : Alternate Function Setting For PB4MFP
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB5MFP : Alternate Function Setting For PB5MFP
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB6MFP : Alternate Function Setting For PB6MFP
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PB7MFP : Alternate Function Setting For PB7MFP
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CORERSTF : Reset Source From CORE The CORERSTF flag is set if the core has been reset. Possible sources of reset are a Power-On Reset (POR), RESETn Pin Reset or PMU reset. This bit is cleared by writing 1 to itself.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WDTRF : Reset Source From WDT The WDTRF flag is set if pervious reset source originates from the Watch-Dog module. This bit is cleared by writing 1 to itself.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SYSRF : Reset Source From MCU The SYSRF flag is set if the previous reset source originates from the Cortex_M0 kernel. This bit is cleared by writing 1 to itself.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PMURSTF : Reset Source From PMU The PMURSTF flag is set if the PMU. This bit is cleared by writing 1 to itself.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CPURF : Reset Source From CPU The CPURF flag is set by hardware if software writes SYS_IPRST0.CPURST with a 1 to reset Cortex-M0 CPU kernel and Flash memory controller (FMC). This bit is cleared by writing 1 to itself.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKDIN : State Of Wakeup Pin Read only.
bits : 0 - 0 (1 bit)
access : read-write

WKPUEN : Wakeup Pin Pull-up Control This signal is latched in deep power down and preserved.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKOENB : Wakeup Pin Output Enable Bar
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WKDOUT : Wakeup Output State
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CHIPRST : CHIP One Shot Reset Set this bit will reset the whole chip, this bit will automatically return to 0 after the 2 clock cycles. CHIPRST has same behavior as POR reset, all the chip modules are reset and the chip configuration settings from flash are reloaded. This bit is a protected bit, to program first issue the unlock sequence (see Protected Register Lock Key Register (SYS_REGLCTL))
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CPURST : CPU Kernel One Shot Reset Setting this bit will reset the CPU kernel and Flash Memory Controller(FMC), this bit will automatically return to 0 after the 2 clock cycles This bit is a protected bit, to program first issue the unlock sequence (see Protected Register Lock Key Register (SYS_REGLCTL))
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PDMARST : PDMA Controller Reset Set 1 will generate a reset signal to the PDMA Block. User needs to set this bit to 0 to release from the reset state
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR0RST : Timer0 Controller Reset
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

TMR1RST : Timer1 Controller Reset
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2C0RST : I2C0 Controller Reset
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SPI0RST : SPI0 Controller Reset
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DPWMRST : DPWM Speaker Driver Reset
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

UART0RST : UART0 Controller Reset
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

BIQRST : Biquad Filter Block Reset
bits : 18 - 18 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CRCRST : CRC Generation Block Reset
bits : 19 - 19 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

PWM0RST : PWM10 controller Reset
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ACMPRST : Analog Comparator Reset
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

EADCRST : ADC Controller Reset
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

I2S0RST : I2S Controller Reset
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

ANARST : Analog Block Control Reset
bits : 30 - 30 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.