\n
address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
ALC Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NGTHBST : Noise Gate Threshold
Boost disabled: Threshold aaa (-81+6xNGTHBST) dB
Boost enabled: Threshold aaa (-87+6xNGTHBST) dB
bits : 0 - 2 (3 bit)
access : read-write
NGEN : Noise Gate Enable
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Noise gate disabled
#1 : 1
Noise gate enabled
End of enumeration elements list.
ATKSEL : ALC Attack Time
(Value: 0~10)
When MODESEL aaa 0, Range: 500us to 512ms
When MODESEL aaa 1,Range: 125us to 128ms (Both ALC time doubles with every step)
bits : 4 - 7 (4 bit)
access : read-write
DECAYSEL : ALC Decay Time
(Value: 0~10)
When MODESEL aaa 0, Range: 125us to 128ms
When MODESEL aaa 1, Range: 31us to 32ms (time doubles with every step)
bits : 8 - 11 (4 bit)
access : read-write
MODESEL : ALC Mode
bits : 12 - 12 (1 bit)
access : read-write
Enumeration:
#0 : 0
ALC normal operation mode
#1 : 1
ALC limiter mode
End of enumeration elements list.
TARGETLV : ALC Target Level
bits : 13 - 16 (4 bit)
access : read-write
Enumeration:
0 : 0
-28.5 dB
1 : 1
-27 dB
2 : 2
-25.5 dB
3 : 3
-24 dB
4 : 4
-22.5 dB
5 : 5
-21 dB
6 : 6
-19.5 dB
7 : 7
-18 dB
8 : 8
-16.5 dB
9 : 9
-15 dB
10 : 10
-13.5 dB
11 : 11
-12 dB
12 : 12
-10.5 dB
13 : 13
-9 dB
14 : 14
-7.5 dB
15 : 15
-6 dB
End of enumeration elements list.
HOLDTIME : ALC Hold Time
(Value: 0~10). Hold Time aaa (2^HOLDTIME) ms
bits : 17 - 20 (4 bit)
access : read-write
ZCEN : ALC Zero Crossing
bits : 21 - 21 (1 bit)
access : read-write
Enumeration:
#0 : 0
zero crossing disabled
#1 : 1
zero crossing enabled
End of enumeration elements list.
MINGAIN : ALC Minimum Gain
bits : 22 - 24 (3 bit)
access : read-write
Enumeration:
0 : 0
-12 dB
1 : 1
-6 dB
2 : 2
0 dB
3 : 3
6 dB
4 : 4
12 dB
5 : 5
18 dB
6 : 6
24 dB
7 : 7
30 dB
End of enumeration elements list.
MAXGAIN : ALC Maximum Gain
bits : 25 - 27 (3 bit)
access : read-write
Enumeration:
0 : 0
-6.75 dB
1 : 1
-0.75 dB
2 : 2
+5.25 dB
3 : 3
+11.25 dB
4 : 4
+17.25 dB
5 : 5
+23.25 dB
6 : 6
+29.25 dB
7 : 7
+35.25 dB
End of enumeration elements list.
ALCEN : ALC select
bits : 28 - 28 (1 bit)
access : read-write
Enumeration:
#0 : 0
ALC disabled (default)
#1 : 1
ALC enabled
End of enumeration elements list.
NGPKSEL : ALC noise gate peak detector select
bits : 29 - 29 (1 bit)
access : read-write
Enumeration:
#0 : 0
use peak-to-peak value for noise gate threshold determination (default)
#1 : 1
use absolute peak value for noise gate threshold determination
End of enumeration elements list.
PKSEL : ALC gain peak detector select
bits : 30 - 30 (1 bit)
access : read-write
Enumeration:
#0 : 0
use absolute peak value for ALC training (default)
#1 : 1
use peak-to-peak value for ALC training
End of enumeration elements list.
PKLIMEN : ALC peak limiter enable
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
enable fast decrement when signal exceeds 87.5% of full scale (default)
#1 : 1
disable fast decrement when signal exceeds 87.5% of full scale
End of enumeration elements list.
ALC status register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CLIPFLAG : Clipping Flag
Asserted when signal level is detected to be above 87.5% of full scale
bits : 0 - 0 (1 bit)
access : read-only
NOISEF : Noise Flag
Asserted when signal level is detected to be below NGTHBST
bits : 1 - 1 (1 bit)
access : read-only
P2PVAL : Peak-To-Peak Value
9 MSBs of measured peak-to-peak value
bits : 2 - 10 (9 bit)
access : read-only
PEAKVAL : Peak Value
9 MSBs of measured absolute peak value
bits : 11 - 18 (8 bit)
access : read-only
ALC interrupt register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTFLAG : ALC interrupt flag
This interrupt flag asserts whenever the interrupt is enabled and the PGA gain is updated, either through an ALC change with the ALC enabled or through a PGA gain write with the ALC disabled.
Write a 1 to this register to clear.
bits : 0 - 0 (1 bit)
access : read-write
ALC interrupt enable register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTEN : ALC Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
ALC INT disabled
#1 : 1
ALC INT enabled
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.