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SYS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x18 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x30 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

address_offset : 0x40 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x4C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x54 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x5C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

address_offset : 0xF0 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x110 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

Registers

SYS_PDID (PDID)

SYS_REGLCTL (REGLCTL)

SYS_OSCTRIM (OSCTRIM)

SYS_OSC10K (OSC10K)

SYS_OSC_TRIMn (OSC_TRIMn)

SYS_BODCTL (BODCTL)

SYS_GPA_MFP (GPA_MFP)

SYS_GPB_MFP (GPB_MFP)

SYS_ICE_MFP (ICE_MFP)

SYS_RSTSTS (RSTSTS)

SYS_GPIO_INTP (GPIO_INTP)

SYS_GPA_PULL (GPA_PULL)

SYS_GPA_IEN (GPA_IEN)

SYS_GPB_PULL (GPB_PULL)

SYS_GPB_IEN (GPB_IEN)

SYS_IPRST0 (IPRST0)

SYS_IPRST1 (IPRST1)

SYS_IMGMAP3 (IMGMAP3)

SYS_DEVICEID (DEVICEID)

SYS_IMGMAP0 (IMGMAP0)

SYS_IMGMAP1 (IMGMAP1)


SYS_PDID (PDID)

Product Identifier Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYS_PDID SYS_PDID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMG2

IMG2 : Product Identifier Data in MAP2 of information block are copied to this register after power on. MAP2 is used to store part number defined by Nuvoton.
bits : 0 - 15 (16 bit)
access : read-only


SYS_REGLCTL (REGLCTL)

Register Lock Control Register
address_offset : 0x100 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_REGLCTL SYS_REGLCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SYS_OSCTRIM (OSCTRIM)

Internal Oscillator Trim Register
address_offset : 0x110 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_OSCTRIM SYS_OSCTRIM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OSC10K_TRIM TRM_CLK

OSC10K_TRIM : 23bit trim for 10kHz oscillator.
bits : 0 - 22 (23 bit)
access : read-write

TRM_CLK : Must be toggled to load a new OSC10K_TRIM
bits : 31 - 31 (1 bit)
access : read-write


SYS_OSC10K (OSC10K)

10kHz oscillator and bias trim register
address_offset : 0x114 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_OSC10K SYS_OSC10K read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SYS_OSC_TRIMn (OSC_TRIMn)

Internal Oscillator Trim Register
address_offset : 0x118 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_OSC_TRIMn SYS_OSC_TRIMn read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TRIM EN2MHZ

TRIM : 16bit sign extended representation of 10bit trim. OSC_TRIM[0] maps to above-mentioned OSCTRIM. OSC_TRIM[1] and OSC_TRIM[2] are reserved.
bits : 0 - 15 (16 bit)
access : read-write

EN2MHZ : 1: Low Frequency mode of oscillator active (2MHz). 0: High frequency mode (20-50MHz)
bits : 31 - 31 (1 bit)
access : read-write


SYS_BODCTL (BODCTL)

Brown-out Detector Control Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_BODCTL SYS_BODCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOD_EN BOD_RSTEN BOD_LVL BOD_HYS BOD_OUT BOD_INT LVR_EN LVR_FILTER

BOD_EN : Brown-Out Detector Enable (Initialized and Protected Bit) The default value is set by flash controller as inverse of user configuration CBODEN bit (config0 [20]).
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Brown-Out Detector function is disabled

#1 : 1

Brown-Out Detector function enabled

End of enumeration elements list.

BOD_RSTEN : Brown-Out Detector Reset or Interrupt Bit (Initialized and Protected Bit) The default value is set by flash controller as inverse of user configuration CBORST bit (config0 [21]). When the BOD is enabled and the interrupt is asserted, the interrupt will be kept till the BOD is disabled. The interrupt for CPU can be blocked either by disabling the interrupt in the NVIC or by disabling the interrupt source by disabling the BOD. BOD can then be re-enabled as required.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Brown-Out Detector generate an interrupt

#1 : 1

Brown-Out Detector will reset chip

End of enumeration elements list.

BOD_LVL : Brown-Out Detector Threshold Voltage Selection (Initialized and Protected Bit)
bits : 2 - 5 (4 bit)
access : read-write

BOD_HYS : Brown-Out Detector Hysteresis (Initialized and Protected Bit) The default value is set by flash controller user configuration CBOV[4] bit (config0 [26]).
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

No hysteresis on BOD detection

#1 : 1

BOD hysteresis enabled

End of enumeration elements list.

BOD_OUT : Brown-Out Detector Output State
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Brown-out Detector status output is 0, the detected voltage is higher than BOD_VL setting

#1 : 1

Brown-out Detector status output is 1, the detected voltage is lower than BOD_VL setting

End of enumeration elements list.

BOD_INT : Brown-Out Detector Interrupt
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#1 : 1

indicates BOD_INT is active. Write 1 to clear

End of enumeration elements list.

LVR_EN : Low Voltage Reset (LVR) Enable (Initialized and Protected Bit) The LVR function resets the chip when the input power voltage is lower than LVR trip point. Default value is set by flash controller as inverse of CLVR (config0 [27]).
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable LVR function

#1 : 1

Enable LVR function

End of enumeration elements list.

LVR_FILTER : Default value is 00
bits : 17 - 18 (2 bit)
access : read-write

Enumeration:

#00 : 0

LVR output will be filtered by1 HCLK

#01 : 1

LVR output will be filtered by 2 HCLK

#10 : 2

LVR output will be filtered by 8 HCLK

#11 : 3

LVR output will be filtered by 15 HCLK

End of enumeration elements list.


SYS_GPA_MFP (GPA_MFP)

GPIO PA Multiple Alternate Functions Control Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPA_MFP SYS_GPA_MFP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PA0MFP PA1MFP PA2MFP PA3MFP PA4MFP PA5MFP PA6MFP PA7MFP PA8MFP PA9MFP PA10MFP PA11MFP PA12MFP PA13MFP PA14MFP PA15MFP

PA0MFP : PA.0 Multi-function Pin Selection
bits : 0 - 1 (2 bit)
access : read-write

PA1MFP : PA.1 Multi-function Pin Selection
bits : 2 - 3 (2 bit)
access : read-write

PA2MFP : PA.2 Multi-function Pin Selection
bits : 4 - 5 (2 bit)
access : read-write

PA3MFP : PA.3 Multi-function Pin Selection
bits : 6 - 7 (2 bit)
access : read-write

PA4MFP : PA.4 Multi-function Pin Selection
bits : 8 - 9 (2 bit)
access : read-write

PA5MFP : PA.5 Multi-function Pin Selection
bits : 10 - 11 (2 bit)
access : read-write

PA6MFP : PA.6 Multi-function Pin Selection
bits : 12 - 13 (2 bit)
access : read-write

PA7MFP : PA.7 Multi-function Pin Selection
bits : 14 - 15 (2 bit)
access : read-write

PA8MFP : PA.8 Multi-function Pin Selection
bits : 16 - 17 (2 bit)
access : read-write

PA9MFP : PA.9 Multi-function Pin Selection
bits : 18 - 19 (2 bit)
access : read-write

PA10MFP : PA.10 Multi-function Pin Selection
bits : 20 - 21 (2 bit)
access : read-write

PA11MFP : PA.11 Multi-function Pin Selection
bits : 22 - 23 (2 bit)
access : read-write

PA12MFP : PA.12 Multi-function Pin Selection
bits : 24 - 25 (2 bit)
access : read-write

PA13MFP : PA.13 Multi-function Pin Selection
bits : 26 - 27 (2 bit)
access : read-write

PA14MFP : PA.14 Multi-function Pin Selection
bits : 28 - 29 (2 bit)
access : read-write

PA15MFP : PA.15 Multi-function Pin Selection
bits : 30 - 31 (2 bit)
access : read-write


SYS_GPB_MFP (GPB_MFP)

GPIO PB Multiple Alternate Functions Control Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPB_MFP SYS_GPB_MFP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PB0MFP PB1MFP PB2MFP PB3MFP PB4MFP PB5MFP

PB0MFP : PB.0 Multi-function Pin Selection
bits : 0 - 1 (2 bit)
access : read-write

PB1MFP : PB.1 Multi-function Pin Selection
bits : 2 - 3 (2 bit)
access : read-write

PB2MFP : PB.2 Multi-function Pin Selection
bits : 4 - 5 (2 bit)
access : read-write

PB3MFP : PB.3 Multi-function Pin Selection
bits : 6 - 7 (2 bit)
access : read-write

PB4MFP : PB.4 Multi-function Pin Selection
bits : 8 - 9 (2 bit)
access : read-write

PB5MFP : PB.5 Multi-function Pin Selection
bits : 10 - 11 (2 bit)
access : read-write


SYS_ICE_MFP (ICE_MFP)

ICE Multi-function-pin Controller Register
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_ICE_MFP SYS_ICE_MFP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ICE_EN

ICE_EN : This bit will set ICE_CLK and ICE_DAT pins to be serial debug wires or PA.6/7
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

ICE_CLK and ICE_DAT will be assigned as PA.6 and PA.7, for general IO purpose

#1 : 1

ICE_CLK and ICE_DAT will be set as ICE CLOCK/ ICE DIO, only for debugging purpose

End of enumeration elements list.


SYS_RSTSTS (RSTSTS)

System Reset Source Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_RSTSTS SYS_RSTSTS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORF PINRF WDTRF LVRF BOD PMURSTF PIN_WK TIM_WK POR_WK

PORF : POR Reset Flag The POR reset flag is set by the Reset Signal from the Power-on Reset (POR) Controller to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from POR

#1 : 1

Power-on Reset (POR) Controller had issued the reset signal to reset the system

End of enumeration elements list.

PINRF : RESETB Pin Reset Flag The RESETB pin reset flag is set by the Reset Signal from the RESETB Pin to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from RESETB pin

#1 : 1

Pin RESETB had issued the reset signal to reset the system

End of enumeration elements list.

WDTRF : Reset Source From WDG The WDTRF flag is set if pervious reset source originates from the Watch-Dog module. Note: Write 1 to clear this bit to 0.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from Watch-Dog

#1 : 1

The Watch-Dog module issued the reset signal to reset the system

End of enumeration elements list.

LVRF : LVR Reset Flag The LVR reset flag is set by the Reset Signal from the Low Voltage Reset Controller to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from LVR

#1 : 1

LVR controller had issued the reset signal to reset the system

End of enumeration elements list.

BOD : BOD Reset Flag The BOD reset flag is set by the Reset Signal from the Brown Out Reset Controller to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from BOD

#1 : 1

BOD controller had issued the reset signal to reset the system

End of enumeration elements list.

PMURSTF : Reset Source From PMU The PMURSTF flag is set by the reset signal from the PMU module to indicate the previous reset source. Note: Write 1 to clear this bit to 0.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

No reset from PMU

#1 : 1

The PMU has issued the reset signal to reset the system

End of enumeration elements list.

PIN_WK : Wakeup from DPD From PIN The device was woken from Deep Power Down by a low transition on the WAKEUP in or RESETB pin. Note: Write 1 to this register to clear all wakeup flags.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup from PIN

#1 : 1

The device was issued a wakeup from DPD by a pin transition

End of enumeration elements list.

TIM_WK : Wakeup from DPD From TIMER The device was woken from Deep Power Down by count of 10kHz timer.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup from TIMER

#1 : 1

The device was issued a wakeup from DPD by a TIMER event

End of enumeration elements list.

POR_WK : Wakeup from DPD From POR The device was woken from Deep Power Down by a Power On Reset.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup from POR

#1 : 1

The device was issued a wakeup from DPD by a POR

End of enumeration elements list.


SYS_GPIO_INTP (GPIO_INTP)

GPIO Input Type and Slew Rate Control Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPIO_INTP SYS_GPIO_INTP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

SYS_GPA_PULL (GPA_PULL)

PA.15 ~ PA.0 Pull Resistance Control Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPA_PULL SYS_GPA_PULL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PU_EN0 PU_EN1 PU_EN2 PU_EN3 PU_EN4 PU_EN5 PU_EN6 PU_EN7 PU_EN8 PU_EN9 PU_EN10 PU_EN11 PU_EN12 PU_EN13 PU_EN14 PU_EN15

PU_EN0 : This function only for the GPIO pin as an INPUT mode.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN1 : This function only for the GPIO pin as an INPUT mode.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN2 : This function only for the GPIO pin as an INPUT mode.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN3 : This function only for the GPIO pin as an INPUT mode.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN4 : This function only for the GPIO pin as an INPUT mode.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN5 : This function only for the GPIO pin as an INPUT mode.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN6 : This function only for the GPIO pin as an INPUT mode.
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN7 : This function only for the GPIO pin as an INPUT mode.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN8 : This function only for the GPIO pin as an INPUT mode.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN9 : This function only for the GPIO pin as an INPUT mode.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN10 : This function only for the GPIO pin as an INPUT mode.
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN11 : This function only for the GPIO pin as an INPUT mode.
bits : 11 - 11 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN12 : This function only for the GPIO pin as an INPUT mode.
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN13 : This function only for the GPIO pin as an INPUT mode.
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN14 : This function only for the GPIO pin as an INPUT mode.
bits : 14 - 14 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN15 : This function only for the GPIO pin as an INPUT mode.
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.


SYS_GPA_IEN (GPA_IEN)

PA.15 ~ PA.0 Digital Input Buffer Control Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPA_IEN SYS_GPA_IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEN

IEN :
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Input buffer Enabled

#1 : 1

Input buffer disabled, and input signal always equals to 0

End of enumeration elements list.


SYS_GPB_PULL (GPB_PULL)

PB.5 ~ PB.0 Pull Resistance Control Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPB_PULL SYS_GPB_PULL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PU_EN0 PU_EN1 PU_EN2 PU_EN3 PU_EN4 PU_EN5

PU_EN0 : This function only for the GPIO pin as an INPUT mode.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN1 : This function only for the GPIO pin as an INPUT mode.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN2 : This function only for the GPIO pin as an INPUT mode.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN3 : This function only for the GPIO pin as an INPUT mode.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN4 : This function only for the GPIO pin as an INPUT mode.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.

PU_EN5 : This function only for the GPIO pin as an INPUT mode.
bits : 5 - 5 (1 bit)
access : read-write

Enumeration:

#0 : 0

Pull-Up function Disable

#1 : 1

Pull-Up function Enable

End of enumeration elements list.


SYS_GPB_IEN (GPB_IEN)

PB.5 ~ PB.0 Digital Input Buffer Control Register
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_GPB_IEN SYS_GPB_IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEN

IEN :
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Input buffer Enabled

#1 : 1

Input buffer disabled, and input signal always equals to 0

End of enumeration elements list.


SYS_IPRST0 (IPRST0)

IP Reset Control Resister0
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_IPRST0 SYS_IPRST0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHIPRST CPURST

CHIPRST : CHIP One Shot Reset Set this bit will reset the whole chip, this bit will automatically return to 0 after 2 clock cycles. CHIPRST is same as POR reset, all the chip modules are reset and the chip configuration settings from Flash Memory are reloaded.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal

#1 : 1

Reset CHIP

End of enumeration elements list.

CPURST : CPU Kernel One Shot Reset Setting this bit will reset the CPU kernel and Flash Memory Controller(FMC), this bit will automatically return to 0 after the 2 clock cycles
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal

#1 : 1

Reset CPU

End of enumeration elements list.


SYS_IPRST1 (IPRST1)

IP Reset Control Resister1
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYS_IPRST1 SYS_IPRST1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIORST TMR0RST TMR1RST TMR2RST TMRFRST PDMARST SPI0RST SPIMRST PWM0RST PWM1RST ADCRST DPWMRST

GPIORST : GPIO Controller Reset
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal operation

#1 : 1

Reset

End of enumeration elements list.

TMR0RST : Timer0 Controller Reset
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

TMR1RST : Timer1 Controller Reset
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

TMR2RST : Timer2 Controller Reset
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal operation

#1 : 1

Reset

End of enumeration elements list.

TMRFRST : TimerF Controller Reset
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal operation

#1 : 1

Reset

End of enumeration elements list.

PDMARST : PDMA Controller Reset
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal operation

#1 : 1

Reset

End of enumeration elements list.

SPI0RST : SPI0 Controller Reset
bits : 12 - 12 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

SPIMRST : SPIM Controller Reset
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

PWM0RST : PWM0 Controller Reset
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

PWM1RST : PWM1 Controller Reset
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

ADCRST : ADC Controller Reset
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.

DPWMRST : DPWM Controller Reset
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

Normal Operation

#1 : 1

Reset

End of enumeration elements list.


SYS_IMGMAP3 (IMGMAP3)

MAP3 Data Image Register
address_offset : 0xF0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYS_IMGMAP3 SYS_IMGMAP3 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMG3

IMG3 : Data Image of MAP3 Data in MAP3 of information block are copied to this register after power on.
bits : 0 - 31 (32 bit)
access : read-only


SYS_DEVICEID (DEVICEID)

Device ID Register
address_offset : 0xF4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYS_DEVICEID SYS_DEVICEID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICEID

DEVICEID : Device ID Data This register provides specific read-only information for the Device ID
bits : 0 - 15 (16 bit)
access : read-only


SYS_IMGMAP0 (IMGMAP0)

MAP0 Data Image Register
address_offset : 0xF8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYS_IMGMAP0 SYS_IMGMAP0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMG0

IMG0 : Data Image of MAP0 Data in MAP0 of information block are copied to this register after power on.
bits : 0 - 31 (32 bit)
access : read-only


SYS_IMGMAP1 (IMGMAP1)

MAP1 Data Image Register
address_offset : 0xFC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYS_IMGMAP1 SYS_IMGMAP1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IMG1

IMG1 : Data Image of MAP1 Data in MAP1 of information block are copied to this register after power on.
bits : 0 - 31 (32 bit)
access : read-only



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