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SYSTICK

Peripheral Memory Blocks

address_offset : 0x10 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

Registers

SYSTICK_CSR (CSR)

SYSTICK_RVR (RVR)

SYSTICK_CVR (CVR)


SYSTICK_CSR (CSR)

SysTick Control and Status Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICK_CSR SYSTICK_CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE TICKINT CLKSRC COUNTFLAG

ENABLE : ENABLE
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#0 : 0

The counter is disabled

#1 : 1

The counter will operate in a multi-shot manner

End of enumeration elements list.

TICKINT : Enables SysTick Exception Request
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

#0 : 0

Counting down to 0 does not cause the SysTick exception to be pended. Software can use COUNTFLAG to determine if a count to zero has occurred

#1 : 1

Counting down to 0 will cause SysTick exception to be pended. Clearing the SysTick Current Value register by a register write in software will not cause SysTick to be pended

End of enumeration elements list.

CLKSRC : Clock Source
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

#0 : 0

Core clock unused

#1 : 1

Core clock used for SysTick, this bit will read as 1 and ignore writes

End of enumeration elements list.

COUNTFLAG : Count Flag Returns 1 if timer counted to 0 since last time this register was read.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

#0 : 0

Cleared on read or by a write to the Current Value register

#1 : 1

Set by a count transition from 1 to 0

End of enumeration elements list.


SYSTICK_RVR (RVR)

SysTick Reload Value Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICK_RVR SYSTICK_RVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RELOAD

RELOAD : SysTick Reload Value to load into the Current Value register when the counter reaches 0. To generate a multi-shot timer with a period of N processor clock cycles, use a RELOAD value of N-1. For example, if the SysTick interrupt is required every 200 clock pulses, set RELOAD to 199.
bits : 0 - 23 (24 bit)
access : read-write


SYSTICK_CVR (CVR)

SysTick Current Value Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICK_CVR SYSTICK_CVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURRENT

CURRENT : Current Counter Value This is the value of the counter at the time it is sampled. The counter does not provide read-modify-write protection. The register is write-clear. A software write of any value will clear the register to 0 and also clear the COUNTFLAG bit.
bits : 0 - 23 (24 bit)
access : read-write



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