\n

INT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x88 byte (0x0)
mem_usage : registers
protection :

Registers

IRQ0_SRC

IRQ4_SRC

IRQ5_SRC

IRQ6_SRC

IRQ7_SRC

IRQ8_SRC

IRQ9_SRC

IRQ10_SRC

IRQ11_SRC

IRQ12_SRC

IRQ13_SRC

IRQ14_SRC

IRQ15_SRC

IRQ1_SRC

IRQ16_SRC

IRQ17_SRC

IRQ18_SRC

IRQ19_SRC

IRQ20_SRC

IRQ21_SRC

IRQ22_SRC

IRQ23_SRC

IRQ24_SRC

IRQ25_SRC

IRQ26_SRC

IRQ27_SRC

IRQ28_SRC

IRQ29_SRC

IRQ30_SRC

IRQ31_SRC

IRQ2_SRC

NMI_SEL

MCU_IRQ

IRQ3_SRC


IRQ0_SRC

IRQ0 (BOD) Interrupt Source Identity Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ0_SRC IRQ0_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: BOD_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ4_SRC

IRQ4 (GPA/B) Interrupt Source Identity Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ4_SRC IRQ4_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: GPB_INT Bit0: GPA_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ5_SRC

IRQ5 (ALC) Interrupt Source Identity Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ5_SRC IRQ5_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: ALC_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ6_SRC

IRQ6 (PWM0) Interrupt Source Identity Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ6_SRC IRQ6_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: PWM_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ7_SRC

IRQ7 (Reserved) Interrupt Source Identity Register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ7_SRC IRQ7_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ8_SRC

IRQ8 (TMR0) Interrupt Source Identity Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ8_SRC IRQ8_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: TMR0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ9_SRC

IRQ9 (TMR1) Interrupt Source Identity Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ9_SRC IRQ9_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: TMR1_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ10_SRC

IRQ10 (Reserved) Interrupt Source Identity Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ10_SRC IRQ10_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ11_SRC

IRQ11 (UART1) Interrupt Source Identity Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ11_SRC IRQ11_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTSRC

INTSRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: UART1 INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ12_SRC

IRQ12 (UART0) Interrupt Source Identity Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ12_SRC IRQ12_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: UART0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ13_SRC

IRQ13 (SPI1) Interrupt Source Identity Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ13_SRC IRQ13_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: SPI1 INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ14_SRC

IRQ14 (SPI0) Interrupt Source Identity Register
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ14_SRC IRQ14_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: SPI0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ15_SRC

IRQ15 (DPWM) Interrupt Source Identity Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ15_SRC IRQ15_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: Bit0: DPWM INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ1_SRC

IRQ1 (WDT) Interrupt Source Identity Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ1_SRC IRQ1_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: WDT_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ16_SRC

IRQ16 (Reserved) Interrupt Source Identity Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ16_SRC IRQ16_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ17_SRC

IRQ17 (Reserved) Interrupt Source Identity Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ17_SRC IRQ17_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ18_SRC

IRQ18 (I2C0) Interrupt Source Identity Register
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ18_SRC IRQ18_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: I2C0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ19_SRC

IRQ19 (Reserved) Interrupt Source Identity Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ19_SRC IRQ19_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ20_SRC

IRQ20 (Reserved) Interrupt Source Identity Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ20_SRC IRQ20_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ21_SRC

IRQ21 (CMP) Interrupt Source Identity Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ21_SRC IRQ21_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: CMP INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ22_SRC

IRQ22 (MAC ) Interrupt Source Identity Register
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ22_SRC IRQ22_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: MAC INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ23_SRC

IRQ23 (Reserved) Interrupt Source Identity Register
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ23_SRC IRQ23_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ24_SRC

IRQ24 (Reserved) Interrupt Source Identity Register
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ24_SRC IRQ24_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ25_SRC

IRQ25 (SARADC) Interrupt Source Identity Register
address_offset : 0x64 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ25_SRC IRQ25_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: SARADC INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ26_SRC

IRQ26 (PDMA) Interrupt Source Identity Register
address_offset : 0x68 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ26_SRC IRQ26_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: PDMA_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ27_SRC

IRQ27 (I2S0) Interrupt Source Identity Register
address_offset : 0x6C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ27_SRC IRQ27_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: I2S_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ28_SRC

IRQ28 (CAPS) Interrupt Source Identity Register
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ28_SRC IRQ28_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: CAPS_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ29_SRC

IRQ29 (ADC) Interrupt Source Identity Register
address_offset : 0x74 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ29_SRC IRQ29_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: ADC_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ30_SRC

IRQ30 (Reserved) Interrupt Source Identity Register
address_offset : 0x78 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ30_SRC IRQ30_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ31_SRC

IRQ31 (RTC) Interrupt Source Identity Register
address_offset : 0x7C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ31_SRC IRQ31_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: RTC_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ2_SRC

IRQ2 (EINT0) Interrupt Source Identity Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ2_SRC IRQ2_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: INT0_INT
bits : 0 - 2 (3 bit)
access : read-only


NMI_SEL

NMI Source Interrupt Select Control Register
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMI_SEL NMI_SEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMI_SEL IRQ_TM

NMI_SEL : NMI Source Interrupt Select The NMI interrupt to Cortex-M0 can be selected from one of the interrupt[31:0] The NMI_SEL bit[4:0] used to select the NMI interrupt source
bits : 0 - 4 (5 bit)
access : read-write

IRQ_TM : IRQ Test Mode If set to 1 then peripheral IRQ signals (0-31) are replaced by the value in the MCU_IRQ register. This is a protected register to program first issue the unlock sequence.
bits : 7 - 7 (1 bit)
access : read-write


MCU_IRQ

MCU IRQ Number Identify Register
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCU_IRQ MCU_IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOD WDT EINT0 EINT1 GPAB ALC PWM0 TMR0 TMR1 UART1 UART0 SPI1 SPI0 DPWM I2C0 CMP MAC SARADC PDMA I2S0 CAPS ADC RTC

BOD : IRQ0 (BOD) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 0 - 0 (1 bit)
access : read-write

WDT : IRQ1 (WDT) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 1 - 1 (1 bit)
access : read-write

EINT0 : IRQ2 (EINT0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 2 - 2 (1 bit)
access : read-write

EINT1 : IRQ3 (EINT1) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 3 - 3 (1 bit)
access : read-write

GPAB : IRQ4 (GPA/B) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 4 - 4 (1 bit)
access : read-write

ALC : IRQ5 (ALC) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 5 - 5 (1 bit)
access : read-write

PWM0 : IRQ6 (PWM0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 6 - 6 (1 bit)
access : read-write

TMR0 : IRQ8 (TMR0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 8 - 8 (1 bit)
access : read-write

TMR1 : RQ9 (TMR1) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 9 - 9 (1 bit)
access : read-write

UART1 : IRQ11 (UART1) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 11 - 11 (1 bit)
access : read-write

UART0 : IRQ12 (UART0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 12 - 12 (1 bit)
access : read-write

SPI1 : IRQ13 (SPI1) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 13 - 13 (1 bit)
access : read-write

SPI0 : IRQ14 (SPI0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 14 - 14 (1 bit)
access : read-write

DPWM : IRQ15 (DPWM) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 15 - 15 (1 bit)
access : read-write

I2C0 : IRQ18 (I2C0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 18 - 18 (1 bit)
access : read-write

CMP : IRQ21 (CMP) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 21 - 21 (1 bit)
access : read-write

MAC : IRQ22 (MAC ) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 22 - 22 (1 bit)
access : read-write

SARADC : IRQ25 (SARADC) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 25 - 25 (1 bit)
access : read-write

PDMA : IRQ26 (PDMA) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 26 - 26 (1 bit)
access : read-write

I2S0 : IRQ27 (I2S0) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 27 - 27 (1 bit)
access : read-write

CAPS : IRQ28 (CAPS) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 28 - 28 (1 bit)
access : read-write

ADC : IRQ29 (ADC) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 29 - 29 (1 bit)
access : read-write

RTC : IRQ31 (RTC) Interrupt Source Identity Register 0: No effect. 1: clear the interrupt
bits : 31 - 31 (1 bit)
access : read-write


IRQ3_SRC

IRQ3 (EINT1) Interrupt Source Identity Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ3_SRC IRQ3_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: INT0_INT
bits : 0 - 2 (3 bit)
access : read-only



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