\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x20 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x84 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x94 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :
VMID Reference Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PULLDOWN : VMID Pulldown
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Release VMID pin for reference operation
#1 : 1
Pull VMID pin to ground. Default power down and reset condition
End of enumeration elements list.
PDLORES : Power Down Low (4.8kΩ) Resistance Reference
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Connect the Low Resistance reference to VMID. Use this setting for fast power up of VMID. Can be turned off after 50ms to save power
#1 : 1
The Low Resistance reference is disconnected from VMID. Default power down and reset condition
End of enumeration elements list.
PDHIRES : Power Down High (360kΩ) Resistance Reference
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Connect the High Resistance reference to VMID. Use this setting for minimum power consumption
#1 : 1
The High Resistance reference is disconnected from VMID. Default power down and reset condition
End of enumeration elements list.
LDO Voltage Select Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LDOSEL : Select LDO Output Voltage
Note that maximum I/O pad operation speed only specified for voltage >2.4V.
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : 0
1.8V
1 : 1
2.4V
2 : 2
2.5V
3 : 3
2.7V
4 : 4
3.0V
5 : 5
3.3V
6 : 6
1.5V
7 : 7
1.7V
End of enumeration elements list.
LDO Power Down Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD : Power Down LDO
When powered down no current delivered to VD33.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Enable LDO
#1 : 1
Power Down
End of enumeration elements list.
DISCHAR : Discharge
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Don't discharge VD33
#1 : 1
Switch discharge resistor to VD33
End of enumeration elements list.
Microphone Bias Voltage Level Selection
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LVL : LVL controls the voltage output of the MICBIAS generator, voltages are encoded as following: 0 - 1.5V1 - 1.8V2 - 1.95V3 - 2.1V4 - 2.25V5 - 2.4V6 - 2.55V 7 - 2.7
Note: MICBIAS voltage should be at least 300mV lower than VCCA.
bits : 0 - 2 (3 bit)
access : read-write
Microphone Bias Enable Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PD : Power Down Microphone Bias
Note: MICBIAS output needs VMID enable together.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Enable Microphone Bias
#1 : 1
Power Down Microphone Bias
End of enumeration elements list.
Oscillator Trim Register
address_offset : 0x84 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OSCTRIM : Oscillator Trim
Reads current oscillator trim setting. Read Only.
bits : 0 - 7 (8 bit)
access : read-write
COARSE : COARSE
Current COARSE range setting of the oscillator. Read Only
bits : 8 - 15 (8 bit)
access : read-write
Frequency Measurement Control Register
address_offset : 0x94 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKSEL : Reference Clock Source
00b: OSC10k,
01b: OSC32K (default),
1xb: I2S_WS - can be GPIOA[4,8,12] according to SYS_GPA_MFP register, configure I2S in SLAVE mode to enable.
bits : 0 - 1 (2 bit)
access : read-write
MMSTS : Measurement Done
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Measurement Ongoing
#1 : 1
Measurement Complete
End of enumeration elements list.
CYCLESEL : Frequency Measurement Cycles
Number of reference clock periods plus one to measure target clock (PCLK). For example if reference clock is OSC32K (T is 30.5175us), set CYCLESEL to 7, then measurement period would be 30.5175*(7+1), 244.1us.
bits : 16 - 23 (8 bit)
access : read-write
FQMMEN : FQMMEN
bits : 31 - 31 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable/Reset block
#1 : 1
Start Frequency Measurement
End of enumeration elements list.
Frequency Measurement Count Register
address_offset : 0x98 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FQMMCNT : Frequency Measurement Count
Maximum resolution of measurement is Fref /(CYCLESEL+1)*2 Hz
bits : 0 - 15 (16 bit)
access : read-only
Frequency Measurement Cycle Register
address_offset : 0x9C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FQMMCYC : Frequency Measurement Cycles
bits : 0 - 23 (24 bit)
access : read-write
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