\n
address_offset : 0x0 Bytes (0x0)
size : 0x54 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x80 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
IRQ0 (WDT) Interrupt Source Identity Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: WDT_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ4 (SPIM) Interrupt Source Identity Register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: SPIM_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ5 (Timer0) Interrupt Source Identity Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: Timer0_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ6 (Timer1) Interrupt Source Identity Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: Timer1_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ7 (Timer2) Interrupt Source Identity Register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: Timer2_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ8 (GPA/B) Interrupt Source Identity Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: GPB_INT
Bit0: GPA_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ9 (SPI0) Interrupt Source Identity Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: SPI0_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ10 (PWM0) Interrupt Source Identity Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: PWM0_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ11 (PDMA) Interrupt Source Identity Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: PDMA_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ12 (TimerF) Interrupt Source Identity Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: TimerF_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ13 (RTC) Interrupt Source Identity Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: RTC_INT
bits : 0 - 2 (3 bit)
access : read-only
Reserved
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IRQ15 (PWM1) Interrupt Source Identity Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: PWM1_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ1 (DPWM) Interrupt Source Identity Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: DPWM_INT
bits : 0 - 2 (3 bit)
access : read-only
Reserved
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IRQ17 (UART) Interrupt Source Identity Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: UART_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ18 (BOD) Interrupt Source Identity Register
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: BOD_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ19 (IRCTRIM) Interrupt Source Identity Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: IRCTRIM_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ20 (CSCAN) Interrupt Source Identity Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: CSCAN_INT
bits : 0 - 2 (3 bit)
access : read-only
IRQ2 (ADC) Interrupt Source Identity Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INT_SRC : Interrupt Source Identity
Bit2: 0
Bit1: 0
Bit0: ADC_INT
bits : 0 - 2 (3 bit)
access : read-only
NMI Source Interrupt Select Control Register
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMI_SEL : NMI Source Interrupt Select
The NMI interrupt to Cortex-M0 can be selected from one of the interrupt [0:20].
The NMI_SEL bit is used to select the NMI interrupt source.
Note: IRQ3 IRQ14 are reserved in N570H064.
bits : 0 - 4 (5 bit)
access : read-write
IO_DISCHA : IO pull low discharge control
bits : 7 - 7 (1 bit)
access : read-write
Enumeration:
#0 : 0
Do not discharge IO output
#1 : 1
Switch pull low discharge resistor to IO output
End of enumeration elements list.
Reserved
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.