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CSCAN

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x30 byte (0x0)
mem_usage : registers
protection :

Registers

CSCAN_CTRL (CTRL)

CSCAN_RESULT0 (RESULT0)

CSCAN_RESULT1 (RESULT1)

CSCAN_RESULT2 (RESULT2)

CSCAN_RESULT3 (RESULT3)

CSCAN_THRESHOLD0 (THRESHOLD0)

CSCAN_THRESHOLD1 (THRESHOLD1)

CSCAN_THRESHOLD2 (THRESHOLD2)

CSCAN_THRESHOLD3 (THRESHOLD3)

CSCAN_CYCCNT (CYCCNT)

CSCAN_COUNT (COUNT)

CSCAN_INT (INT)


CSCAN_CTRL (CTRL)

CSCAN Control Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_CTRL CSCAN_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SEL CMPLOW CMPLOWS CURRENT INTEN SLOWCLK MODE0 MODE1 DURCNT CMPEN TOINTEN EN PD

SEL : CSCAN Select In single mode selects the channel to perform measurement on.
bits : 0 - 6 (7 bit)
access : read-write

CMPLOW :
bits : 8 - 14 (7 bit)
access : read-write

Enumeration:

0 : 0

Counter result higher than threshold will issue interrupt when CMP_EN = 1'b

1 : 1

Counter result lower than threshold will issue interrupt when CMP_EN = 1'b

End of enumeration elements list.

CMPLOWS :
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

#0 : 0

Counter result higher than threshold will issue interrupt when CMP_EN = 1'b

#1 : 1

Counter result lower than threshold will issue interrupt when CMP_EN = 1'b

End of enumeration elements list.

CURRENT : CSCAN Oscillator current Controls the analog bais current of the capacitive relaxation oscillator. 0: Level0 1: Level1 2: Level3 3: Level4 Note: Level0 is the smallest current ,and Level4 is the largest current.
bits : 16 - 17 (2 bit)
access : read-write

INTEN : CSCAN Enable Interrupt
bits : 20 - 20 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt disabled

#1 : 1

Interrupt enabled

End of enumeration elements list.

SLOWCLK : CSCAN Slow Clock **Notes: In low speed mode, for CYCLE_CNT <5, the minimum frequency of oscillation of a CAPSENSE GPIO must be > Fclk/2. Where Fclk is the frequency of LXT or LIRC depending which is selected as reference.
bits : 21 - 21 (1 bit)
access : read-write

Enumeration:

#0 : 0

Timebase clock is HIRC

#1 : 1

Timebase clock is LIRC (XTAL32K_EN = 0) or XTAL (XTAL32K_EN = 1)

End of enumeration elements list.

MODE0 : CSCAN Mode0
bits : 22 - 22 (1 bit)
access : read-write

Enumeration:

#0 : 0

Single shot Capacitive sense

#1 : 1

Scans each channel set in SCAN_MASK and stores in Register

End of enumeration elements list.

MODE1 : CSCAN Mode1 Note: When enable compare function , the DUR_CNT is ignore.Iterrupt always happens when scan fisish.
bits : 23 - 23 (1 bit)
access : read-write

Enumeration:

#0 : 0

Interrupt when scan finished

#1 : 1

Interrupt when DUR_CNT delay occurs

End of enumeration elements list.

DURCNT : CSCAN Duration Count This counter is used to set a wakeup time after a capacitive sensing scan is complete. It is in units of low frewquency clock period (either LXT or LIRC clock) and gives delay of 160, 320, 480,640, 800, 960, 1120, 1280, 1440,1600, 1920, 2240, 2560, 2880,3200 3840 periods for settings 0,..,15.
bits : 24 - 27 (4 bit)
access : read-write

CMPEN : Compare Enable Note: When disable Compare function , the touch will always issue an interrupt after one scan cycle finish.
bits : 28 - 28 (1 bit)
access : read-write

Enumeration:

#0 : 0

Disable Compare function

#1 : 1

Enable Compare function

End of enumeration elements list.

TOINTEN : Timeout interrupt enable
bits : 29 - 29 (1 bit)
access : read-write

Enumeration:

#0 : 0

Timeout Interrupt disabled

#1 : 1

Timeout Interrupt enabled

End of enumeration elements list.

EN : CSCAN Enable Write 1 to start. Reset by hardware when operation finished.
bits : 30 - 30 (1 bit)
access : read-write

PD : Power Down 0: Enable analog circuit 1: Power down analog circuit and block.
bits : 31 - 31 (1 bit)
access : read-write


CSCAN_RESULT0 (RESULT0)

CSCAN Counter Result Register 0
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_RESULT0 CSCAN_RESULT0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT0 CNT1

CNT0 : Channel 0 Counter result register
bits : 0 - 15 (16 bit)
access : read-write

CNT1 : Channel 1 Counter result register
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_RESULT1 (RESULT1)

CSCAN Counter Result Register 1
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_RESULT1 CSCAN_RESULT1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT2 CNT3

CNT2 : Channel 2 Counter result register
bits : 0 - 15 (16 bit)
access : read-write

CNT3 : Channel 3 Counter result register
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_RESULT2 (RESULT2)

CSCAN Counter Result Register 2
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_RESULT2 CSCAN_RESULT2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT4 CNT5

CNT4 : Channel 4 Counter result register
bits : 0 - 15 (16 bit)
access : read-write

CNT5 : Channel 5 Counter result register
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_RESULT3 (RESULT3)

CSCAN Counter Result Register 3
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_RESULT3 CSCAN_RESULT3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CNT6

CNT6 : Channel 6 Counter result register
bits : 0 - 15 (16 bit)
access : read-write


CSCAN_THRESHOLD0 (THRESHOLD0)

CSCAN Compare Threshold Register 0
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_THRESHOLD0 CSCAN_THRESHOLD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTH0 CTH1

CTH0 : Channel 0 compare threshold setting A 16 bits threshold value can be set by user
bits : 0 - 15 (16 bit)
access : read-write

CTH1 : Channel 1 compare threshold setting A 16 bits threshold value can be set by user
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_THRESHOLD1 (THRESHOLD1)

CSCAN Compare Threshold Register 1
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_THRESHOLD1 CSCAN_THRESHOLD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTH2 CTH3

CTH2 : Channel 2 compare threshold setting A 16 bits threshold value can be set by user
bits : 0 - 15 (16 bit)
access : read-write

CTH3 : Channel 3 compare threshold setting A 16 bits threshold value can be set by user
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_THRESHOLD2 (THRESHOLD2)

CSCAN Compare Threshold Register 2
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_THRESHOLD2 CSCAN_THRESHOLD2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTH4 CTH5

CTH4 : Channel 4 compare threshold setting A 16 bits threshold value can be set by user
bits : 0 - 15 (16 bit)
access : read-write

CTH5 : Channel 5 compare threshold setting A 16 bits threshold value can be set by user
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_THRESHOLD3 (THRESHOLD3)

CSCAN Compare Threshold Register 3
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_THRESHOLD3 CSCAN_THRESHOLD3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTH6 CTHS

CTH6 : Channel 6 compare threshold setting A 16 bits threshold value can be set by user
bits : 0 - 15 (16 bit)
access : read-write

CTHS : A 16 bits threshold value can be set by user
bits : 16 - 31 (16 bit)
access : read-write


CSCAN_CYCCNT (CYCCNT)

CSCAN Cycle Count Control Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_CYCCNT CSCAN_CYCCNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CYCCNT MASK

CYCCNT : CSCAN Cycle Count
bits : 0 - 3 (4 bit)
access : read-write

MASK : Scan Mask Register If MASK[n] is set then touch channel[n] is included in scan of capacitive sensing.
bits : 16 - 22 (7 bit)
access : read-write


CSCAN_COUNT (COUNT)

CSCAN Count Status Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_COUNT CSCAN_COUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COUNT

COUNT : CSCAN Count Count result of single scan.
bits : 0 - 15 (16 bit)
access : read-write


CSCAN_INT (INT)

CSCAN Interrupt Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSCAN_INT CSCAN_INT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT TOINT TOINTS CMPINT CMPINTS

INT : CSCAN Flag active Write '1' to clear.
bits : 0 - 0 (1 bit)
access : read-write

TOINT : If the the touch channel[n] is timeout, the [n+1] bit will set to 1'b
bits : 8 - 14 (7 bit)
access : read-write

TOINTS : If the the touch channel[n] is timeout, the [n+1] bit will set to 1'b
bits : 15 - 15 (1 bit)
access : read-write

CMPINT :
bits : 16 - 22 (7 bit)
access : read-write

CMPINTS :
bits : 23 - 23 (1 bit)
access : read-write



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