\n
address_offset : 0x0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x1C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x28 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x40 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x50 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x58 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :
address_offset : 0x7C Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :
PWM Prescaler Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKPSC : Clock Prescaler For PWM Timer
Clock input is divided by (CLKPSC + 1)
bits : 0 - 7 (8 bit)
access : read-write
DZI0 : Dead Zone Interval Register 0
These 8 bits determine dead zone length.
The unit time of dead zone length is that from clock selector.
bits : 16 - 23 (8 bit)
access : read-write
DZI1 : Dead Zone Interval Register 1
These 8 bits determine dead zone length.
The unit time of dead zone length is that from clock selector.
bits : 24 - 31 (8 bit)
access : read-write
PWM Comparator Register 0
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CMP : PWM Comparator Register
CMP determines the PWM duty cycle.
Assumption: PWM output initial is high
Note2: Any write to CMP will take effect in next PWM cycle.
bits : 0 - 15 (16 bit)
access : read-write
PWM Counter Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CNT : PWM Counter Register
Reports the current value of the 16-bit down counter.
bits : 0 - 15 (16 bit)
access : read-only
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM Clock Select Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKDIV0 : PWM Timer Clock Source Selection
Value : Input clock divided by
000 : 2
001 : 4
010 : 8
011 : 16
1xx : 1
bits : 0 - 2 (3 bit)
access : read-write
PWM Interrupt Enable Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIEN : PWM Timer Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
PWM Interrupt Flag Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PIF : PWM Timer Interrupt Flag
Flag is set by hardware when PWM down counter reaches zero, software can clear this bit by writing '1' to it.
bits : 0 - 0 (1 bit)
access : read-write
Capture Control Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAPINV : Inverter ON/OFF
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inverter OFF
#1 : 1
Inverter ON. Reverse the input signal from GPIO before fed to Capture timer
End of enumeration elements list.
CRLIEN : Rising Latch Interrupt Enable ON/OFF
When enabled, capture block generates an interrupt on rising edge of input.
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable rising latch interrupt
#1 : 1
Enable rising latch interrupt
End of enumeration elements list.
CFLIEN : Falling Latch Interrupt Enable ON/OFF
When enabled, capture block generates an interrupt on falling edge of input.
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable falling latch interrupt
#1 : 1
Enable falling latch interrupt
End of enumeration elements list.
CAPEN : Capture Channel Input Transition Enable/Disable
When enabled, Capture function latches the PMW-counter to RCAPDAT (Rising latch) and FCAPDAT (Falling latch) registers on input edge transition.
When disabled, Capture function is inactive as is interrupt.
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable capture function
#1 : 1
Enable capture function
End of enumeration elements list.
CAPIF : Capture Interrupt Indication Flag
Note:If this bit is 1 , PWM counter will not be reloaded when next capture interrupt occurs.
bits : 4 - 4 (1 bit)
access : read-write
CRLIF : PWM_RCAPDAT Latched Indicator Bit
When input channel has a rising transition, PWM_RCAPDAT was latched with the value of PWM down-counter and this bit is set by hardware, software can clear this bit by writing a zero to it.
bits : 6 - 6 (1 bit)
access : read-write
CFLIF : PWM_FCAPDAT Latched Indicator Bit
When input channel has a falling transition, PWM_FCAPDAT was latched with the value of PWM down-counter and this bit is set by hardware, software can clear this bit by writing a zero to it.
bits : 7 - 7 (1 bit)
access : read-write
Capture Rising Latch Register
address_offset : 0x58 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RCAPDAT : Capture Rising Latch Register
In Capture mode, this register is latched with the value of the PWM counter on a rising edge of the input signal.
bits : 0 - 15 (16 bit)
access : read-only
Capture Falling Latch Register
address_offset : 0x5C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FCAPDAT : Capture Falling Latch Register
In Capture mode, this register is latched with the value of the PWM counter on a falling edge of the input signal.
bits : 0 - 15 (16 bit)
access : read-only
PWM Output and Capture Input Enable Register
address_offset : 0x7C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
POEN0 : PWM0 Output Enable Register
Note: The corresponding GPIO pin also must be switched to PWM function (refer to SYS_GPA_MFP Table 58)
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWM0 output to pin
#1 : 1
Enable PWM0 output to pin
End of enumeration elements list.
POEN1 : PWM1 Output Enable Register
Note: The corresponding GPIO pin also must be switched to PWM function (refer to SYS_GPA_MFP Table 58)
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWM1 output to pin
#1 : 1
Enable PWM1 output to pin
End of enumeration elements list.
POEN2 : PWM2 Output Enable Register
Note: The corresponding GPIO pin also must be switched to PWM function (refer to SYS_GPA_MFP Table 58)
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWM2 output to pin
#1 : 1
Enable PWM2 output to pin
End of enumeration elements list.
POEN3 : PWM3 Output Enable Register
Note: The corresponding GPIO pin also must be switched to PWM function (refer to SYS_GPB_MFP Table 58)
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable PWM3 output to pin
#1 : 1
Enable PWM3 output to pin
End of enumeration elements list.
CAPINEN : Capture Input Enable Register
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
#0 : 0
OFF (PB.12 pin input disconnected from Capture block)
#1 : 1
ON (PB.12 pin, if in PWM alternative function, will be configured as an input and fed to capture function)
End of enumeration elements list.
PWM Control Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNTEN : PWM-Timer Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#0 : 0
Stop PWM-Timer Running
#1 : 1
Enable PWM-Timer
End of enumeration elements list.
PINV : PWM-Timer Output Inverter ON/OFF
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
#0 : 0
Inverter OFF
#1 : 1
Inverter ON
End of enumeration elements list.
CNTMODE : PWM-Timer Auto-Reload/One-Shot Mode
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
#0 : 0
One-Shot Mode
#1 : 1
Auto-reload Mode
End of enumeration elements list.
DTEN0 : Dead-Zone 0 Generator Enable/Disable
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
DTEN1 : Dead-Zone 1 Generator Enable/Disable
bits : 5 - 5 (1 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
PWM Period Register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PERIOD : PWM Counter/Timer Reload Value
PERIOD determines the PWM period.
bits : 0 - 15 (16 bit)
access : read-write
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