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INT

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x58 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x80 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

Registers

IRQ0_SRC

IRQ4_SRC

IRQ5_SRC

IRQ6_SRC

IRQ7_SRC

IRQ8_SRC

IRQ9_SRC

IRQ10_SRC

IRQ11_SRC

IRQ12_SRC

IRQ13_SRC

IRQ14_SRC

IRQ15_SRC

IRQ1_SRC

IRQ16_SRC

IRQ17_SRC

IRQ18_SRC

IRQ19_SRC

IRQ20_SRC

IRQ21_SRC

IRQ2_SRC

NMI_SEL

IRQ3_SRC


IRQ0_SRC

IRQ0 (WDT) Interrupt Source Identity Register
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ0_SRC IRQ0_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: WDT_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ4_SRC

Reserved
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ4_SRC IRQ4_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IRQ5_SRC

IRQ5 (Timer0) Interrupt Source Identity Register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ5_SRC IRQ5_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: Timer0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ6_SRC

IRQ6 (Timer1) Interrupt Source Identity Register
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ6_SRC IRQ6_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: Timer1_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ7_SRC

IRQ7 (Timer2) Interrupt Source Identity Register
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ7_SRC IRQ7_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: Timer2_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ8_SRC

IRQ8 (GPA/B/C) Interrupt Source Identity Register
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ8_SRC IRQ8_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: GPC_INT Bit1: GPB_INT Bit0: GPA_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ9_SRC

IRQ9 (SPI0) Interrupt Source Identity Register
address_offset : 0x24 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ9_SRC IRQ9_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: SPI0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ10_SRC

IRQ10 (PWM0) Interrupt Source Identity Register
address_offset : 0x28 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ10_SRC IRQ10_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: PWM0_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ11_SRC

IRQ11 (PDMA) Interrupt Source Identity Register
address_offset : 0x2C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ11_SRC IRQ11_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: PDMA_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ12_SRC

IRQ12 (TimerF) Interrupt Source Identity Register
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ12_SRC IRQ12_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: TimerF_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ13_SRC

IRQ13 (RTC) Interrupt Source Identity Register
address_offset : 0x34 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ13_SRC IRQ13_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: RTC_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ14_SRC

IRQ14 (AED) Interrupt Source Identity Register
address_offset : 0x38 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ14_SRC IRQ14_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: AED_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ15_SRC

IRQ15 (PWM1) Interrupt Source Identity Register
address_offset : 0x3C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ15_SRC IRQ15_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: PWM1_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ1_SRC

IRQ1 (DPWM) Interrupt Source Identity Register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ1_SRC IRQ1_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: DPWM_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ16_SRC

IRQ16 (MAC) Interrupt Source Identity Register
address_offset : 0x40 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ16_SRC IRQ16_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: MAC_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ17_SRC

IRQ17 (UART) Interrupt Source Identity Register
address_offset : 0x44 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ17_SRC IRQ17_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: UART_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ18_SRC

IRQ18 (BOD) Interrupt Source Identity Register
address_offset : 0x48 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ18_SRC IRQ18_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: BOD_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ19_SRC

IRQ19 (IRCTRIM) Interrupt Source Identity Register
address_offset : 0x4C Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ19_SRC IRQ19_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: IRCTRIM_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ20_SRC

IRQ20 (CSCAN) Interrupt Source Identity Register
address_offset : 0x50 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ20_SRC IRQ20_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: CSCAN_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ21_SRC

IRQ21 (ALED) Interrupt Source Identity Register
address_offset : 0x54 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ21_SRC IRQ21_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: ALED_INT
bits : 0 - 2 (3 bit)
access : read-only


IRQ2_SRC

IRQ2 (ADC) Interrupt Source Identity Register
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ2_SRC IRQ2_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INT_SRC

INT_SRC : Interrupt Source Identity Bit2: 0 Bit1: 0 Bit0: ADC_INT
bits : 0 - 2 (3 bit)
access : read-only


NMI_SEL

NMI Source Interrupt Select Control Register
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NMI_SEL NMI_SEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMI_SEL IRQ_TM

NMI_SEL : NMI Source Interrupt Select The NMI interrupt to Cortex®-M0 can be selected from one of the interrupt[0:21]. The NMI_SEL bit is used to select the NMI interrupt source. Note: IRQ3 IRQ4 are reserved in N574F512.
bits : 0 - 4 (5 bit)
access : read-write

IRQ_TM : IRQ Test Mode This bit is the protected bit. To program this bit needs an open lock sequence, write 59h , 16h , 88h to register SYS_REGLCTL to un-lock this bit. Refer to the register SYS_REGLCTL at address SYS_BA+0x100.
bits : 7 - 7 (1 bit)
access : read-write

Enumeration:

#0 : 0

The interrupt register MCU_IRQ operates in normal mode. The MCU_IRQ collects all the interrupts from the peripheral and generates interrupt to MCU

#1 : 1

All the interrupts from peripheral to MCU are blocked. The peripheral IRQ signals (0-21) are replaced by the value in the MCU_IRQ register

End of enumeration elements list.


IRQ3_SRC

Reserved
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IRQ3_SRC IRQ3_SRC read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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