Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x220 byte (0x0)
mem_usage : registers
protection :
Pad Configuration Register A
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD0PULL : Pad 0 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD0INPEN : Pad 0 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD0STRNG : Pad 0 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD0FNCSEL : Pad 0 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : SLSCL
Configure as the IOSLAVE I2C SCL signal
1 : SLSCK
Configure as the IOSLAVE SPI SCK signal
2 : CLKOUT
Configure as the CLKOUT signal
3 : GPIO0
Configure as GPIO0
4 : MxSCKLB
Configure as the IOSLAVE SPI SCK loopback signal from IOMSTRx
5 : M2SCK
Configure as the IOMSTR2 SPI SCK output
6 : MxSCLLB
Configure as the IOSLAVE I2C SCL loopback signal from IOMSTRx
7 : M2SCL
Configure as the IOMSTR2 I2C SCL clock I/O signal
End of enumeration elements list.
PAD0RSEL : Pad 0 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD1PULL : Pad 1 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD1INPEN : Pad 1 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD1STRNG : Pad 1 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD1FNCSEL : Pad 1 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : SLSDA
Configure as the IOSLAVE I2C SDA signal
1 : SLMISO
Configure as the IOSLAVE SPI MISO signal
2 : UART0TX
Configure as the UART0 TX output signal
3 : GPIO1
Configure as GPIO1
4 : MxMISOLB
Configure as the IOSLAVE SPI MISO loopback signal from IOMSTRx
5 : M2MISO
Configure as the IOMSTR2 SPI MISO input signal
6 : MxSDALB
Configure as the IOSLAVE I2C SDA loopback signal from IOMSTRx
7 : M2SDA
Configure as the IOMSTR2 I2C Serial data I/O signal
End of enumeration elements list.
PAD1RSEL : Pad 1 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD2PULL : Pad 2 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD2INPEN : Pad 2 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD2STRNG : Pad 2 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD2FNCSEL : Pad 2 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : SLWIR3
Configure as the IOSLAVE SPI 3-wire MOSI/MISO signal
1 : SLMOSI
Configure as the IOSLAVE SPI MOSI signal
2 : UART0RX
Configure as the UART0 RX input
3 : GPIO2
Configure as GPIO2
4 : MxMOSILB
Configure as the IOSLAVE SPI MOSI loopback signal from IOMSTRx
5 : M2MOSI
Configure as the IOMSTR2 SPI MOSI output signal
6 : MxWIR3LB
Configure as the IOSLAVE SPI 3-wire MOSI/MISO loopback signal from IOMSTRx
7 : M2WIR3
Configure as the IOMSTR2 SPI 3-wire MOSI/MISO signal
End of enumeration elements list.
PAD3PULL : Pad 3 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD3INPEN : Pad 3 input enable.
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD3STRNG : Pad 3 drive strength.
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD3FNCSEL : Pad 3 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : UA0RTS
Configure as the UART0 RTS output
1 : SLnCE
Configure as the IOSLAVE SPI nCE signal
2 : M1nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR1
3 : GPIO3
Configure as GPIO3
4 : MxnCELB
Configure as the IOSLAVE SPI nCE loopback signal from IOMSTRx
5 : M2nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR2
6 : TRIG1
Configure as the ADC Trigger 1 signal
7 : I2S_WCLK
Configure as the I2S Word Clock input
End of enumeration elements list.
Pad Configuration Register E
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD16PULL : Pad 16 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD16INPEN : Pad 16 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD16STRNG : Pad 16 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD16FNCSEL : Pad 16 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : ADCSE0
Configure as the analog ADC single ended port 0 input signal
1 : M0nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR0
2 : TRIG0
Configure as the ADC Trigger 0 signal
3 : GPIO16
Configure as GPIO16
4 : M2nCE3
Configure as SPI channel 3 nCE for IOMSTR2
5 : CMPIN0
Configure as comparator input 0 signal
6 : UART0TX
Configure as UART0 TX output signal
7 : UA1RTS
Configure as UART1 RTS output signal
End of enumeration elements list.
PAD17PULL : Pad 17 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD17INPEN : Pad 17 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD17STRNG : Pad 17 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD17FNCSEL : Pad 17 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : CMPRF1
Configure as the analog comparator reference signal 1 input signal
1 : M0nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR0
2 : TRIG1
Configure as the ADC Trigger 1 signal
3 : GPIO17
Configure as GPIO17
4 : M4nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR4
5 : EXTLF
Configure as external LFRC oscillator input
6 : UART0RX
Configure as UART0 RX input signal
7 : UA1CTS
Configure as UART1 CTS input signal
End of enumeration elements list.
PAD18PULL : Pad 18 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD18INPEN : Pad 18 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD18STRNG : Pad 18 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD18FNCSEL : Pad 18 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : CMPIN1
Configure as the analog comparator input 1 signal
1 : M0nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR0
2 : TCTA1
Configure as the input/output signal from CTIMER A1
3 : GPIO18
Configure as GPIO18
4 : M4nCE1
Configure as the SPI nCE channel 1 from IOMSTR4
5 : ANATEST2
Configure as ANATEST2 I/O signal
6 : UART1TX
Configure as UART1 TX output signal
7 : 32khz_XT
Configure as the 32kHz output clock from the crystal
End of enumeration elements list.
PAD19PULL : Pad 19 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD19INPEN : Pad 19 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD19STRNG : Pad 19 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD19FNCSEL : Pad 19 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : CMPRF0
Configure as the analog comparator reference 0 signal
1 : M0nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR0
2 : TCTB1
Configure as the input/output signal from CTIMER B1
3 : GPIO19
Configure as GPIO19
4 : TCTA1
Configure as the input/output signal from CTIMER A1
5 : ANATEST1
Configure as the ANATEST1 I/O signal
6 : UART1RX
Configure as the UART1 RX input signal
7 : I2S_BCLK
Configure as the I2S Byte clock input signal
End of enumeration elements list.
Alternate Pad Configuration reg8 (Pads 35,34,33,32)
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD32_DS1 : Pad 32 high order drive strength selection. Used in conjunction with PAD32STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD32_SR : Pad 32 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD33_DS1 : Pad 33 high order drive strength selection. Used in conjunction with PAD33STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD33_SR : Pad 33 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD34_DS1 : Pad 34 high order drive strength selection. Used in conjunction with PAD34STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD34_SR : Pad 34 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD35_DS1 : Pad 35 high order drive strength selection. Used in conjunction with PAD35STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD35_SR : Pad 35 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg9 (Pads 39,38,37,36)
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD36_DS1 : Pad 36 high order drive strength selection. Used in conjunction with PAD36STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD36_SR : Pad 36 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD37_DS1 : Pad 37 high order drive strength selection. Used in conjunction with PAD37STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD37_SR : Pad 37 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD38_DS1 : Pad 38 high order drive strength selection. Used in conjunction with PAD38STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD38_SR : Pad 38 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD39_DS1 : Pad 39 high order drive strength selection. Used in conjunction with PAD39STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD39_SR : Pad 39 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg10 (Pads 43,42,41,40)
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD40_DS1 : Pad 40 high order drive strength selection. Used in conjunction with PAD40STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD40_SR : Pad 40 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD41_DS1 : Pad 41 high order drive strength selection. Used in conjunction with PAD41STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD41_SR : Pad 41 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD42_DS1 : Pad 42 high order drive strength selection. Used in conjunction with PAD42STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD42_SR : Pad 42 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD43_DS1 : Pad 43 high order drive strength selection. Used in conjunction with PAD43STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD43_SR : Pad 43 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg11 (Pads 47,46,45,44)
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD44_DS1 : Pad 44 high order drive strength selection. Used in conjunction with PAD44STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD44_SR : Pad 44 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD45_DS1 : Pad 45 high order drive strength selection. Used in conjunction with PAD45STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD45_SR : Pad 45 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD46_DS1 : Pad 46 high order drive strength selection. Used in conjunction with PAD46STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD46_SR : Pad 46 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD47_DS1 : Pad 47 high order drive strength selection. Used in conjunction with PAD47STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD47_SR : Pad 47 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg12 (Pads 49,48)
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD48_DS1 : Pad 48 high order drive strength selection. Used in conjunction with PAD48STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD48_SR : Pad 48 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD49_DS1 : Pad 49 high order drive strength selection. Used in conjunction with PAD49STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD49_SR : Pad 49 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Pad Configuration Register F
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD20PULL : Pad 20 pulldown enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pulldown disabled
1 : EN
Pulldown enabled
End of enumeration elements list.
PAD20INPEN : Pad 20 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD20STRNG : Pad 20 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD20FNCSEL : Pad 20 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : SWDCK
Configure as the serial wire debug clock signal
1 : M1nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR1
2 : TCTA2
Configure as the input/output signal from CTIMER A2
3 : GPIO20
Configure as GPIO20
4 : UART0TX
Configure as UART0 TX output signal
5 : UART1TX
Configure as UART1 TX output signal
6 : UNDEF6
Undefined/should not be used
7 : UNDEF7
Undefined/should not be used
End of enumeration elements list.
PAD21PULL : Pad 21 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD21INPEN : Pad 21 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD21STRNG : Pad 21 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD21FNCSEL : Pad 21 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : SWDIO
Configure as the serial wire debug data signal
1 : M1nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR1
2 : TCTB2
Configure as the input/output signal from CTIMER B2
3 : GPIO21
Configure as GPIO21
4 : UART0RX
Configure as UART0 RX input signal
5 : UART1RX
Configure as UART1 RX input signal
6 : UNDEF6
Undefined/should not be used
7 : UNDEF7
Undefined/should not be used
End of enumeration elements list.
PAD22PULL : Pad 22 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD22INPEN : Pad 22 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD22STRNG : Pad 22 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD22FNCSEL : Pad 22 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : UART0TX
Configure as the UART0 TX signal
1 : M1nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR1
2 : TCTA3
Configure as the input/output signal from CTIMER A3
3 : GPIO22
Configure as GPIO22
4 : PDM_CLK
Configure as the PDM CLK output
5 : UNDEF5
Undefined/should not be used
6 : TCTB1
Configure as the input/output signal from CTIMER B1
7 : SWO
Configure as the serial trace data output signal
End of enumeration elements list.
PAD22PWRUP : Pad 22 upper power switch enable
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : DIS
Power switch disabled
1 : EN
Power switch enabled
End of enumeration elements list.
PAD23PULL : Pad 23 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD23INPEN : Pad 23 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD23STRNG : Pad 23 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD23FNCSEL : Pad 23 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : UART0RX
Configure as the UART0 RX signal
1 : M0nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR0
2 : TCTB3
Configure as the input/output signal from CTIMER B3
3 : GPIO23
Configure as GPIO23
4 : PDM_DATA
Configure as PDM Data input to the PDM module
5 : CMPOUT
Configure as voltage comparitor output
6 : TCTB1
Configure as the input/output signal from CTIMER B1
7 : UNDEF7
Undefined/should not be used
End of enumeration elements list.
Pad Configuration Register G
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD24PULL : Pad 24 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD24INPEN : Pad 24 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD24STRNG : Pad 24 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD24FNCSEL : Pad 24 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : M2nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR2
1 : M0nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR0
2 : CLKOUT
Configure as the CLKOUT signal
3 : GPIO24
Configure as GPIO24
4 : M5nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR5
5 : TCTA1
Configure as the input/output signal from CTIMER A1
6 : I2S_BCLK
Configure as the I2S Byte clock input signal
7 : SWO
Configure as the serial trace data output signal
End of enumeration elements list.
PAD25PULL : Pad 25 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD25INPEN : Pad 25 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD25STRNG : Pad 25 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD25FNCSEL : Pad 25 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : EXTXT
Configure as the external XTAL oscillator input
1 : M0nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR0
2 : TCTA0
Configure as the input/output signal from CTIMER A0
3 : GPIO25
Configure as GPIO25
4 : M2SDA
Configure as the IOMSTR2 I2C Serial data I/O signal
5 : M2MISO
Configure as the IOMSTR2 SPI MISO input signal
6 : SLMISOLB
Configure as the IOMSTR0 SPI MISO loopback signal from IOSLAVE
7 : SLSDALB
Configure as the IOMSTR0 I2C SDA loopback signal from IOSLAVE
End of enumeration elements list.
PAD25RSEL : Pad 25 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD26PULL : Pad 26 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD26INPEN : Pad 26 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD26STRNG : Pad 26 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD26FNCSEL : Pad 26 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : EXTLF
Configure as the external LFRC oscillator input
1 : M0nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR0
2 : TCTB0
Configure as the input/output signal from CTIMER B0
3 : GPIO26
Configure as GPIO26
4 : M2nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR2
5 : TCTA1
Configure as the input/output signal from CTIMER A1
6 : M5nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR5
7 : M3nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR3
End of enumeration elements list.
PAD27PULL : Pad 27 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD27INPEN : Pad 27 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD27STRNG : Pad 27 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD27FNCSEL : Pad 27 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : EXTHF
Configure as the external HFRC oscillator input
1 : M1nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR1
2 : TCTA1
Configure as the input/output signal from CTIMER A1
3 : GPIO27
Configure as GPIO27
4 : M2SCL
Configure as I2C clock I/O signal from IOMSTR2
5 : M2SCK
Configure as SPI clock output signal from IOMSTR2
6 : M2SCKLB
Configure as IOMSTR2 SPI SCK loopback signal from IOSLAVE
7 : M2SCLLB
Configure as IOMSTR2 I2C SCL loopback signal from IOSLAVE
End of enumeration elements list.
PAD27RSEL : Pad 27 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
Pad Configuration Register H
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD28PULL : Pad 28 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD28INPEN : Pad 28 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD28STRNG : Pad 28 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD28FNCSEL : Pad 28 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : I2S_WCLK
Configure as the I2S Word Clock input
1 : M1nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR1
2 : TCTB1
Configure as the input/output signal from CTIMER B1
3 : GPIO28
Configure as GPIO28
4 : M2WIR3
Configure as the IOMSTR2 SPI 3-wire MOSI/MISO signal
5 : M2MOSI
Configure as the IOMSTR2 SPI MOSI output signal
6 : M5nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR5
7 : SLWIR3LB
Configure as the IOMSTR2 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
End of enumeration elements list.
PAD29PULL : Pad 29 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD29INPEN : Pad 29 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD29STRNG : Pad 29 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD29FNCSEL : Pad 29 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : ADCSE1
Configure as the analog input for ADC single ended input 1
1 : M1nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR1
2 : TCTA2
Configure as the input/output signal from CTIMER A2
3 : GPIO29
Configure as GPIO29
4 : UA0CTS
Configure as the UART0 CTS signal
5 : UA1CTS
Configure as the UART1 CTS signal
6 : M4nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR4
7 : PDM_DATA
Configure as PDM DATA input
End of enumeration elements list.
PAD30PULL : Pad 30 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD30INPEN : Pad 30 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD30STRNG : Pad 30 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD30FNCSEL : Pad 30 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : UNDEF0
Undefined/should not be used
1 : M1nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR1
2 : TCTB2
Configure as the input/output signal from CTIMER B2
3 : GPIO30
Configure as GPIO30
4 : UART0TX
Configure as UART0 TX output signal
5 : UA1RTS
Configure as UART1 RTS output signal
6 : UNDEF6
Undefined/should not be used
7 : I2S_DAT
Configure as the I2S Data output signal
End of enumeration elements list.
PAD31PULL : Pad 31 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD31INPEN : Pad 31 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD31STRNG : Pad 31 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD31FNCSEL : Pad 31 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : ADCSE3
Configure as the analog input for ADC single ended input 3
1 : M0nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR0
2 : TCTA3
Configure as the input/output signal from CTIMER A3
3 : GPIO31
Configure as GPIO31
4 : UART0RX
Configure as the UART0 RX input signal
5 : TCTB1
Configure as the input/output signal from CTIMER B1
6 : UNDEF6
Undefined/should not be used
7 : UNDEF7
Undefined/should not be used
End of enumeration elements list.
Pad Configuration Register I
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD32PULL : Pad 32 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD32INPEN : Pad 32 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD32STRNG : Pad 32 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD32FNCSEL : Pad 32 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : ADCSE4
Configure as the analog input for ADC single ended input 4
1 : M0nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR0
2 : TCTB3
Configure as the input/output signal from CTIMER B3
3 : GPIO32
Configure as GPIO32
4 : UNDEF4
Undefined/should not be used
5 : TCTB1
Configure as the input/output signal from CTIMER B1
6 : UNDEF6
Undefined/should not be used
7 : UNDEF7
Undefined/should not be used
End of enumeration elements list.
PAD33PULL : Pad 33 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD33INPEN : Pad 33 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD33STRNG : Pad 33 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD33FNCSEL : Pad 33 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : ADCSE5
Configure as the analog ADC single ended port 5 input signal
1 : M0nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR0
2 : 32khz_XT
Configure as the 32kHz crystal output signal
3 : GPIO33
Configure as GPIO33
4 : UNDEF4
Undefined/should not be used
5 : M3nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR3
6 : TCTB1
Configure as the input/output signal from CTIMER B1
7 : SWO
Configure as the serial trace data output signal
End of enumeration elements list.
PAD34PULL : Pad 34 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD34INPEN : Pad 34 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD34STRNG : Pad 34 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD34FNCSEL : Pad 34 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : ADCSE6
Configure as the analog input for ADC single ended input 6
1 : M0nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR0
2 : M2nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR2
3 : GPIO34
Configure as GPIO34
4 : CMPRF2
Configure as the analog comparator reference 2 signal
5 : M3nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR3
6 : M4nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR4
7 : M5nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR5
End of enumeration elements list.
PAD35PULL : Pad 35 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD35INPEN : Pad 35 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD35STRNG : Pad 35 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD35FNCSEL : Pad 35 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : ADCSE7
Configure as the analog input for ADC single ended input 7
1 : M1nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR1
2 : UART1TX
Configure as the UART1 TX signal
3 : GPIO35
Configure as GPIO35
4 : M4nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR4
5 : TCTA1
Configure as the input/output signal from CTIMER A1
6 : UA0RTS
Configure as the UART0 RTS output
7 : M3nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR3
End of enumeration elements list.
GPIO Interrupt Registers 31-0: Enable
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write
GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write
GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write
GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write
GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write
GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write
GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write
GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write
GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write
GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write
GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write
GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write
GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write
GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write
GPIO Interrupt Registers 31-0: Status
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write
GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write
GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write
GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write
GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write
GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write
GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write
GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write
GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write
GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write
GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write
GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write
GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write
GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write
GPIO Interrupt Registers 31-0: Clear
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write
GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write
GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write
GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write
GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write
GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write
GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write
GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write
GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write
GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write
GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write
GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write
GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write
GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write
GPIO Interrupt Registers 31-0: Set
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write
GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write
GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write
GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write
GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write
GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write
GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write
GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write
GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write
GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write
GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write
GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write
GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write
GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write
GPIO Interrupt Registers 49-32: Enable
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO Interrupt Registers 49-32: Status
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO Interrupt Registers 49-32: Clear
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
GPIO Interrupt Registers 49-32: Set
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write
GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write
GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write
GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write
GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write
GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write
GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write
GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write
GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write
GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write
GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write
GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write
GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write
GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write
GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write
GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write
GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write
GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write
Pad Configuration Register J
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD36PULL : Pad 36 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD36INPEN : Pad 36 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD36STRNG : Pad 36 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD36FNCSEL : Pad 36 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : TRIG1
Configure as the ADC Trigger 1 signal
1 : M1nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR1
2 : UART1RX
Configure as the UART1 RX signal
3 : GPIO36
Configure as GPIO36
4 : 32khz_XT
Configure as the 32kHz output clock from the crystal
5 : M2nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR2
6 : UA0CTS
Configure as the UART0 CTS signal
7 : M3nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR3
End of enumeration elements list.
PAD37PULL : Pad 37 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD37INPEN : Pad 37 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD37STRNG : Pad 37 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD37FNCSEL : Pad 37 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : TRIG2
Configure as the ADC Trigger 2 signal
1 : M1nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR1
2 : UA0RTS
Configure as the UART0 RTS signal
3 : GPIO37
Configure as GPIO37
4 : M3nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR3
5 : M4nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR4
6 : PDM_CLK
Configure as the PDM CLK output signal
7 : TCTA1
Configure as the input/output signal from CTIMER A1
End of enumeration elements list.
PAD38PULL : Pad 38 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD38INPEN : Pad 38 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD38STRNG : Pad 38 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD38FNCSEL : Pad 38 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : TRIG3
Configure as the ADC Trigger 3 signal
1 : M1nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR1
2 : UA0CTS
Configure as the UART0 CTS signal
3 : GPIO38
Configure as GPIO38
4 : M3WIR3
Configure as the IOSLAVE SPI 3-wire MOSI/MISO signal
5 : M3MOSI
Configure as the IOMSTR3 SPI MOSI output signal
6 : M4nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR4
7 : SLWIR3LB
Configure as the IOMSTR3 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
End of enumeration elements list.
PAD39PULL : Pad 39 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD39INPEN : Pad 39 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD39STRNG : Pad 39 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD39FNCSEL : Pad 39 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : UART0TX
Configure as the UART0 TX Signal
1 : UART1TX
Configure as the UART1 TX signal
2 : CLKOUT
Configure as the CLKOUT signal
3 : GPIO39
Configure as GPIO39
4 : M4SCL
Configure as the IOMSTR4 I2C SCL signal
5 : M4SCK
Configure as the IOMSTR4 SPI SCK signal
6 : M4SCKLB
Configure as the IOMSTR4 SPI SCK loopback signal from IOSLAVE
7 : M4SCLLB
Configure as the IOMSTR4 I2C SCL loopback signal from IOSLAVE
End of enumeration elements list.
PAD39RSEL : Pad 39 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
Pad Configuration Register K
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD40PULL : Pad 40 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD40INPEN : Pad 40 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD40STRNG : Pad 40 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD40FNCSEL : Pad 40 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : UART0RX
Configure as the UART0 RX input signal
1 : UART1RX
Configure as the UART1 RX input signal
2 : TRIG0
Configure as the ADC Trigger 0 signal
3 : GPIO40
Configure as GPIO40
4 : M4SDA
Configure as the IOMSTR4 I2C serial data I/O signal
5 : M4MISO
Configure as the IOMSTR4 SPI MISO input signal
6 : SLMISOLB
Configure as the IOMSTR4 SPI MISO loopback signal from IOSLAVE
7 : SLSDALB
Configure as the IOMSTR4 I2C SDA loopback signal from IOSLAVE
End of enumeration elements list.
PAD40RSEL : Pad 40 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD41PULL : Pad 41 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD41INPEN : Pad 41 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD41STRNG : Pad 41 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD41FNCSEL : Pad 41 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : M2nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR2
1 : CLKOUT
Configure as the CLKOUT signal
2 : SWO
Configure as the serial wire debug SWO signal
3 : GPIO41
Configure as GPIO41
4 : M3nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR3
5 : M5nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR5
6 : M4nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR4
7 : UA0RTS
Configure as the UART0 RTS output
End of enumeration elements list.
PAD41PWRUP : Pad 41 upper power switch enable
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : DIS
Power switch disabled
1 : EN
Power switch enabled (VDD switch)
End of enumeration elements list.
PAD42PULL : Pad 42 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD42INPEN : Pad 42 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD42STRNG : Pad 42 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD42FNCSEL : Pad 42 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : M2nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR2
1 : M0nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR0
2 : TCTA0
Configure as the input/output signal from CTIMER A0
3 : GPIO42
Configure as GPIO42
4 : M3SCL
Configure as the IOMSTR3 I2C SCL clock I/O signal
5 : M3SCK
Configure as the IOMSTR3 SPI SCK output
6 : M3SCKLB
Configure as the IOMSTR3 SPI clock loopback to the IOSLAVE device
7 : M3SCLLB
Configure as the IOMSTR3 I2C clock loopback to the IOSLAVE device
End of enumeration elements list.
PAD42RSEL : Pad 42 pullup resistor selection.
bits : 22 - 45 (24 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD43PULL : Pad 43 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD43INPEN : Pad 43 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD43STRNG : Pad 43 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD43FNCSEL : Pad 43 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : M2nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR2
1 : M0nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR0
2 : TCTB0
Configure as the input/output signal from CTIMER B0
3 : GPIO43
Configure as GPIO43
4 : M3SDA
Configure as the IOMSTR3 I2C SDA signal
5 : M3MISO
Configure as the IOMSTR3 SPI MISO signal
6 : SLMISOLB
Configure as the IOMSTR3 SPI MISO loopback signal from IOSLAVE
7 : SLSDALB
Configure as the IOMSTR3 I2C SDA loopback signal from IOSLAVE
End of enumeration elements list.
PAD43RSEL : Pad 43 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
Pad Configuration Register L
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD44PULL : Pad 44 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD44INPEN : Pad 44 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD44STRNG : Pad 44 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD44FNCSEL : Pad 44 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : UA1RTS
Configure as the UART1 RTS output signal
1 : M0nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR0
2 : TCTA1
Configure as the input/output signal from CTIMER A1
3 : GPIO44
Configure as GPIO44
4 : M4WIR3
Configure as the IOMSTR4 SPI 3-wire MOSI/MISO signal
5 : M4MOSI
Configure as the IOMSTR4 SPI MOSI signal
6 : M5nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR5
7 : SLWIR3LB
Configure as the IOMSTR4 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
End of enumeration elements list.
PAD45PULL : Pad 45 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD45INPEN : Pad 45 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD45STRNG : Pad 45 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD45FNCSEL : Pad 45 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : UA1CTS
Configure as the UART1 CTS input signal
1 : M0nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR0
2 : TCTB1
Configure as the input/output signal from CTIMER B1
3 : GPIO45
Configure as GPIO45
4 : M4nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR4
5 : M3nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR3
6 : M5nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR5
7 : TCTA1
Configure as the input/output signal from CTIMER A1
End of enumeration elements list.
PAD46PULL : Pad 46 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD46INPEN : Pad 46 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD46STRNG : Pad 46 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD46FNCSEL : Pad 46 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : 32khz_XT
Configure as the 32kHz output clock from the crystal
1 : M0nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR0
2 : TCTA2
Configure as the input/output signal from CTIMER A2
3 : GPIO46
Configure as GPIO46
4 : TCTA1
Configure as the input/output signal from CTIMER A1
5 : M5nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR5
6 : M4nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR4
7 : SWO
Configure as the serial wire debug SWO signal
End of enumeration elements list.
PAD47PULL : Pad 47 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD47INPEN : Pad 47 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD47STRNG : Pad 47 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD47FNCSEL : Pad 47 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : M2nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR2
1 : M0nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR0
2 : TCTB2
Configure as the input/output signal from CTIMER B2
3 : GPIO47
Configure as GPIO47
4 : M5WIR3
Configure as the IOMSTR5 SPI 3-wire MOSI/MISO signal
5 : M5MOSI
Configure as the IOMSTR5 SPI MOSI output signal
6 : M4nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR4
7 : SLWIR3LB
Configure as the IOMSTR5 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
End of enumeration elements list.
Pad Configuration Register M
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD48PULL : Pad 48 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD48INPEN : Pad 48 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD48STRNG : Pad 48 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD48FNCSEL : Pad 48 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : M2nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR2
1 : M0nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR0
2 : TCTA3
Configure as the input/output signal from CTIMER A3
3 : GPIO48
Configure as GPIO48
4 : M5SCL
Configure as the IOMSTR5 I2C SCL clock I/O signal
5 : M5SCK
Configure as the IOMSTR5 SPI SCK output
6 : M5SCKLB
Configure as the IOMSTR5 SPI clock loopback to the IOSLAVE device
7 : M5SCLLB
Configure as the IOMSTR5 I2C clock loopback to the IOSLAVE device
End of enumeration elements list.
PAD48RSEL : Pad 48 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD49PULL : Pad 49 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD49INPEN : Pad 49 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD49STRNG : Pad 49 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD49FNCSEL : Pad 49 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : M2nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR2
1 : M0nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR0
2 : TCTB3
Configure as the input/output signal from CTIMER B3
3 : GPIO49
Configure as GPIO49
4 : M5SDA
Configure as the IOMSTR5 I2C serial data I/O signal
5 : M5MISO
Configure as the IOMSTR5 SPI MISO input signal
6 : SLMISOLB
Configure as the IOMSTR5 SPI MISO loopback signal from IOSLAVE
7 : SLSDALB
Configure as the IOMSTR5 I2C SDA loopback signal from IOSLAVE
End of enumeration elements list.
PAD49RSEL : Pad 49 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
Pad Configuration Register B
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD4PULL : Pad 4 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD4INPEN : Pad 4 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD4STRNG : Pad 4 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD4FNCSEL : Pad 4 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : UA0CTS
Configure as the UART0 CTS input signal
1 : SLINT
Configure as the IOSLAVE interrupt out signal
2 : M0nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR0
3 : GPIO4
Configure as GPIO4
4 : SLINTGP
Configure as the IOSLAVE interrupt loopback signal
5 : M2nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR2
6 : CLKOUT
Configure as the CLKOUT signal
7 : 32khz_XT
Configure as the 32kHz crystal output signal
End of enumeration elements list.
PAD4PWRDN : Pad 4 VSS power switch enable
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : DIS
Power switch disabled
1 : EN
Power switch enabled (switch to GND)
End of enumeration elements list.
PAD5PULL : Pad 5 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD5INPEN : Pad 5 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD5STRNG : Pad 5 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD5FNCSEL : Pad 5 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : M0SCL
Configure as the IOMSTR0 I2C SCL signal
1 : M0SCK
Configure as the IOMSTR0 SPI SCK signal
2 : UA0RTS
Configure as the UART0 RTS signal output
3 : GPIO5
Configure as GPIO5
4 : M0SCKLB
Configure as the IOMSTR0 SPI SCK loopback signal from IOSLAVE
5 : EXTHFA
Configure as the External HFA input clock
6 : M0SCLLB
Configure as the IOMSTR0 I2C SCL loopback signal from IOSLAVE
7 : M1nCE2
Configure as the SPI Channel 2 nCE signal from IOMSTR1
End of enumeration elements list.
PAD5RSEL : Pad 5 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD6PULL : Pad 6 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD6INPEN : Pad 6 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD6STRNG : Pad 6 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD6FNCSEL : Pad 6 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : M0SDA
Configure as the IOMSTR0 I2C SDA signal
1 : M0MISO
Configure as the IOMSTR0 SPI MISO signal
2 : UA0CTS
Configure as the UART0 CTS input signal
3 : GPIO6
Configure as GPIO6
4 : SLMISOLB
Configure as the IOMSTR0 SPI MISO loopback signal from IOSLAVE
5 : M1nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR1
6 : SLSDALB
Configure as the IOMSTR0 I2C SDA loopback signal from IOSLAVE
7 : I2S_DAT
Configure as the I2S Data output signal
End of enumeration elements list.
PAD6RSEL : Pad 6 pullup resistor selection.
bits : 22 - 45 (24 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD7PULL : Pad 7 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD7INPEN : Pad 7 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD7STRNG : Pad 7 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD7FNCSEL : Pad 7 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : M0WIR3
Configure as the IOMSTR0 SPI 3-wire MOSI/MISO signal
1 : M0MOSI
Configure as the IOMSTR0 SPI MOSI signal
2 : CLKOUT
Configure as the CLKOUT signal
3 : GPIO7
Configure as GPIO7
4 : TRIG0
Configure as the ADC Trigger 0 signal
5 : UART0TX
Configure as the UART0 TX output signal
6 : SLWIR3LB
Configure as the IOMSTR0 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
7 : M1nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR1
End of enumeration elements list.
GPIO Configuration Register A
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0INCFG : GPIO0 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO0OUTCFG : GPIO0 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO0INTD : GPIO0 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO1INCFG : GPIO1 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO1OUTCFG : GPIO1 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO1INTD : GPIO1 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO2INCFG : GPIO2 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO2OUTCFG : GPIO2 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO2INTD : GPIO2 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO3INCFG : GPIO3 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO3OUTCFG : GPIO3 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO3INTD : GPIO3 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO4INCFG : GPIO4 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO4OUTCFG : GPIO4 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO4INTD : GPIO4 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO5INCFG : GPIO5 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO5OUTCFG : GPIO5 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO5INTD : GPIO5 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO6INCFG : GPIO6 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO6OUTCFG : GPIO6 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO6INTD : GPIO6 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO7INCFG : GPIO7 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO7OUTCFG : GPIO7 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO7INTD : GPIO7 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register B
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO8INCFG : GPIO8 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO8OUTCFG : GPIO8 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO8INTD : GPIO8 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO9INCFG : GPIO9 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO9OUTCFG : GPIO9 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO9INTD : GPIO9 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO10INCFG : GPIO10 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO10OUTCFG : GPIO10 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO10INTD : GPIO10 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO11INCFG : GPIO11 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO11OUTCFG : GPIO11 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO11INTD : GPIO11 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO12INCFG : GPIO12 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO12OUTCFG : GPIO12 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO12INTD : GPIO12 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO13INCFG : GPIO13 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO13OUTCFG : GPIO13 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO13INTD : GPIO13 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO14INCFG : GPIO14 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO14OUTCFG : GPIO14 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO14INTD : GPIO14 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO15INCFG : GPIO15 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO15OUTCFG : GPIO15 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO15INTD : GPIO15 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register C
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO16INCFG : GPIO16 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO16OUTCFG : GPIO16 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO16INTD : GPIO16 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO17INCFG : GPIO17 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO17OUTCFG : GPIO17 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO17INTD : GPIO17 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO18INCFG : GPIO18 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO18OUTCFG : GPIO18 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO18INTD : GPIO18 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO19INCFG : GPIO19 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO19OUTCFG : GPIO19 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO19INTD : GPIO19 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO20INCFG : GPIO20 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO20OUTCFG : GPIO20 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO20INTD : GPIO20 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO21INCFG : GPIO21 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO21OUTCFG : GPIO21 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO21INTD : GPIO21 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO22INCFG : GPIO22 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO22OUTCFG : GPIO22 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO22INTD : GPIO22 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO23INCFG : GPIO23 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO23OUTCFG : GPIO23 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO23INTD : GPIO23 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register D
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO24INCFG : GPIO24 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO24OUTCFG : GPIO24 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO24INTD : GPIO24 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO25INCFG : GPIO25 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO25OUTCFG : GPIO25 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO25INTD : GPIO25 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO26INCFG : GPIO26 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO26OUTCFG : GPIO26 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO26INTD : GPIO26 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO27INCFG : GPIO27 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO27OUTCFG : GPIO27 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO27INTD : GPIO27 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO28INCFG : GPIO28 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO28OUTCFG : GPIO28 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO28INTD : GPIO28 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO29INCFG : GPIO29 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO29OUTCFG : GPIO29 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO29INTD : GPIO29 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO30INCFG : GPIO30 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO30OUTCFG : GPIO30 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO30INTD : GPIO30 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO31INCFG : GPIO31 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO31OUTCFG : GPIO31 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO31INTD : GPIO31 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register E
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO32INCFG : GPIO32 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO32OUTCFG : GPIO32 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO32INTD : GPIO32 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO33INCFG : GPIO33 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO33OUTCFG : GPIO33 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO33INTD : GPIO33 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO34INCFG : GPIO34 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO34OUTCFG : GPIO34 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO34INTD : GPIO34 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO35INCFG : GPIO35 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO35OUTCFG : GPIO35 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO35INTD : GPIO35 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO36INCFG : GPIO36 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO36OUTCFG : GPIO36 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO36INTD : GPIO36 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO37INCFG : GPIO37 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO37OUTCFG : GPIO37 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO37INTD : GPIO37 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO38INCFG : GPIO38 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO38OUTCFG : GPIO38 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO38INTD : GPIO38 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO39INCFG : GPIO39 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO39OUTCFG : GPIO39 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO39INTD : GPIO39 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register F
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO40INCFG : GPIO40 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO40OUTCFG : GPIO40 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO40INTD : GPIO40 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO41INCFG : GPIO41 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO41OUTCFG : GPIO41 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO41INTD : GPIO41 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO42INCFG : GPIO42 input enable.
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO42OUTCFG : GPIO42 output configuration.
bits : 9 - 19 (11 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO42INTD : GPIO42 interrupt direction.
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO43INCFG : GPIO43 input enable.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO43OUTCFG : GPIO43 output configuration.
bits : 13 - 27 (15 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO43INTD : GPIO43 interrupt direction.
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO44INCFG : GPIO44 input enable.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO44OUTCFG : GPIO44 output configuration.
bits : 17 - 35 (19 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO44INTD : GPIO44 interrupt direction.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO45INCFG : GPIO45 input enable.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO45OUTCFG : GPIO45 output configuration.
bits : 21 - 43 (23 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO45INTD : GPIO45 interrupt direction.
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO46INCFG : GPIO46 input enable.
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO46OUTCFG : GPIO46 output configuration.
bits : 25 - 51 (27 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO46INTD : GPIO46 interrupt direction.
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO47INCFG : GPIO47 input enable.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO47OUTCFG : GPIO47 output configuration.
bits : 29 - 59 (31 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO47INTD : GPIO47 interrupt direction.
bits : 31 - 62 (32 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO Configuration Register G
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO48INCFG : GPIO48 input enable.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO48OUTCFG : GPIO48 output configuration.
bits : 1 - 3 (3 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO48INTD : GPIO48 interrupt direction.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
GPIO49INCFG : GPIO49 input enable.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : READ
Read the GPIO pin data
1 : RDZERO
Readback will always be zero
End of enumeration elements list.
GPIO49OUTCFG : GPIO49 output configuration.
bits : 5 - 11 (7 bit)
access : read-write
Enumeration:
0 : DIS
Output disabled
1 : PUSHPULL
Output is push-pull
2 : OD
Output is open drain
3 : TS
Output is tri-state
End of enumeration elements list.
GPIO49INTD : GPIO49 interrupt direction.
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : INTLH
Interrupt on low to high GPIO transition
1 : INTHL
Interrupt on high to low GPIO transition
End of enumeration elements list.
Key Register for all pad configuration registers
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PADKEY : Key register value.
bits : 0 - 31 (32 bit)
access : read-write
Enumeration:
115 : Key
Key
End of enumeration elements list.
Pad Configuration Register C
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD8PULL : Pad 8 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD8INPEN : Pad 8 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD8STRNG : Pad 8 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD8FNCSEL : Pad 8 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : M1SCL
Configure as the IOMSTR1 I2C SCL signal
1 : M1SCK
Configure as the IOMSTR1 SPI SCK signal
2 : M0nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR0
3 : GPIO8
Configure as GPIO8
4 : M2nCE4
Configure as the SPI channel 4 nCE signal from IOMSTR2
5 : M1SCKLB
Configure as the IOMSTR1 SPI SCK loopback signal from IOSLAVE
6 : UART1TX
Configure as the UART1 TX output signal
7 : M1SCLLB
Configure as the IOMSTR1 I2C SCL loopback signal from IOSLAVE
End of enumeration elements list.
PAD8RSEL : Pad 8 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD9PULL : Pad 9 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD9INPEN : Pad 9 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD9STRNG : Pad 9 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD9FNCSEL : Pad 9 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : M1SDA
Configure as the IOMSTR1 I2C SDA signal
1 : M1MISO
Configure as the IOMSTR1 SPI MISO signal
2 : M0nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR0
3 : GPIO9
Configure as GPIO9
4 : M4nCE5
Configure as the SPI channel 5 nCE signal from IOMSTR4
5 : SLMISOLB
Configure as the IOMSTR1 SPI MISO loopback signal from IOSLAVE
6 : UART1RX
Configure as UART1 RX input signal
7 : SLSDALB
Configure as the IOMSTR1 I2C SDA loopback signal from IOSLAVE
End of enumeration elements list.
PAD9RSEL : Pad 9 pullup resistor selection
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PULL1_5K
Pullup is ~1.5 KOhms
1 : PULL6K
Pullup is ~6 KOhms
2 : PULL12K
Pullup is ~12 KOhms
3 : PULL24K
Pullup is ~24 KOhms
End of enumeration elements list.
PAD10PULL : Pad 10 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD10INPEN : Pad 10 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD10STRNG : Pad 10 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD10FNCSEL : Pad 10 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : M1WIR3
Configure as the IOMSTR1 SPI 3-wire MOSI/MISO signal
1 : M1MOSI
Configure as the IOMSTR1 SPI MOSI signal
2 : M0nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR0
3 : GPIO10
Configure as GPIO10
4 : M2nCE6
Configure as the SPI channel 6 nCE signal from IOMSTR2
5 : UA1RTS
Configure as the UART1 RTS output signal
6 : M4nCE4
Configure as the SPI channel 4 nCE signal from the IOMSTR4
7 : SLWIR3LB
Configure as the IOMSTR1 SPI 3-wire MOSI/MISO loopback signal from IOSLAVE
End of enumeration elements list.
PAD11PULL : Pad 11 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD11INPEN : Pad 11 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD11STRNG : Pad 11 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD11FNCSEL : Pad 11 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : ADCSE2
Configure as the analog input for ADC single ended input 2
1 : M0nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR0
2 : CLKOUT
Configure as the CLKOUT signal
3 : GPIO11
Configure as GPIO11
4 : M2nCE7
Configure as the SPI channel 7 nCE signal from IOMSTR2
5 : UA1CTS
Configure as the UART1 CTS input signal
6 : UART0RX
Configure as the UART0 RX input signal
7 : PDM_DATA
Configure as the PDM Data input signal
End of enumeration elements list.
GPIO Input Register A
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDA : GPIO31-0 read data.
bits : 0 - 31 (32 bit)
access : read-write
GPIO Input Register B
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RDB : GPIO49-32 read data.
bits : 0 - 17 (18 bit)
access : read-write
GPIO Output Register A
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTA : GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write
GPIO Output Register B
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTB : GPIO49-32 write data.
bits : 0 - 17 (18 bit)
access : read-write
GPIO Output Register A Set
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTSA : Set the GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write
GPIO Output Register B Set
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTSB : Set the GPIO49-32 write data.
bits : 0 - 17 (18 bit)
access : read-write
GPIO Output Register A Clear
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTCA : Clear the GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write
GPIO Output Register B Clear
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WTCB : Clear the GPIO49-32 write data.
bits : 0 - 17 (18 bit)
access : read-write
GPIO Enable Register A
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENA : GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write
GPIO Enable Register B
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENB : GPIO49-32 output enables
bits : 0 - 17 (18 bit)
access : read-write
GPIO Enable Register A Set
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENSA : Set the GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write
GPIO Enable Register B Set
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENSB : Set the GPIO49-32 output enables
bits : 0 - 17 (18 bit)
access : read-write
GPIO Enable Register A Clear
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENCA : Clear the GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write
GPIO Enable Register B Clear
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENCB : Clear the GPIO49-32 output enables
bits : 0 - 17 (18 bit)
access : read-write
STIMER Capture Control
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
STSEL0 : STIMER Capture 0 Select.
bits : 0 - 5 (6 bit)
access : read-write
STPOL0 : STIMER Capture 0 Polarity.
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : CAPLH
Capture on low to high GPIO transition
1 : CAPHL
Capture on high to low GPIO transition
End of enumeration elements list.
STSEL1 : STIMER Capture 1 Select.
bits : 8 - 21 (14 bit)
access : read-write
STPOL1 : STIMER Capture 1 Polarity.
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : CAPLH
Capture on low to high GPIO transition
1 : CAPHL
Capture on high to low GPIO transition
End of enumeration elements list.
STSEL2 : STIMER Capture 2 Select.
bits : 16 - 37 (22 bit)
access : read-write
STPOL2 : STIMER Capture 2 Polarity.
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : CAPLH
Capture on low to high GPIO transition
1 : CAPHL
Capture on high to low GPIO transition
End of enumeration elements list.
STSEL3 : STIMER Capture 3 Select.
bits : 24 - 53 (30 bit)
access : read-write
STPOL3 : STIMER Capture 3 Polarity.
bits : 30 - 60 (31 bit)
access : read-write
Enumeration:
0 : CAPLH
Capture on low to high GPIO transition
1 : CAPHL
Capture on high to low GPIO transition
End of enumeration elements list.
Pad Configuration Register D
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD12PULL : Pad 12 pullup enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD12INPEN : Pad 12 input enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD12STRNG : Pad 12 drive strength
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD12FNCSEL : Pad 12 function select
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : ADCD0NSE9
Configure as the ADC Differential pair 0 N, or Single Ended input 9 analog input signal. Determination of the D0N vs SE9 usage is done when the particular channel is selected within the ADC module
1 : M1nCE0
Configure as the SPI channel 0 nCE signal from IOMSTR1
2 : TCTA0
Configure as the input/output signal from CTIMER A0
3 : GPIO12
Configure as GPIO12
4 : CLKOUT
Configure as CLKOUT signal
5 : PDM_CLK
Configure as the PDM CLK output signal
6 : UA0CTS
Configure as the UART0 CTS input signal
7 : UART1TX
Configure as the UART1 TX output signal
End of enumeration elements list.
PAD13PULL : Pad 13 pullup enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD13INPEN : Pad 13 input enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD13STRNG : Pad 13 drive strength
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD13FNCSEL : Pad 13 function select
bits : 11 - 24 (14 bit)
access : read-write
Enumeration:
0 : ADCD0PSE8
Configure as the ADC Differential pair 0 P, or Single Ended input 8 analog input signal. Determination of the D0P vs SE8 usage is done when the particular channel is selected within the ADC module
1 : M1nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR1
2 : TCTB0
Configure as the input/output signal from CTIMER B0
3 : GPIO13
Configure as GPIO13
4 : M2nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR2
5 : EXTHFB
Configure as the external HFRC oscillator input
6 : UA0RTS
Configure as the UART0 RTS signal output
7 : UART1RX
Configure as the UART1 RX input signal
End of enumeration elements list.
PAD14PULL : Pad 14 pullup enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD14INPEN : Pad 14 input enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD14STRNG : Pad 14 drive strength
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD14FNCSEL : Pad 14 function select
bits : 19 - 40 (22 bit)
access : read-write
Enumeration:
0 : ADCD1P
Configure as the analog ADC differential pair 1 P input signal
1 : M1nCE2
Configure as the SPI channel 2 nCE signal from IOMSTR1
2 : UART1TX
Configure as the UART1 TX output signal
3 : GPIO14
Configure as GPIO14
4 : M2nCE1
Configure as the SPI channel 1 nCE signal from IOMSTR2
5 : EXTHFS
Configure as the External HFRC oscillator input select
6 : SWDCK
Configure as the alternate input for the SWDCK input signal
7 : 32khz_XT
Configure as the 32kHz crystal output signal
End of enumeration elements list.
PAD15PULL : Pad 15 pullup enable
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : DIS
Pullup disabled
1 : EN
Pullup enabled
End of enumeration elements list.
PAD15INPEN : Pad 15 input enable
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : DIS
Pad input disabled
1 : EN
Pad input enabled
End of enumeration elements list.
PAD15STRNG : Pad 15 drive strength
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : LOW
Low drive strength
1 : HIGH
High drive strength
End of enumeration elements list.
PAD15FNCSEL : Pad 15 function select
bits : 27 - 56 (30 bit)
access : read-write
Enumeration:
0 : ADCD1N
Configure as the analog ADC differential pair 1 N input signal
1 : M1nCE3
Configure as the SPI channel 3 nCE signal from IOMSTR1
2 : UART1RX
Configure as the UART1 RX signal
3 : GPIO15
Configure as GPIO15
4 : M2nCE2
Configure as the SPI Channel 2 nCE signal from IOMSTR2
5 : EXTXT
Configure as the external XTAL oscillator input
6 : SWDIO
Configure as an alternate port for the SWDIO I/O signal
7 : SWO
Configure as an SWO (Serial Wire Trace output)
End of enumeration elements list.
IOM0 Flow Control IRQ Select
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM0IRQ : IOMSTR0 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM1 Flow Control IRQ Select
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM1IRQ : IOMSTR1 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM2 Flow Control IRQ Select
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM2IRQ : IOMSTR2 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM3 Flow Control IRQ Select
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM3IRQ : IOMSTR3 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM4 Flow Control IRQ Select
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM4IRQ : IOMSTR4 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM5 Flow Control IRQ Select
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IOM5IRQ : IOMSTR5 IRQ pad select.
bits : 0 - 5 (6 bit)
access : read-write
IOM to IOS Loopback Control
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOOPBACK : IOM to IOS loopback control.
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : LOOP0
Loop IOM0 to IOS
1 : LOOP1
Loop IOM1 to IOS
2 : LOOP2
Loop IOM2 to IOS
3 : LOOP3
Loop IOM3 to IOS
4 : LOOP4
Loop IOM4 to IOS
5 : LOOP5
Loop IOM5 to IOS
6 : LOOPNONE
No loopback connections
End of enumeration elements list.
GPIO Observation Mode Sample register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OBS_DATA : Sample of the data output on the GPIO observation port. May have async sampling issues, as the data is not synronized to the read operation. Intended for debug purposes only
bits : 0 - 15 (16 bit)
access : read-write
Alternate Pad Configuration reg0 (Pads 3,2,1,0)
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD0_DS1 : Pad 0 high order drive strength selection. Used in conjunction with PAD0STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD0_SR : Pad 0 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD1_DS1 : Pad 1 high order drive strength selection. Used in conjunction with PAD1STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD1_SR : Pad 1 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD2_DS1 : Pad 2 high order drive strength selection. Used in conjunction with PAD2STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD2_SR : Pad 2 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD3_DS1 : Pad 3 high order drive strength selection. Used in conjunction with PAD3STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD3_SR : Pad 3 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg1 (Pads 7,6,5,4)
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD4_DS1 : Pad 4 high order drive strength selection. Used in conjunction with PAD4STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD4_SR : Pad 4 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD5_DS1 : Pad 5 high order drive strength selection. Used in conjunction with PAD5STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD5_SR : Pad 5 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD6_DS1 : Pad 6 high order drive strength selection. Used in conjunction with PAD6STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD6_SR : Pad 6 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD7_DS1 : Pad 7 high order drive strength selection. Used in conjunction with PAD7STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD7_SR : Pad 7 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg2 (Pads 11,10,9,8)
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD8_DS1 : Pad 8 high order drive strength selection. Used in conjunction with PAD8STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD8_SR : Pad 8 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD9_DS1 : Pad 9 high order drive strength selection. Used in conjunction with PAD9STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD9_SR : Pad 9 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD10_DS1 : Pad 10 high order drive strength selection. Used in conjunction with PAD10STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD10_SR : Pad 10 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD11_DS1 : Pad 11 high order drive strength selection. Used in conjunction with PAD11STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD11_SR : Pad 11 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg3 (Pads 15,14,13,12)
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD12_DS1 : Pad 12 high order drive strength selection. Used in conjunction with PAD12STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD12_SR : Pad 12 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD13_DS1 : Pad 13 high order drive strength selection. Used in conjunction with PAD13STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD13_SR : Pad 13 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD14_DS1 : Pad 14 high order drive strength selection. Used in conjunction with PAD14STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD14_SR : Pad 14 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD15_DS1 : Pad 15 high order drive strength selection. Used in conjunction with PAD15STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD15_SR : Pad 15 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg4 (Pads 19,18,17,16)
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD16_DS1 : Pad 16 high order drive strength selection. Used in conjunction with PAD16STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD16_SR : Pad 16 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD17_DS1 : Pad 17 high order drive strength selection. Used in conjunction with PAD17STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD17_SR : Pad 17 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD18_DS1 : Pad 18 high order drive strength selection. Used in conjunction with PAD18STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD18_SR : Pad 18 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD19_DS1 : Pad 19 high order drive strength selection. Used in conjunction with PAD19STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD19_SR : Pad 19 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg5 (Pads 23,22,21,20)
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD20_DS1 : Pad 20 high order drive strength selection. Used in conjunction with PAD20STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD20_SR : Pad 20 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD21_DS1 : Pad 21 high order drive strength selection. Used in conjunction with PAD21STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD21_SR : Pad 21 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD22_DS1 : Pad 22 high order drive strength selection. Used in conjunction with PAD22STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD22_SR : Pad 22 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD23_DS1 : Pad 23 high order drive strength selection. Used in conjunction with PAD23STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD23_SR : Pad 23 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg6 (Pads 27,26,25,24)
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD24_DS1 : Pad 24 high order drive strength selection. Used in conjunction with PAD24STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD24_SR : Pad 24 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD25_DS1 : Pad 25 high order drive strength selection. Used in conjunction with PAD25STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD25_SR : Pad 25 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD26_DS1 : Pad 26 high order drive strength selection. Used in conjunction with PAD26STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD26_SR : Pad 26 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD27_DS1 : Pad 27 high order drive strength selection. Used in conjunction with PAD27STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD27_SR : Pad 27 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
Alternate Pad Configuration reg7 (Pads 31,30,29,28)
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD28_DS1 : Pad 28 high order drive strength selection. Used in conjunction with PAD28STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write
PAD28_SR : Pad 28 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD29_DS1 : Pad 29 high order drive strength selection. Used in conjunction with PAD29STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write
PAD29_SR : Pad 29 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD30_DS1 : Pad 30 high order drive strength selection. Used in conjunction with PAD30STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write
PAD30_SR : Pad 30 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
PAD31_DS1 : Pad 31 high order drive strength selection. Used in conjunction with PAD31STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write
PAD31_SR : Pad 31 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
1 : SR_EN
Enables Slew rate control on pad
End of enumeration elements list.
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