Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x294 byte (0x0)
mem_usage : registers
protection :
Configuration Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCEN : This bit enables the ADC module. While the ADC is enabled, the ADCCFG and SLOT Configuration regsiter settings must remain stable and unchanged. All configuration register settings, slot configuration settings and window comparison settings should be written prior to setting the ADCEN bit to '1'.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Disable the ADC module.
1 : EN
Enable the ADC module.
End of enumeration elements list.
RPTEN : This bit enables Repeating Scan Mode.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : SINGLE_SCAN
In Single Scan Mode, the ADC will complete a single scan upon each trigger event.
1 : REPEATING_SCAN
In Repeating Scan Mode, the ADC will complete it's first scan upon the initial trigger event and all subsequent scans will occur at regular intervals defined by the configuration programmed for the CTTMRA3 internal timer until the timer is disabled or the ADC is disabled. When disabling the ADC (setting ADCEN to '0'), the RPTEN bit should be cleared.
End of enumeration elements list.
LPMODE : Select power mode to enter between active scans.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : MODE0
Low Power Mode 0. Leaves the ADC fully powered between scans with minimum latency between a trigger event and sample data collection.
1 : MODE1
Low Power Mode 1. Powers down all circuity and clocks associated with the ADC until the next trigger event. Between scans, the reference buffer requires up to 50us of delay from a scan trigger event before the conversion will commence while operating in this mode.
End of enumeration elements list.
CKMODE : Clock mode register
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : LPCKMODE
Disable the clock between scans for LPMODE0. Set LPCKMODE to 0x1 while configuring the ADC.
1 : LLCKMODE
Low Latency Clock Mode. When set, HFRC and the adc_clk will remain on while in functioning in LPMODE0.
End of enumeration elements list.
REFSEL : Select the ADC reference voltage.
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : INT2P0
Internal 2.0V Bandgap Reference Voltage
1 : INT1P5
Internal 1.5V Bandgap Reference Voltage
2 : EXT2P0
Off Chip 2.0V Reference
3 : EXT1P5
Off Chip 1.5V Reference
End of enumeration elements list.
DFIFORDEN : Destructive FIFO Read Enable. Setting this will enable FIFO pop upon reading the FIFOPR register.
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : DIS
Destructive Reads are prevented. Reads to the FIFOPR register will not POP an entry off the FIFO.
1 : EN
Reads to the FIFOPR registger will automatically pop an entry off the FIFO.
End of enumeration elements list.
TRIGSEL : Select the ADC trigger source.
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
0 : EXT0
Off chip External Trigger0 (ADC_ET0)
1 : EXT1
Off chip External Trigger1 (ADC_ET1)
2 : EXT2
Off chip External Trigger2 (ADC_ET2)
3 : EXT3
Off chip External Trigger3 (ADC_ET3)
4 : VCOMP
Voltage Comparator Output
7 : SWT
Software Trigger
End of enumeration elements list.
TRIGPOL : This bit selects the ADC trigger polarity for external off chip triggers.
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : RISING_EDGE
Trigger on rising edge.
1 : FALLING_EDGE
Trigger on falling edge.
End of enumeration elements list.
CLKSEL : Select the source and frequency for the ADC clock. All values not enumerated below are undefined.
bits : 24 - 49 (26 bit)
access : read-write
Enumeration:
0 : OFF
Off mode. The HFRC or HFRC_DIV2 clock must be selected for the ADC to function. The ADC controller automatically shuts off the clock in it's low power modes. When setting ADCEN to '0', the CLKSEL should remain set to one of the two clock selects for proper power down sequencing.
1 : HFRC
HFRC Core Clock divided by (CORESEL+1)
2 : HFRC_DIV2
HFRC Core Clock / 2 further divided by (CORESEL+1)
End of enumeration elements list.
Slot 1 Configuration Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN1 : This bit enables slot 1 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 1 for ADC conversions.
End of enumeration elements list.
WCEN1 : This bit enables the window compare function for slot 1.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 1.
End of enumeration elements list.
CHSEL1 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE1 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL1 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
Slot 2 Configuration Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN2 : This bit enables slot 2 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 2 for ADC conversions.
End of enumeration elements list.
WCEN2 : This bit enables the window compare function for slot 2.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 2.
End of enumeration elements list.
CHSEL2 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE2 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL2 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
Slot 3 Configuration Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN3 : This bit enables slot 3 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 3 for ADC conversions.
End of enumeration elements list.
WCEN3 : This bit enables the window compare function for slot 3.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 3.
End of enumeration elements list.
CHSEL3 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE3 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL3 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
Slot 4 Configuration Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN4 : This bit enables slot 4 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 4 for ADC conversions.
End of enumeration elements list.
WCEN4 : This bit enables the window compare function for slot 4.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 4.
End of enumeration elements list.
CHSEL4 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE4 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL4 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
Slot 5 Configuration Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN5 : This bit enables slot 5 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 5 for ADC conversions.
End of enumeration elements list.
WCEN5 : This bit enables the window compare function for slot 5.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 5.
End of enumeration elements list.
CHSEL5 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE5 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL5 : Select number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
ADC Interrupt registers: Enable
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNVCMP : ADC conversion complete interrupt.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : CNVCMPINT
ADC conversion complete interrupt.
End of enumeration elements list.
SCNCMP : ADC scan complete interrupt.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : SCNCMPINT
ADC scan complete interrupt.
End of enumeration elements list.
FIFOOVR1 : FIFO 75 percent full interrupt.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
1 : FIFO75INT
FIFO 75 percent full interrupt.
End of enumeration elements list.
FIFOOVR2 : FIFO 100 percent full interrupt.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
1 : FIFOFULLINT
FIFO 100 percent full interrupt.
End of enumeration elements list.
WCEXC : Window comparator voltage excursion interrupt.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : WCEXCINT
Window comparitor voltage excursion interrupt.
End of enumeration elements list.
WCINC : Window comparator voltage incursion interrupt.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
1 : WCINCINT
Window comparitor voltage incursion interrupt.
End of enumeration elements list.
DCMP : DMA Transfer Complete
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
1 : DMACOMPLETE
DMA Completed a transfer
End of enumeration elements list.
DERR : DMA Error Condition
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
1 : DMAERROR
DMA Error Condition Occurred
End of enumeration elements list.
ADC Interrupt registers: Status
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNVCMP : ADC conversion complete interrupt.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : CNVCMPINT
ADC conversion complete interrupt.
End of enumeration elements list.
SCNCMP : ADC scan complete interrupt.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : SCNCMPINT
ADC scan complete interrupt.
End of enumeration elements list.
FIFOOVR1 : FIFO 75 percent full interrupt.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
1 : FIFO75INT
FIFO 75 percent full interrupt.
End of enumeration elements list.
FIFOOVR2 : FIFO 100 percent full interrupt.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
1 : FIFOFULLINT
FIFO 100 percent full interrupt.
End of enumeration elements list.
WCEXC : Window comparator voltage excursion interrupt.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : WCEXCINT
Window comparitor voltage excursion interrupt.
End of enumeration elements list.
WCINC : Window comparator voltage incursion interrupt.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
1 : WCINCINT
Window comparitor voltage incursion interrupt.
End of enumeration elements list.
DCMP : DMA Transfer Complete
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
1 : DMACOMPLETE
DMA Completed a transfer
End of enumeration elements list.
DERR : DMA Error Condition
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
1 : DMAERROR
DMA Error Condition Occurred
End of enumeration elements list.
ADC Interrupt registers: Clear
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNVCMP : ADC conversion complete interrupt.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : CNVCMPINT
ADC conversion complete interrupt.
End of enumeration elements list.
SCNCMP : ADC scan complete interrupt.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : SCNCMPINT
ADC scan complete interrupt.
End of enumeration elements list.
FIFOOVR1 : FIFO 75 percent full interrupt.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
1 : FIFO75INT
FIFO 75 percent full interrupt.
End of enumeration elements list.
FIFOOVR2 : FIFO 100 percent full interrupt.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
1 : FIFOFULLINT
FIFO 100 percent full interrupt.
End of enumeration elements list.
WCEXC : Window comparator voltage excursion interrupt.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : WCEXCINT
Window comparitor voltage excursion interrupt.
End of enumeration elements list.
WCINC : Window comparator voltage incursion interrupt.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
1 : WCINCINT
Window comparitor voltage incursion interrupt.
End of enumeration elements list.
DCMP : DMA Transfer Complete
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
1 : DMACOMPLETE
DMA Completed a transfer
End of enumeration elements list.
DERR : DMA Error Condition
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
1 : DMAERROR
DMA Error Condition Occurred
End of enumeration elements list.
ADC Interrupt registers: Set
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNVCMP : ADC conversion complete interrupt.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : CNVCMPINT
ADC conversion complete interrupt.
End of enumeration elements list.
SCNCMP : ADC scan complete interrupt.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : SCNCMPINT
ADC scan complete interrupt.
End of enumeration elements list.
FIFOOVR1 : FIFO 75 percent full interrupt.
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
1 : FIFO75INT
FIFO 75 percent full interrupt.
End of enumeration elements list.
FIFOOVR2 : FIFO 100 percent full interrupt.
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
1 : FIFOFULLINT
FIFO 100 percent full interrupt.
End of enumeration elements list.
WCEXC : Window comparator voltage excursion interrupt.
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
1 : WCEXCINT
Window comparitor voltage excursion interrupt.
End of enumeration elements list.
WCINC : Window comparator voltage incursion interrupt.
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
1 : WCINCINT
Window comparitor voltage incursion interrupt.
End of enumeration elements list.
DCMP : DMA Transfer Complete
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
1 : DMACOMPLETE
DMA Completed a transfer
End of enumeration elements list.
DERR : DMA Error Condition
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
1 : DMAERROR
DMA Error Condition Occurred
End of enumeration elements list.
Slot 6 Configuration Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN6 : This bit enables slot 6 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 6 for ADC conversions.
End of enumeration elements list.
WCEN6 : This bit enables the window compare function for slot 6.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 6.
End of enumeration elements list.
CHSEL6 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE6 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL6 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
DMA Trigger Enable Register
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DFIFO75 : Trigger DMA upon FIFO 75 percent Full
bits : 0 - 0 (1 bit)
access : read-write
DFIFOFULL : Trigger DMA upon FIFO 100 percent Full
bits : 1 - 2 (2 bit)
access : read-write
DMA Trigger Status Register
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
D75STAT : Triggered DMA from FIFO 75 percent Full
bits : 0 - 0 (1 bit)
access : read-write
DFULLSTAT : Triggered DMA from FIFO 100 percent Full
bits : 1 - 2 (2 bit)
access : read-write
Slot 7 Configuration Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN7 : This bit enables slot 7 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 7 for ADC conversions.
End of enumeration elements list.
WCEN7 : This bit enables the window compare function for slot 7.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 7.
End of enumeration elements list.
CHSEL7 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE7 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL7 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
DMA Configuration Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAEN : DMA Enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : DIS
Disable DMA Function
1 : EN
Enable DMA Function
End of enumeration elements list.
DMADIR : Direction
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : P2M
Peripheral to Memory (SRAM) transaction
1 : M2P
Memory to Peripheral transaction
End of enumeration elements list.
DMAPRI : Sets the Priority of the DMA request
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : LOW
Low Priority (service as best effort)
1 : HIGH
High Priority (service immediately)
End of enumeration elements list.
DMADYNPRI : Enables dynamic priority based on FIFO fullness. When FIFO is full, priority is automatically set to HIGH. Otherwise, DMAPRI is used.
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : DIS
Disable dynamic priority (use DMAPRI setting only)
1 : EN
Enable dynamic priority
End of enumeration elements list.
DMAHONSTAT : Halt New ADC conversions until DMA Status DMAERR and DMACPL Cleared.
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : DIS
ADC conversions will continue regardless of DMA status register
1 : EN
ADC conversions will not progress if DMAERR or DMACPL bits in DMA status register are set.
End of enumeration elements list.
DMAMSK : Mask the FIFOCNT and SLOTNUM when transferring FIFO contents to memory
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : DIS
FIFO Contents are copied directly to memory without modification.
1 : EN
Only the FIFODATA contents are copied to memory on DMA transfers. The SLOTNUM and FIFOCNT contents are cleared to zero.
End of enumeration elements list.
DPWROFF : Power Off the ADC System upon DMACPL.
bits : 18 - 36 (19 bit)
access : read-write
DMA Total Transfer Count
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOTCOUNT : Total Transfer Count
bits : 2 - 19 (18 bit)
access : read-write
DMA Target Address Register
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LTARGADDR : DMA Target Address
bits : 0 - 18 (19 bit)
access : read-write
UTARGADDR : SRAM Target
bits : 19 - 50 (32 bit)
access : read-write
DMA Status Register
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMATIP : DMA Transfer In Progress
bits : 0 - 0 (1 bit)
access : read-write
DMACPL : DMA Transfer Complete
bits : 1 - 2 (2 bit)
access : read-write
DMAERR : DMA Error
bits : 2 - 4 (3 bit)
access : read-write
Window Comparator Upper Limits Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ULIM : Sets the upper limit for the window comparator.
bits : 0 - 19 (20 bit)
access : read-write
Window Comparator Lower Limits Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LLIM : Sets the lower limit for the window comparator.
bits : 0 - 19 (20 bit)
access : read-write
Scale Window Comparator Limits
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SCWLIMEN : Scale the window limits compare values per precision mode. When set to 0x0 (default), the values in the 20-bit limits registers will compare directly with the FIFO values regardless of the precision mode the slot is configured to. When set to 0x1, the compare values will be divided by the difference in precision bits while performing the window limit comparisons.
bits : 0 - 0 (1 bit)
access : read-write
FIFO Data and Valid Count Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : Oldest data in the FIFO.
bits : 0 - 19 (20 bit)
access : read-write
COUNT : Number of valid entries in the ADC FIFO.
bits : 20 - 47 (28 bit)
access : read-write
SLOTNUM : Slot number associated with this FIFO data.
bits : 28 - 58 (31 bit)
access : read-write
RSVD : RESERVED.
bits : 31 - 62 (32 bit)
access : read-write
FIFO Data and Valid Count Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DATA : Oldest data in the FIFO.
bits : 0 - 19 (20 bit)
access : read-write
COUNT : Number of valid entries in the ADC FIFO.
bits : 20 - 47 (28 bit)
access : read-write
SLOTNUMPR : Slot number associated with this FIFO data.
bits : 28 - 58 (31 bit)
access : read-write
RSVDPR : RESERVED.
bits : 31 - 62 (32 bit)
access : read-write
ADC Power Status
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWDSTAT : Indicates the power-status of the ADC.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : ON
Powered on.
1 : POWERED_DOWN
ADC Low Power Mode 1.
End of enumeration elements list.
Software trigger
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SWT : Writing 0x37 to this register generates a software trigger.
bits : 0 - 7 (8 bit)
access : read-write
Enumeration:
55 : GEN_SW_TRIGGER
Writing this value generates a software trigger.
End of enumeration elements list.
Slot 0 Configuration Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SLEN0 : This bit enables slot 0 for ADC conversions.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
1 : SLEN
Enable slot 0 for ADC conversions.
End of enumeration elements list.
WCEN0 : This bit enables the window compare function for slot 0.
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
1 : WCEN
Enable the window compare for slot 0.
End of enumeration elements list.
CHSEL0 : Select one of the 14 channel inputs for this slot.
bits : 8 - 19 (12 bit)
access : read-write
Enumeration:
0 : SE0
single ended external GPIO connection to pad16.
1 : SE1
single ended external GPIO connection to pad29.
2 : SE2
single ended external GPIO connection to pad11.
3 : SE3
single ended external GPIO connection to pad31.
4 : SE4
single ended external GPIO connection to pad32.
5 : SE5
single ended external GPIO connection to pad33.
6 : SE6
single ended external GPIO connection to pad34.
7 : SE7
single ended external GPIO connection to pad35.
8 : SE8
single ended external GPIO connection to pad13.
9 : SE9
single ended external GPIO connection to pad12.
10 : DF0
differential external GPIO connections to pad12(N) and pad13(P).
11 : DF1
differential external GPIO connections to pad15(N) and pad14(P).
12 : TEMP
internal temperature sensor.
13 : BATT
internal voltage divide-by-3 connection.
14 : VSS
Input VSS
End of enumeration elements list.
PRMODE0 : Set the Precision Mode For Slot.
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : P14B
14-bit precision mode
1 : P12B
12-bit precision mode
2 : P10B
10-bit precision mode
3 : P8B
8-bit precision mode
End of enumeration elements list.
ADSEL0 : Select the number of measurements to average in the accumulate divide module for this slot.
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : AVG_1_MSRMT
Average in 1 measurement in the accumulate divide module for this slot.
1 : AVG_2_MSRMTS
Average in 2 measurements in the accumulate divide module for this slot.
2 : AVG_4_MSRMTS
Average in 4 measurements in the accumulate divide module for this slot.
3 : AVG_8_MSRMT
Average in 8 measurements in the accumulate divide module for this slot.
4 : AVG_16_MSRMTS
Average in 16 measurements in the accumulate divide module for this slot.
5 : AVG_32_MSRMTS
Average in 32 measurements in the accumulate divide module for this slot.
6 : AVG_64_MSRMTS
Average in 64 measurements in the accumulate divide module for this slot.
7 : AVG_128_MSRMTS
Average in 128 measurements in the accumulate divide module for this slot.
End of enumeration elements list.
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