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SECURITY

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x90 byte (0x0)
mem_usage : registers
protection :

Registers

CTRL

SRCADDR

LEN

RESULT

LOCKCTRL

LOCKSTAT

KEY0

KEY1

KEY2

KEY3


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE FUNCTION CRCERROR

ENABLE : Function Enable. Software should set the ENABLE bit to initiate a CRC operation. Hardware will clear the ENABLE bit upon completion.
bits : 0 - 0 (1 bit)
access : read-write

FUNCTION : Function Select
bits : 4 - 11 (8 bit)
access : read-write

Enumeration:

0 : CRC32

Perform CRC32 operation

End of enumeration elements list.

CRCERROR : CRC Error Status - Set to 1 if an error occurs during a CRC operation. Cleared when CTRL register is written (with any value). Usually indicates an invalid address range.
bits : 31 - 62 (32 bit)
access : read-write


SRCADDR

Source Addresss
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SRCADDR SRCADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Source Buffer Address. Address may be byte aligned, but the length must be a multiple of 4 bits.
bits : 0 - 31 (32 bit)
access : read-write


LEN

Length
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LEN LEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LEN

LEN : Buffer size (bottom two bits assumed to be zero to ensure a multiple of 4 bytes)
bits : 2 - 21 (20 bit)
access : read-write


RESULT

CRC Seed/Result Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RESULT RESULT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CRC

CRC : CRC Seed/Result. Software must seed the CRC with 0xFFFFFFFF before starting a CRC operation (unless the CRC is continued from a previous operation).
bits : 0 - 31 (32 bit)
access : read-write


LOCKCTRL

LOCK Control Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCKCTRL LOCKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SELECT

SELECT : LOCK Function Select register.
bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

1 : CUSTOMER_KEY

Unlock Customer Key (access to top half of info0)

0 : NONE

Lock Control should be set to NONE when not in use.

End of enumeration elements list.


LOCKSTAT

LOCK Status Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCKSTAT LOCKSTAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STATUS

STATUS : LOCK Status register. This register is a bitmask for which resources are currently unlocked. These bits are one-hot per resource.
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

1 : CUSTOMER_KEY

Customer Key is unlocked (access is granted to top half of info0)

0 : NONE

No resources are unlocked

End of enumeration elements list.


KEY0

Key0 Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY0 KEY0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY0

KEY0 : Bits [31:0] of the 128-bit key should be written to this register. To protect key values, the register always returns 0x00000000.
bits : 0 - 31 (32 bit)
access : read-write


KEY1

Key1 Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY1 KEY1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY1

KEY1 : Bits [63:32] of the 128-bit key should be written to this register. To protect key values, the register always returns 0x00000000.
bits : 0 - 31 (32 bit)
access : read-write


KEY2

Key2 Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY2 KEY2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY2

KEY2 : Bits [95:64] of the 128-bit key should be written to this register. To protect key values, the register always returns 0x00000000.
bits : 0 - 31 (32 bit)
access : read-write


KEY3

Key3 Register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

KEY3 KEY3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY3

KEY3 : Bits [127:96] of the 128-bit key should be written to this register. To protect key values, the register always returns 0x00000000.
bits : 0 - 31 (32 bit)
access : read-write



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