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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x254 byte (0x0)
mem_usage : registers
protection :

Registers

PADREGA

PADREGE

ALTPADCFGC

ALTPADCFGD

ALTPADCFGE

ALTPADCFGF

ALTPADCFGG

ALTPADCFGH

ALTPADCFGI

ALTPADCFGJ

ALTPADCFGK

ALTPADCFGL

ALTPADCFGM

ALTPADCFGN

ALTPADCFGO

ALTPADCFGP

ALTPADCFGQ

ALTPADCFGR

PADREGF

ALTPADCFGS

SCDET

CTENCFG

PADREGG

PADREGH

PADREGI

INT0EN

INT0STAT

INT0CLR

INT0SET

INT1EN

INT1STAT

INT1CLR

INT1SET

PADREGJ

INT2EN

INT2STAT

INT2CLR

INT2SET

DBGCTRL

PADREGK

PADREGL

PADREGM

PADREGN

PADREGO

PADREGP

PADREGB

PADREGQ

PADREGR

PADREGS

CFGA

CFGB

CFGC

CFGD

CFGE

CFGF

CFGG

CFGH

CFGI

CFGJ

PADKEY

PADREGC

RDA

RDB

RDC

WTA

WTB

WTC

WTSA

WTSB

WTSC

WTCA

WTCB

WTCC

ENA

ENB

ENC

ENSA

PADREGD

ENSB

ENSC

ENCA

ENCB

ENCC

STMRCAP

IOM0IRQ

IOM1IRQ

IOM2IRQ

IOM3IRQ

IOM4IRQ

IOM5IRQ

BLEIFIRQ

GPIOOBS

ALTPADCFGA

ALTPADCFGB


PADREGA

Pad Configuration A (Pads 3-0)
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGA PADREGA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD0PULL PAD0INPEN PAD0STRNG PAD0FNCSEL PAD0RSEL PAD1PULL PAD1INPEN PAD1STRNG PAD1FNCSEL PAD1RSEL PAD2PULL PAD2INPEN PAD2STRNG PAD2FNCSEL PAD3PULL PAD3INPEN PAD3STRNG PAD3FNCSEL PAD3PWRUP

PAD0PULL : Pad 0 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD0INPEN : Pad 0 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD0STRNG : Pad 0 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD0FNCSEL : Pad 0 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : SLSCL

Configure as the IOSLAVE I2C SCL signal

1 : SLSCK

Configure as the IOSLAVE SPI SCK signal

2 : CLKOUT

Configure as the CLKOUT signal

3 : GPIO0

Configure as GPIO0

5 : MSPI4

MSPI data connection 4

7 : NCE0

IOM/MSPI nCE group 0

End of enumeration elements list.

PAD0RSEL : Pad 0 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD1PULL : Pad 1 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD1INPEN : Pad 1 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD1STRNG : Pad 1 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD1FNCSEL : Pad 1 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : SLSDAWIR3

Configure as the IOSLAVE I2C SDA or SPI WIR3 signal

1 : SLMOSI

Configure as the IOSLAVE SPI MOSI signal

2 : UART0TX

Configure as the UART0 TX output signal

3 : GPIO1

Configure as GPIO1

5 : MSPI5

MSPI data connection 5

7 : NCE1

IOM/MSPI nCE group 1

End of enumeration elements list.

PAD1RSEL : Pad 1 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD2PULL : Pad 2 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD2INPEN : Pad 2 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD2STRNG : Pad 2 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD2FNCSEL : Pad 2 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : UART1RX

Configure as the UART1 RX input.

1 : SLMISO

Configure as the IOSLAVE SPI MISO signal.

2 : UART0RX

Configure as the UART0 RX input.

3 : GPIO2

Configure as GPIO2.

5 : MSPI6

MSPI data connection 6.

7 : NCE2

IOM/MSPI nCE group 2

End of enumeration elements list.

PAD3PULL : Pad 3 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD3INPEN : Pad 3 input enable.
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD3STRNG : Pad 3 drive strength.
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD3FNCSEL : Pad 3 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : UA0RTS

Configure as the UART0 RTS output

1 : SLnCE

Configure as the IOSLAVE SPI nCE signal

2 : NCE3

IOM/MSPI nCE group 3

3 : GPIO3

Configure as GPIO3

5 : MSPI7

MSPI data connection 7

6 : TRIG1

Configure as the ADC Trigger 1 signal

7 : I2S_WCLK

Configure as the PDM I2S Word Clock input

End of enumeration elements list.

PAD3PWRUP : Pad 3 VDD power switch enable
bits : 30 - 60 (31 bit)
access : read-write

Enumeration:

0 : DIS

Power switch disabled

1 : EN

Power switch enabled (switched to VDD)

End of enumeration elements list.


PADREGE

Pad Configuration E (Pads 19-16)
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGE PADREGE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD16PULL PAD16INPEN PAD16STRNG PAD16FNCSEL PAD17PULL PAD17INPEN PAD17STRNG PAD17FNCSEL PAD18PULL PAD18INPEN PAD18STRNG PAD18FNCSEL PAD19PULL PAD19INPEN PAD19STRNG PAD19FNCSEL

PAD16PULL : Pad 16 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD16INPEN : Pad 16 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD16STRNG : Pad 16 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD16FNCSEL : Pad 16 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : ADCSE0

Configure as the analog ADC single ended port 0 input signal

1 : NCE16

IOM/MSPI nCE group 16

2 : TRIG0

Configure as the ADC Trigger 0 signal

3 : GPIO16

Configure as GPIO16

4 : SCCRST

SCARD reset output

5 : CMPIN0

Configure as comparator input 0 signal

6 : UART0TX

Configure as UART0 TX output signal

7 : UA1RTS

Configure as UART1 RTS output signal

End of enumeration elements list.

PAD17PULL : Pad 17 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD17INPEN : Pad 17 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD17STRNG : Pad 17 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD17FNCSEL : Pad 17 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : CMPRF1

Configure as the analog comparator reference signal 1 input signal

1 : NCE17

IOM/MSPI nCE group 17

2 : TRIG1

Configure as the ADC Trigger 1 signal

3 : GPIO17

Configure as GPIO17

4 : SCCCLK

SCARD serial clock output

6 : UART0RX

Configure as UART0 RX input signal

7 : UA1CTS

Configure as UART1 CTS input signal

End of enumeration elements list.

PAD18PULL : Pad 18 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD18INPEN : Pad 18 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD18STRNG : Pad 18 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD18FNCSEL : Pad 18 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : CMPIN1

Configure as the analog comparator input 1 signal

1 : NCE18

IOM/MSPI nCE group 18

2 : CT4

CTIMER connection 4

3 : GPIO18

Configure as GPIO18

4 : UA0RTS

Configure as UART0 RTS output signal

5 : ANATEST2

Configure as ANATEST2 I/O signal

6 : UART1TX

Configure as UART1 TX output signal

7 : SCCIO

SCARD data input/output connection

End of enumeration elements list.

PAD19PULL : Pad 19 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD19INPEN : Pad 19 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD19STRNG : Pad 19 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD19FNCSEL : Pad 19 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : CMPRF0

Configure as the analog comparator reference 0 signal

1 : NCE19

IOM/MSPI nCE group 19

2 : CT6

CTIMER connection 6

3 : GPIO19

Configure as GPIO19

4 : SCCLK

SCARD serial clock

5 : ANATEST1

Configure as the ANATEST1 I/O signal

6 : UART1RX

Configure as the UART1 RX input signal

7 : I2SBCLK

Configure as the PDM I2S bit clock input signal

End of enumeration elements list.


ALTPADCFGC

Alternate Pad Configuration C (Pads 11-8)
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGC ALTPADCFGC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD8_DS1 PAD8_SR PAD9_DS1 PAD9_SR PAD10_DS1 PAD10_SR PAD11_DS1 PAD11_SR

PAD8_DS1 : Pad 8 high order drive strength selection. Used in conjunction with PAD8STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD8_SR : Pad 11 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD9_DS1 : Pad 9 high order drive strength selection. Used in conjunction with PAD9STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD9_SR : Pad 11 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD10_DS1 : Pad 10 high order drive strength selection. Used in conjunction with PAD10STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD10_SR : Pad 11 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD11_DS1 : Pad 11 high order drive strength selection. Used in conjunction with PAD11STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD11_SR : Pad 11 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGD

Alternate Pad Configuration D (Pads 15-12)
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGD ALTPADCFGD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD12_DS1 PAD12_SR PAD13_DS1 PAD13_SR PAD14_DS1 PAD14_SR PAD15_DS1 PAD15_SR

PAD12_DS1 : Pad 12 high order drive strength selection. Used in conjunction with PAD12STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD12_SR : Pad 15 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD13_DS1 : Pad 13 high order drive strength selection. Used in conjunction with PAD13STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD13_SR : Pad 15 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD14_DS1 : Pad 14 high order drive strength selection. Used in conjunction with PAD14STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD14_SR : Pad 15 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD15_DS1 : Pad 15 high order drive strength selection. Used in conjunction with PAD15STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD15_SR : Pad 15 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGE

Alternate Pad Configuration E (Pads 19-16)
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGE ALTPADCFGE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD16_DS1 PAD16_SR PAD17_DS1 PAD17_SR PAD18_DS1 PAD18_SR PAD19_DS1 PAD19_SR

PAD16_DS1 : Pad 16 high order drive strength selection. Used in conjunction with PAD16STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD16_SR : Pad 19 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD17_DS1 : Pad 17 high order drive strength selection. Used in conjunction with PAD17STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD17_SR : Pad 19 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD18_DS1 : Pad 18 high order drive strength selection. Used in conjunction with PAD18STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD18_SR : Pad 19 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD19_DS1 : Pad 19 high order drive strength selection. Used in conjunction with PAD19STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD19_SR : Pad 19 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGF

Alternate Pad Configuration F (Pads 23-20)
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGF ALTPADCFGF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD20_DS1 PAD20_SR PAD21_DS1 PAD21_SR PAD22_DS1 PAD22_SR PAD23_DS1 PAD23_SR

PAD20_DS1 : Pad 20 high order drive strength selection. Used in conjunction with PAD20STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD20_SR : Pad 23 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD21_DS1 : Pad 21 high order drive strength selection. Used in conjunction with PAD21STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD21_SR : Pad 23 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD22_DS1 : Pad 22 high order drive strength selection. Used in conjunction with PAD22STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD22_SR : Pad 23 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD23_DS1 : Pad 23 high order drive strength selection. Used in conjunction with PAD23STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD23_SR : Pad 23 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGG

Alternate Pad Configuration G (Pads 27-24)
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGG ALTPADCFGG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD24_DS1 PAD24_SR PAD25_DS1 PAD25_SR PAD26_DS1 PAD26_SR PAD27_DS1 PAD27_SR

PAD24_DS1 : Pad 24 high order drive strength selection. Used in conjunction with PAD24STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD24_SR : Pad 27 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD25_DS1 : Pad 25 high order drive strength selection. Used in conjunction with PAD25STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD25_SR : Pad 27 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD26_DS1 : Pad 26 high order drive strength selection. Used in conjunction with PAD26STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD26_SR : Pad 27 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD27_DS1 : Pad 27 high order drive strength selection. Used in conjunction with PAD27STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD27_SR : Pad 27 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGH

Alternate Pad Configuration H (Pads 31-28)
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGH ALTPADCFGH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD28_DS1 PAD28_SR PAD29_DS1 PAD29_SR PAD30_DS1 PAD30_SR PAD31_DS1 PAD31_SR

PAD28_DS1 : Pad 28 high order drive strength selection. Used in conjunction with PAD28STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD28_SR : Pad 31 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD29_DS1 : Pad 29 high order drive strength selection. Used in conjunction with PAD29STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD29_SR : Pad 31 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD30_DS1 : Pad 30 high order drive strength selection. Used in conjunction with PAD30STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD30_SR : Pad 31 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD31_DS1 : Pad 31 high order drive strength selection. Used in conjunction with PAD31STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD31_SR : Pad 31 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGI

Alternate Pad Configuration I (Pads 35-32)
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGI ALTPADCFGI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD32_DS1 PAD32_SR PAD33_DS1 PAD33_SR PAD34_DS1 PAD34_SR PAD35_DS1 PAD35_SR

PAD32_DS1 : Pad 32 high order drive strength selection. Used in conjunction with PAD32STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD32_SR : Pad 35 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD33_DS1 : Pad 33 high order drive strength selection. Used in conjunction with PAD33STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD33_SR : Pad 35 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD34_DS1 : Pad 34 high order drive strength selection. Used in conjunction with PAD34STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD34_SR : Pad 35 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD35_DS1 : Pad 35 high order drive strength selection. Used in conjunction with PAD35STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD35_SR : Pad 35 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGJ

Alternate Pad Configuration J (Pads 39-36)
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGJ ALTPADCFGJ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD36_DS1 PAD36_SR PAD37_DS1 PAD37_SR PAD38_DS1 PAD38_SR PAD39_DS1 PAD39_SR

PAD36_DS1 : Pad 36 high order drive strength selection. Used in conjunction with PAD36STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD36_SR : Pad 39 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD37_DS1 : Pad 37 high order drive strength selection. Used in conjunction with PAD37STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD37_SR : Pad 39 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD38_DS1 : Pad 38 high order drive strength selection. Used in conjunction with PAD38STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD38_SR : Pad 39 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD39_DS1 : Pad 39 high order drive strength selection. Used in conjunction with PAD39STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD39_SR : Pad 39 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGK

Alternate Pad Configuration K (Pads 43-40)
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGK ALTPADCFGK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD40_DS1 PAD40_SR PAD41_DS1 PAD41_SR PAD42_DS1 PAD42_SR PAD43_DS1 PAD43_SR

PAD40_DS1 : Pad 40 high order drive strength selection. Used in conjunction with PAD40STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD40_SR : Pad 43 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD41_DS1 : Pad 41 high order drive strength selection. Used in conjunction with PAD41STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD41_SR : Pad 43 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD42_DS1 : Pad 42 high order drive strength selection. Used in conjunction with PAD42STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD42_SR : Pad 43 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD43_DS1 : Pad 43 high order drive strength selection. Used in conjunction with PAD43STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD43_SR : Pad 43 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGL

Alternate Pad Configuration L (Pads 47-44)
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGL ALTPADCFGL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD44_DS1 PAD44_SR PAD45_DS1 PAD45_SR PAD46_DS1 PAD46_SR PAD47_DS1 PAD47_SR

PAD44_DS1 : Pad 44 high order drive strength selection. Used in conjunction with PAD44STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD44_SR : Pad 47 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD45_DS1 : Pad 45 high order drive strength selection. Used in conjunction with PAD45STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD45_SR : Pad 47 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD46_DS1 : Pad 46 high order drive strength selection. Used in conjunction with PAD46STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD46_SR : Pad 47 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD47_DS1 : Pad 47 high order drive strength selection. Used in conjunction with PAD47STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD47_SR : Pad 47 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGM

Alternate Pad Configuration M (Pads 51-48)
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGM ALTPADCFGM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD48_DS1 PAD48_SR PAD49_DS1 PAD49_SR PAD50_DS1 PAD50_SR PAD51_DS1 PAD51_SR

PAD48_DS1 : Pad 48 high order drive strength selection. Used in conjunction with PAD48STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD48_SR : Pad 51 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD49_DS1 : Pad 49 high order drive strength selection. Used in conjunction with PAD49STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD49_SR : Pad 51 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD50_DS1 : Pad 50 high order drive strength selection. Used in conjunction with PAD50STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD50_SR : Pad 51 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD51_DS1 : Pad 51 high order drive strength selection. Used in conjunction with PAD51STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD51_SR : Pad 51 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGN

Alternate Pad Configuration N (Pads 55-52)
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGN ALTPADCFGN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD52_DS1 PAD52_SR PAD53_DS1 PAD53_SR PAD54_DS1 PAD54_SR PAD55_DS1 PAD55_SR

PAD52_DS1 : Pad 52 high order drive strength selection. Used in conjunction with PAD52STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD52_SR : Pad 55 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD53_DS1 : Pad 53 high order drive strength selection. Used in conjunction with PAD53STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD53_SR : Pad 55 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD54_DS1 : Pad 54 high order drive strength selection. Used in conjunction with PAD54STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD54_SR : Pad 55 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD55_DS1 : Pad 55 high order drive strength selection. Used in conjunction with PAD55STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD55_SR : Pad 55 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGO

Alternate Pad Configuration O (Pads 59-56)
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGO ALTPADCFGO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD56_DS1 PAD56_SR PAD57_DS1 PAD57_SR PAD58_DS1 PAD58_SR PAD59_DS1 PAD59_SR

PAD56_DS1 : Pad 56 high order drive strength selection. Used in conjunction with PAD56STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD56_SR : Pad 59 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD57_DS1 : Pad 57 high order drive strength selection. Used in conjunction with PAD57STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD57_SR : Pad 59 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD58_DS1 : Pad 58 high order drive strength selection. Used in conjunction with PAD58STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD58_SR : Pad 59 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD59_DS1 : Pad 59 high order drive strength selection. Used in conjunction with PAD59STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD59_SR : Pad 59 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGP

Alternate Pad Configuration P (Pads 63-60)
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGP ALTPADCFGP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD60_DS1 PAD60_SR PAD61_DS1 PAD61_SR PAD62_DS1 PAD62_SR PAD63_DS1 PAD63_SR

PAD60_DS1 : Pad 60 high order drive strength selection. Used in conjunction with PAD60STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD60_SR : Pad 63 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD61_DS1 : Pad 61 high order drive strength selection. Used in conjunction with PAD61STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD61_SR : Pad 63 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD62_DS1 : Pad 62 high order drive strength selection. Used in conjunction with PAD62STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD62_SR : Pad 63 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD63_DS1 : Pad 63 high order drive strength selection. Used in conjunction with PAD63STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD63_SR : Pad 63 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGQ

Alternate Pad Configuration Q (Pads 67-64)
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGQ ALTPADCFGQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD64_DS1 PAD64_SR PAD65_DS1 PAD65_SR PAD66_DS1 PAD66_SR PAD67_DS1 PAD67_SR

PAD64_DS1 : Pad 64 high order drive strength selection. Used in conjunction with PAD64STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD64_SR : Pad 67 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD65_DS1 : Pad 65 high order drive strength selection. Used in conjunction with PAD65STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD65_SR : Pad 67 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD66_DS1 : Pad 66 high order drive strength selection. Used in conjunction with PAD66STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD66_SR : Pad 67 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD67_DS1 : Pad 67 high order drive strength selection. Used in conjunction with PAD67STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD67_SR : Pad 67 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGR

Alternate Pad Configuration R (Pads 71-68)
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGR ALTPADCFGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD68_DS1 PAD68_SR PAD69_DS1 PAD69_SR PAD70_DS1 PAD70_SR PAD71_DS1 PAD71_SR

PAD68_DS1 : Pad 68 high order drive strength selection. Used in conjunction with PAD68STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD68_SR : Pad 71 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD69_DS1 : Pad 69 high order drive strength selection. Used in conjunction with PAD69STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD69_SR : Pad 71 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD70_DS1 : Pad 70 high order drive strength selection. Used in conjunction with PAD70STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD70_SR : Pad 71 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD71_DS1 : Pad 71 high order drive strength selection. Used in conjunction with PAD71STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD71_SR : Pad 71 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


PADREGF

Pad Configuration F (Pads 23-20)
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGF PADREGF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD20PULL PAD20INPEN PAD20STRNG PAD20FNCSEL PAD21PULL PAD21INPEN PAD21STRNG PAD21FNCSEL PAD22PULL PAD22INPEN PAD22STRNG PAD22FNCSEL PAD23PULL PAD23INPEN PAD23STRNG PAD23FNCSEL

PAD20PULL : Pad 20 pulldown enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pulldown disabled

1 : EN

Pulldown enabled

End of enumeration elements list.

PAD20INPEN : Pad 20 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD20STRNG : Pad 20 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD20FNCSEL : Pad 20 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : SWDCK

Configure as the serial wire debug clock signal

1 : NCE20

IOM/MSPI nCE group 20

3 : GPIO20

Configure as GPIO20

4 : UART0TX

Configure as UART0 TX output signal

5 : UART1TX

Configure as UART1 TX output signal

6 : I2SBCLK

I2S byte clock input

7 : UA1RTS

Configure as UART1 RTS output signal

End of enumeration elements list.

PAD21PULL : Pad 21 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD21INPEN : Pad 21 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD21STRNG : Pad 21 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD21FNCSEL : Pad 21 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : SWDIO

Configure as the serial wire debug data signal

1 : NCE21

IOM/MSPI nCE group 21

3 : GPIO21

Configure as GPIO21

4 : UART0RX

Configure as UART0 RX input signal

5 : UART1RX

Configure as UART1 RX input signal

6 : I2SBCLK

I2S byte clock input

7 : UA1CTS

Configure as UART1 CTS input signal

End of enumeration elements list.

PAD22PULL : Pad 22 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD22INPEN : Pad 22 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD22STRNG : Pad 22 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD22FNCSEL : Pad 22 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : UART0TX

Configure as the UART0 TX signal

1 : NCE22

IOM/MSPI nCE group 22

2 : CT12

CTIMER connection 12

3 : GPIO22

Configure as GPIO22

4 : PDM_CLK

Configure as the PDM CLK output

5 : EXTLF

External LFRC input

6 : MSPI0

MSPI data connection 0

7 : SWO

Configure as the serial trace data output signal

End of enumeration elements list.

PAD23PULL : Pad 23 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD23INPEN : Pad 23 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD23STRNG : Pad 23 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD23FNCSEL : Pad 23 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : UART0RX

Configure as the UART0 RX signal

1 : NCE23

IOM/MSPI nCE group 23

2 : CT14

CTIMER connection 14

3 : GPIO23

Configure as GPIO23

4 : I2SWCLK

I2S word clock input

5 : CMPOUT

Configure as voltage comparator output

6 : MSPI3

MSPI data connection 3

7 : EXTXT

External XTAL oscillator input

End of enumeration elements list.


ALTPADCFGS

Alternate Pad Configuration S (Pads 73-72)
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGS ALTPADCFGS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD72_DS1 PAD72_SR PAD73_DS1 PAD73_SR

PAD72_DS1 : Pad 72 high order drive strength selection. Used in conjunction with PAD72STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD72_SR : Pad 72 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD73_DS1 : Pad 73 high order drive strength selection. Used in conjunction with PAD73STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD73_SR : Pad 73 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


SCDET

SCARD Card Detect select
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCDET SCDET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCDET

SCDET : SCARD card detect pad select.
bits : 0 - 6 (7 bit)
access : read-write


CTENCFG

Counter/Timer Enable Config
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTENCFG CTENCFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN0 EN1 EN2 EN3 EN4 EN5 EN6 EN7 EN8 EN9 EN10 EN11 EN12 EN13 EN14 EN15 EN16 EN17 EN18 EN19 EN20 EN21 EN22 EN23 EN24 EN25 EN26 EN27 EN28 EN29 EN30 EN31

EN0 : CT0 Enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT0 for output

0 : EN

Enable CT0 for output

End of enumeration elements list.

EN1 : CT1 Enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT1 for output

0 : EN

Enable CT1 for output

End of enumeration elements list.

EN2 : CT2 Enable
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT2 for output

0 : EN

Enable CT2 for output

End of enumeration elements list.

EN3 : CT3 Enable
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT3 for output

0 : EN

Enable CT3 for output

End of enumeration elements list.

EN4 : CT4 Enable
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT4 for output

0 : EN

Enable CT4 for output

End of enumeration elements list.

EN5 : CT5 Enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT5 for output

0 : EN

Enable CT5 for output

End of enumeration elements list.

EN6 : CT6 Enable
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT6 for output

0 : EN

Enable CT6 for output

End of enumeration elements list.

EN7 : CT7 Enable
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT7 for output

0 : EN

Enable CT7 for output

End of enumeration elements list.

EN8 : CT8 Enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT8 for output

0 : EN

Enable CT8 for output

End of enumeration elements list.

EN9 : CT9 Enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Disable CT9 for output

End of enumeration elements list.

EN10 : CT10 Enable
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT10 for output

0 : EN

Enable CT10 for output

End of enumeration elements list.

EN11 : CT11 Enable
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT11 for output

0 : EN

Enable CT11 for output

End of enumeration elements list.

EN12 : CT12 Enable
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT12 for output

0 : EN

Enable CT12 for output

End of enumeration elements list.

EN13 : CT13 Enable
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT13 for output

0 : EN

Enable CT13 for output

End of enumeration elements list.

EN14 : CT14 Enable
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT14 for output

0 : EN

Enable CT14 for output

End of enumeration elements list.

EN15 : CT15 Enable
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT15 for output

0 : EN

Enable CT15 for output

End of enumeration elements list.

EN16 : CT16 Enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT16 for output

0 : EN

Enable CT16 for output

End of enumeration elements list.

EN17 : CT17 Enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT17 for output

0 : EN

Enable CT17 for output

End of enumeration elements list.

EN18 : CT18 Enable
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT18 for output

0 : EN

Enable CT18 for output

End of enumeration elements list.

EN19 : CT19 Enable
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT19 for output

0 : EN

Enable CT19 for output

End of enumeration elements list.

EN20 : CT20 Enable
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT20 for output

0 : EN

Enable CT20 for output

End of enumeration elements list.

EN21 : CT21 Enable
bits : 21 - 42 (22 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT21 for output

0 : EN

Enable CT21 for output

End of enumeration elements list.

EN22 : CT22 Enable
bits : 22 - 44 (23 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT22 for output

0 : EN

Enable CT22 for output

End of enumeration elements list.

EN23 : CT23 Enable
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT23 for output

0 : EN

Enable CT23 for output

End of enumeration elements list.

EN24 : CT24 Enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT24 for output

0 : EN

Enable CT24 for output

End of enumeration elements list.

EN25 : CT25 Enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT25 for output

0 : EN

Enable CT25 for output

End of enumeration elements list.

EN26 : CT26 Enable
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT26 for output

0 : EN

Enable CT26 for output

End of enumeration elements list.

EN27 : CT27 Enable
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT27 for output

0 : EN

Enable CT27 for output

End of enumeration elements list.

EN28 : CT28 Enable
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT28 for output

0 : EN

Enable CT28 for output

End of enumeration elements list.

EN29 : CT29 Enable
bits : 29 - 58 (30 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT29 for output

0 : EN

Enable CT29 for output

End of enumeration elements list.

EN30 : CT30 Enable
bits : 30 - 60 (31 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT30 for output

0 : EN

Enable CT30 for output

End of enumeration elements list.

EN31 : CT31 Enable
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

1 : DIS

Disable CT31 for output

0 : EN

Enable CT31 for output

End of enumeration elements list.


PADREGG

Pad Configuration G (Pads 27-24)
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGG PADREGG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD24PULL PAD24INPEN PAD24STRNG PAD24FNCSEL PAD25PULL PAD25INPEN PAD25STRNG PAD25FNCSEL PAD25RSEL PAD26PULL PAD26INPEN PAD26STRNG PAD26FNCSEL PAD27PULL PAD27INPEN PAD27STRNG PAD27FNCSEL PAD27RSEL

PAD24PULL : Pad 24 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD24INPEN : Pad 24 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD24STRNG : Pad 24 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD24FNCSEL : Pad 24 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : UART1TX

Configure as UART1 TX output signal

1 : NCE24

IOM/MSPI nCE group 24

2 : MSPI8

MSPI data connection 8

3 : GPIO24

Configure as GPIO24

4 : UA0CTS

Configure as UART0 CTS input signal

5 : CT21

CTIMER connection 21

6 : 32kHzXT

Configure as the 32kHz crystal output signal

7 : SWO

Configure as the serial trace data output signal

End of enumeration elements list.

PAD25PULL : Pad 25 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD25INPEN : Pad 25 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD25STRNG : Pad 25 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD25FNCSEL : Pad 25 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : UART1RX

Configure as UART1 RX input signal

1 : NCE25

IOM/MSPI nCE group 25

2 : CT1

CTIMER connection 1

3 : GPIO25

Configure as GPIO25

4 : M2SDAWIR3

Configure as the IOMSTR2 I2C SDA or SPI WIR3 signal

5 : M2MISO

Configure as the IOMSTR2 SPI MISO input signal

End of enumeration elements list.

PAD25RSEL : Pad 25 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD26PULL : Pad 26 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD26INPEN : Pad 26 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD26STRNG : Pad 26 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD26FNCSEL : Pad 26 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : EXTHF

Configure as the external HFRC oscillator input

1 : NCE26

IOM/MSPI nCE group 26

2 : CT3

CTIMER connection 3

3 : GPIO26

Configure as GPIO26

4 : SCCRST

SCARD reset output

5 : MSPI1

MSPI data connection 1

6 : UART0TX

Configure as UART0 TX output signal

7 : UA1CTS

Configure as UART1 CTS input signal

End of enumeration elements list.

PAD27PULL : Pad 27 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD27INPEN : Pad 27 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD27STRNG : Pad 27 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD27FNCSEL : Pad 27 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : UART0RX

Configure as UART0 RX input signal

1 : NCE27

IOM/MSPI nCE group 27

2 : CT5

CTIMER connection 5

3 : GPIO27

Configure as GPIO27

4 : M2SCL

Configure as I2C clock I/O signal from IOMSTR2

5 : M2SCK

Configure as SPI clock output signal from IOMSTR2

End of enumeration elements list.

PAD27RSEL : Pad 27 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.


PADREGH

Pad Configuration H (Pads 31-28)
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGH PADREGH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD28PULL PAD28INPEN PAD28STRNG PAD28FNCSEL PAD29PULL PAD29INPEN PAD29STRNG PAD29FNCSEL PAD30PULL PAD30INPEN PAD30STRNG PAD30FNCSEL PAD31PULL PAD31INPEN PAD31STRNG PAD31FNCSEL

PAD28PULL : Pad 28 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD28INPEN : Pad 28 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD28STRNG : Pad 28 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD28FNCSEL : Pad 28 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : I2S_WCLK

Configure as the PDM I2S Word Clock input

1 : NCE28

IOM/MSPI nCE group 28

2 : CT7

CTIMER connection 7

3 : GPIO28

Configure as GPIO28

5 : M2MOSI

Configure as the IOMSTR2 SPI MOSI output signal

6 : UART0TX

Configure as the UART0 TX output signal

End of enumeration elements list.

PAD29PULL : Pad 29 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD29INPEN : Pad 29 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD29STRNG : Pad 29 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD29FNCSEL : Pad 29 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : ADCSE1

Configure as the analog input for ADC single ended input 1

1 : NCE29

IOM/MSPI nCE group 29

2 : CT9

CTIMER connection 9

3 : GPIO29

Configure as GPIO29

4 : UA0CTS

Configure as the UART0 CTS input signal

5 : UA1CTS

Configure as the UART1 CTS input signal

6 : UART0RX

Configure as the UART0 RX input signal

7 : PDM_DATA

Configure as PDM DATA input

End of enumeration elements list.

PAD30PULL : Pad 30 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD30INPEN : Pad 30 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD30STRNG : Pad 30 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD30FNCSEL : Pad 30 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : ANATEST1

Configure as the ANATEST1 I/O signal

1 : NCE30

IOM/MSPI nCE group 30

2 : CT11

CTIMER connection 11

3 : GPIO30

Configure as GPIO30

4 : UART0TX

Configure as UART0 TX output signal

5 : UA1RTS

Configure as UART1 RTS output signal

7 : I2S_DAT

Configure as the PDM I2S Data output signal

End of enumeration elements list.

PAD31PULL : Pad 31 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD31INPEN : Pad 31 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD31STRNG : Pad 31 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD31FNCSEL : Pad 31 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : ADCSE3

Configure as the analog input for ADC single ended input 3

1 : NCE31

IOM/MSPI nCE group 31

2 : CT13

CTIMER connection 13

3 : GPIO31

Configure as GPIO31

4 : UART0RX

Configure as the UART0 RX input signal

5 : SCCCLK

SCARD serial clock output

7 : UA1RTS

Configure as UART1 RTS output signal

End of enumeration elements list.


PADREGI

Pad Configuration I (Pads 35-32)
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGI PADREGI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD32PULL PAD32INPEN PAD32STRNG PAD32FNCSEL PAD33PULL PAD33INPEN PAD33STRNG PAD33FNCSEL PAD34PULL PAD34INPEN PAD34STRNG PAD34FNCSEL PAD35PULL PAD35INPEN PAD35STRNG PAD35FNCSEL

PAD32PULL : Pad 32 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD32INPEN : Pad 32 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD32STRNG : Pad 32 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD32FNCSEL : Pad 32 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : ADCSE4

Configure as the analog input for ADC single ended input 4

1 : NCE32

IOM/MSPI nCE group 32

2 : CT15

CTIMER connection 15

3 : GPIO32

Configure as GPIO32

4 : SCCIO

SCARD serial data input/output

5 : EXTLF

External input to the LFRC oscillator

7 : UA1CTS

Configure as the UART1 CTS input

End of enumeration elements list.

PAD33PULL : Pad 33 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD33INPEN : Pad 33 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD33STRNG : Pad 33 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD33FNCSEL : Pad 33 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : ADCSE5

Configure as the analog ADC single ended port 5 input signal

1 : NCE33

IOM/MSPI nCE group 33

2 : 32kHzXT

Configure as the 32kHz crystal output signal

3 : GPIO33

Configure as GPIO33

5 : UA0CTS

Configure as the UART0 CTS input

6 : CT23

CTIMER connection 23

7 : SWO

Configure as the serial trace data output signal

End of enumeration elements list.

PAD34PULL : Pad 34 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD34INPEN : Pad 34 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD34STRNG : Pad 34 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD34FNCSEL : Pad 34 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : ADCSE6

Configure as the analog input for ADC single ended input 6

1 : NCE34

IOM/MSPI nCE group 34

2 : UA1RTS

Configure as the UART1 RTS output

3 : GPIO34

Configure as GPIO34

4 : CMPRF2

Configure as the analog comparator reference 2 signal

5 : UA0RTS

Configure as the UART0 RTS output

6 : UART0RX

Configure as the UART0 RX input

7 : PDMDATA

PDM serial data input

End of enumeration elements list.

PAD35PULL : Pad 35 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD35INPEN : Pad 35 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD35STRNG : Pad 35 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD35FNCSEL : Pad 35 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : ADCSE7

Configure as the analog input for ADC single ended input 7

1 : NCE35

IOM/MSPI nCE group 35

2 : UART1TX

Configure as the UART1 TX signal

3 : GPIO35

Configure as GPIO35

4 : I2SDAT

I2S serial data output

5 : CT27

CTIMER connection 27

6 : UA0RTS

Configure as the UART0 RTS output

End of enumeration elements list.


INT0EN

GPIO Interrupts 31-0: Enable
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT0EN INT0EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31

GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT0STAT

GPIO Interrupts 31-0: Status
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT0STAT INT0STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31

GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT0CLR

GPIO Interrupts 31-0: Clear
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT0CLR INT0CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31

GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT0SET

GPIO Interrupts 31-0: Set
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT0SET INT0SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO17 GPIO18 GPIO19 GPIO20 GPIO21 GPIO22 GPIO23 GPIO24 GPIO25 GPIO26 GPIO27 GPIO28 GPIO29 GPIO30 GPIO31

GPIO0 : GPIO0 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO1 : GPIO1 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO2 : GPIO2 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO3 : GPIO3 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO4 : GPIO4 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO5 : GPIO5 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO6 : GPIO6 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO7 : GPIO7 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO8 : GPIO8 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO9 : GPIO9 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO10 : GPIO10 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO11 : GPIO11 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO12 : GPIO12 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO13 : GPIO13 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO14 : GPIO14 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO15 : GPIO15 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO16 : GPIO16 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO17 : GPIO17 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO18 : GPIO18interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO19 : GPIO19 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO20 : GPIO20 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO21 : GPIO21 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO22 : GPIO22 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO23 : GPIO23 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO24 : GPIO24 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO25 : GPIO25 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO26 : GPIO26 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO27 : GPIO27 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO28 : GPIO28 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO29 : GPIO29 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO30 : GPIO30 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO31 : GPIO31 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT1EN

GPIO Interrupts 63-32: Enable
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT1EN INT1EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63

GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO50 : GPIO50 interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO51 : GPIO51 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO52 : GPIO52 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO53 : GPIO53 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO54 : GPIO54 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO55 : GPIO55 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO56 : GPIO56 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO57 : GPIO57 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO58 : GPIO58 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO59 : GPIO59 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO60 : GPIO60 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO61 : GPIO61 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO62 : GPIO62 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO63 : GPIO63 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT1STAT

GPIO Interrupts 63-32: Status
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT1STAT INT1STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63

GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO50 : GPIO50 interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO51 : GPIO51 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO52 : GPIO52 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO53 : GPIO53 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO54 : GPIO54 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO55 : GPIO55 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO56 : GPIO56 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO57 : GPIO57 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO58 : GPIO58 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO59 : GPIO59 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO60 : GPIO60 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO61 : GPIO61 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO62 : GPIO62 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO63 : GPIO63 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT1CLR

GPIO Interrupts 63-32: Clear
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT1CLR INT1CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63

GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO50 : GPIO50 interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO51 : GPIO51 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO52 : GPIO52 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO53 : GPIO53 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO54 : GPIO54 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO55 : GPIO55 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO56 : GPIO56 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO57 : GPIO57 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO58 : GPIO58 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO59 : GPIO59 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO60 : GPIO60 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO61 : GPIO61 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO62 : GPIO62 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO63 : GPIO63 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


INT1SET

GPIO Interrupts 63-32: Set
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT1SET INT1SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO32 GPIO33 GPIO34 GPIO35 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO43 GPIO44 GPIO45 GPIO46 GPIO47 GPIO48 GPIO49 GPIO50 GPIO51 GPIO52 GPIO53 GPIO54 GPIO55 GPIO56 GPIO57 GPIO58 GPIO59 GPIO60 GPIO61 GPIO62 GPIO63

GPIO32 : GPIO32 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO33 : GPIO33 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO34 : GPIO34 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO35 : GPIO35 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO36 : GPIO36 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO37 : GPIO37 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO38 : GPIO38 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO39 : GPIO39 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO40 : GPIO40 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO41 : GPIO41 interrupt.
bits : 9 - 18 (10 bit)
access : read-write

GPIO42 : GPIO42 interrupt.
bits : 10 - 20 (11 bit)
access : read-write

GPIO43 : GPIO43 interrupt.
bits : 11 - 22 (12 bit)
access : read-write

GPIO44 : GPIO44 interrupt.
bits : 12 - 24 (13 bit)
access : read-write

GPIO45 : GPIO45 interrupt.
bits : 13 - 26 (14 bit)
access : read-write

GPIO46 : GPIO46 interrupt.
bits : 14 - 28 (15 bit)
access : read-write

GPIO47 : GPIO47 interrupt.
bits : 15 - 30 (16 bit)
access : read-write

GPIO48 : GPIO48 interrupt.
bits : 16 - 32 (17 bit)
access : read-write

GPIO49 : GPIO49 interrupt.
bits : 17 - 34 (18 bit)
access : read-write

GPIO50 : GPIO50 interrupt.
bits : 18 - 36 (19 bit)
access : read-write

GPIO51 : GPIO51 interrupt.
bits : 19 - 38 (20 bit)
access : read-write

GPIO52 : GPIO52 interrupt.
bits : 20 - 40 (21 bit)
access : read-write

GPIO53 : GPIO53 interrupt.
bits : 21 - 42 (22 bit)
access : read-write

GPIO54 : GPIO54 interrupt.
bits : 22 - 44 (23 bit)
access : read-write

GPIO55 : GPIO55 interrupt.
bits : 23 - 46 (24 bit)
access : read-write

GPIO56 : GPIO56 interrupt.
bits : 24 - 48 (25 bit)
access : read-write

GPIO57 : GPIO57 interrupt.
bits : 25 - 50 (26 bit)
access : read-write

GPIO58 : GPIO58 interrupt.
bits : 26 - 52 (27 bit)
access : read-write

GPIO59 : GPIO59 interrupt.
bits : 27 - 54 (28 bit)
access : read-write

GPIO60 : GPIO60 interrupt.
bits : 28 - 56 (29 bit)
access : read-write

GPIO61 : GPIO61 interrupt.
bits : 29 - 58 (30 bit)
access : read-write

GPIO62 : GPIO62 interrupt.
bits : 30 - 60 (31 bit)
access : read-write

GPIO63 : GPIO63 interrupt.
bits : 31 - 62 (32 bit)
access : read-write


PADREGJ

Pad Configuration J (Pads 39-36)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGJ PADREGJ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD36PULL PAD36INPEN PAD36STRNG PAD36FNCSEL PAD37PULL PAD37INPEN PAD37STRNG PAD37FNCSEL PAD37PWRDN PAD38PULL PAD38INPEN PAD38STRNG PAD38FNCSEL PAD39PULL PAD39INPEN PAD39STRNG PAD39FNCSEL PAD39RSEL

PAD36PULL : Pad 36 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD36INPEN : Pad 36 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD36STRNG : Pad 36 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD36FNCSEL : Pad 36 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : TRIG1

Configure as the ADC Trigger 1 signal

1 : NCE36

IOM/MSPI nCE group 36

2 : UART1RX

Configure as the UART1 RX input signal

3 : GPIO36

Configure as GPIO36

4 : 32kHzXT

Configure as the 32kHz output clock from the crystal

5 : UA1CTS

Configure as the UART1 CTS input signal

6 : UA0CTS

Configure as the UART0 CTS input signal

7 : PDMDATA

PDM serial data input

End of enumeration elements list.

PAD37PULL : Pad 37 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD37INPEN : Pad 37 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD37STRNG : Pad 37 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD37FNCSEL : Pad 37 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : TRIG2

Configure as the ADC Trigger 2 signal

1 : NCE37

IOM/MSPI nCE group 37

2 : UA0RTS

Configure as the UART0 RTS output signal

3 : GPIO37

Configure as GPIO37

4 : SCCIO

SCARD serial data input/output

5 : UART1TX

Configure as the UART1 TX output signal

6 : PDMCLK

Configure as the PDM CLK output signal

7 : CT29

CTIMER connection 29

End of enumeration elements list.

PAD37PWRDN : Pad 37 VSS power switch enable
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : DIS

Power switch disabled

1 : EN

Power switch enabled (switch to GND)

End of enumeration elements list.

PAD38PULL : Pad 38 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD38INPEN : Pad 38 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD38STRNG : Pad 38 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD38FNCSEL : Pad 38 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : TRIG3

Configure as the ADC Trigger 3 signal

1 : NCE38

IOM/MSPI nCE group 38

2 : UA0CTS

Configure as the UART0 CTS signal

3 : GPIO38

Configure as GPIO38

5 : M3MOSI

Configure as the IOMSTR3 SPI MOSI output signal

6 : UART1RX

Configure as the UART1 RX input signal

End of enumeration elements list.

PAD39PULL : Pad 39 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD39INPEN : Pad 39 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD39STRNG : Pad 39 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD39FNCSEL : Pad 39 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : UART0TX

Configure as the UART0 TX output signal

1 : UART1TX

Configure as the UART1 TX output signal

2 : CT25

CTIMER connection 25

3 : GPIO39

Configure as GPIO39

4 : M4SCL

Configure as the IOMSTR4 I2C SCL signal

5 : M4SCK

Configure as the IOMSTR4 SPI SCK signal

End of enumeration elements list.

PAD39RSEL : Pad 39 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.


INT2EN

GPIO Interrupts 73-64: Enable
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT2EN INT2EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68 GPIO69 GPIO70 GPIO71 GPIO72 GPIO73

GPIO64 : GPIO64 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO65 : GPIO65 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO66 : GPIO66 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO67 : GPIO67 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO68 : GPIO68 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO69 : GPIO69 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO70 : GPIO70 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO71 : GPIO71 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO72 : GPIO72 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO73 : GPIO73 interrupt.
bits : 9 - 18 (10 bit)
access : read-write


INT2STAT

GPIO Interrupts 73-64: Status
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT2STAT INT2STAT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68 GPIO69 GPIO70 GPIO71 GPIO72 GPIO73

GPIO64 : GPIO64 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO65 : GPIO65 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO66 : GPIO66 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO67 : GPIO67 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO68 : GPIO68 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO69 : GPIO69 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO70 : GPIO70 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO71 : GPIO71 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO72 : GPIO72 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO73 : GPIO73 interrupt.
bits : 9 - 18 (10 bit)
access : read-write


INT2CLR

GPIO Interrupts 73-64: Clear
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT2CLR INT2CLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68 GPIO69 GPIO70 GPIO71 GPIO72 GPIO73

GPIO64 : GPIO64 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO65 : GPIO65 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO66 : GPIO66 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO67 : GPIO67 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO68 : GPIO68 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO69 : GPIO69 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO70 : GPIO70 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO71 : GPIO71 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO72 : GPIO72 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO73 : GPIO73 interrupt.
bits : 9 - 18 (10 bit)
access : read-write


INT2SET

GPIO Interrupts 73-64: Set
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

INT2SET INT2SET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO64 GPIO65 GPIO66 GPIO67 GPIO68 GPIO69 GPIO70 GPIO71 GPIO72 GPIO73

GPIO64 : GPIO64 interrupt.
bits : 0 - 0 (1 bit)
access : read-write

GPIO65 : GPIO65 interrupt.
bits : 1 - 2 (2 bit)
access : read-write

GPIO66 : GPIO66 interrupt.
bits : 2 - 4 (3 bit)
access : read-write

GPIO67 : GPIO67 interrupt.
bits : 3 - 6 (4 bit)
access : read-write

GPIO68 : GPIO68 interrupt.
bits : 4 - 8 (5 bit)
access : read-write

GPIO69 : GPIO69 interrupt.
bits : 5 - 10 (6 bit)
access : read-write

GPIO70 : GPIO70 interrupt.
bits : 6 - 12 (7 bit)
access : read-write

GPIO71 : GPIO71 interrupt.
bits : 7 - 14 (8 bit)
access : read-write

GPIO72 : GPIO72 interrupt.
bits : 8 - 16 (9 bit)
access : read-write

GPIO73 : GPIO73 interrupt.
bits : 9 - 18 (10 bit)
access : read-write


DBGCTRL

Debug Control
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBGCTRL DBGCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GCLK0 GCLK1 GCLK2 GCLK3 GCLK4 GCLK5

GCLK0 : Gate IOM0 CLK in SPI mode, allowing external input clock
bits : 0 - 0 (1 bit)
access : read-write

GCLK1 : Gate IOM1 CLK in SPI mode, allowing external input clock
bits : 1 - 2 (2 bit)
access : read-write

GCLK2 : Gate IOM2 CLK in SPI mode, allowing external input clock
bits : 2 - 4 (3 bit)
access : read-write

GCLK3 : Gate IOM3 CLK in SPI mode, allowing external input clock
bits : 3 - 6 (4 bit)
access : read-write

GCLK4 : Gate IOM4 CLK in SPI mode, allowing external input clock
bits : 4 - 8 (5 bit)
access : read-write

GCLK5 : Gate IOM5 CLK in SPI mode, allowing external input clock
bits : 5 - 10 (6 bit)
access : read-write


PADREGK

Pad Configuration K (Pads 43-40)
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGK PADREGK read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD40PULL PAD40INPEN PAD40STRNG PAD40FNCSEL PAD40RSEL PAD41PULL PAD41INPEN PAD41STRNG PAD41FNCSEL PAD41PWRDN PAD42PULL PAD42INPEN PAD42STRNG PAD42FNCSEL PAD42RSEL PAD43PULL PAD43INPEN PAD43STRNG PAD43FNCSEL PAD43RSEL

PAD40PULL : Pad 40 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD40INPEN : Pad 40 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD40STRNG : Pad 40 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD40FNCSEL : Pad 40 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : UART0RX

Configure as the UART0 RX input signal

1 : UART1RX

Configure as the UART1 RX input signal

2 : TRIG0

Configure as the ADC Trigger 0 signal

3 : GPIO40

Configure as GPIO40

4 : M4SDAWIR3

Configure as the IOMSTR4 I2C SDA or SPI WIR3 signal

5 : M4MISO

Configure as the IOMSTR4 SPI MISO input signal

End of enumeration elements list.

PAD40RSEL : Pad 40 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD41PULL : Pad 41 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD41INPEN : Pad 41 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD41STRNG : Pad 41 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD41FNCSEL : Pad 41 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : NCE41

IOM/MSPI nCE group 41

2 : SWO

Configure as the serial wire debug SWO signal

3 : GPIO41

Configure as GPIO41

4 : I2SWCLK

I2S word clock input

5 : UA1RTS

Configure as the UART1 RTS output signal

6 : UART0TX

Configure as the UART0 TX output signal

7 : UA0RTS

Configure as the UART0 RTS output signal

End of enumeration elements list.

PAD41PWRDN : Pad 41 power switch enable
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : DIS

Power switch disabled

1 : EN

Power switch enabled (Switch pad to VSS)

End of enumeration elements list.

PAD42PULL : Pad 42 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD42INPEN : Pad 42 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD42STRNG : Pad 42 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD42FNCSEL : Pad 42 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : UART1TX

Configure as the UART1 TX output signal

1 : NCE42

IOM/MSPI nCE group 42

2 : CT16

CTIMER connection 16

3 : GPIO42

Configure as GPIO42

4 : M3SCL

Configure as the IOMSTR3 I2C SCL clock I/O signal

5 : M3SCK

Configure as the IOMSTR3 SPI SCK output

End of enumeration elements list.

PAD42RSEL : Pad 42 pullup resistor selection.
bits : 22 - 45 (24 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD43PULL : Pad 43 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD43INPEN : Pad 43 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD43STRNG : Pad 43 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD43FNCSEL : Pad 43 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : UART1RX

Configure as the UART1 RX input signal

1 : NCE43

IOM/MSPI nCE group 43

2 : CT18

CTIMER connection 18

3 : GPIO43

Configure as GPIO43

4 : M3SDAWIR3

Configure as the IOMSTR3 I2C SDA or SPI WIR3 signal

5 : M3MISO

Configure as the IOMSTR3 SPI MISO signal

End of enumeration elements list.

PAD43RSEL : Pad 43 pullup resistor selection.
bits : 30 - 61 (32 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.


PADREGL

Pad Configuration L (Pads 47-44)
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGL PADREGL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD44PULL PAD44INPEN PAD44STRNG PAD44FNCSEL PAD45PULL PAD45INPEN PAD45STRNG PAD45FNCSEL PAD46PULL PAD46INPEN PAD46STRNG PAD46FNCSEL PAD47PULL PAD47INPEN PAD47STRNG PAD47FNCSEL

PAD44PULL : Pad 44 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD44INPEN : Pad 44 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD44STRNG : Pad 44 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD44FNCSEL : Pad 44 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : UA1RTS

Configure as the UART1 RTS output signal

1 : NCE44

IOM/MSPI nCE group 44

2 : CT20

CTIMER connection 20

3 : GPIO44

Configure as GPIO44

5 : M4MOSI

Configure as the IOMSTR4 SPI MOSI signal

6 : M5nCE6

Configure as the SPI channel 6 nCE signal from IOMSTR5

End of enumeration elements list.

PAD45PULL : Pad 45 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD45INPEN : Pad 45 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD45STRNG : Pad 45 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD45FNCSEL : Pad 45 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : UA1CTS

Configure as the UART1 CTS input signal

1 : NCE45

IOM/MSPI nCE group 45

2 : CT22

CTIMER connection 22

3 : GPIO45

Configure as GPIO45

4 : I2SDAT

I2S serial data output

5 : PDMDATA

PDM serial data input

6 : UART0RX

Configure as the SPI channel 5 nCE signal from IOMSTR5

7 : SWO

Configure as the serial wire debug SWO signal

End of enumeration elements list.

PAD46PULL : Pad 46 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD46INPEN : Pad 46 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD46STRNG : Pad 46 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD46FNCSEL : Pad 46 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : 32khz_XT

Configure as the 32kHz output clock from the crystal

1 : NCE46

IOM/MSPI nCE group 46

2 : CT24

CTIMER connection 24

3 : GPIO46

Configure as GPIO46

4 : SCCRST

SCARD reset output

5 : PDMCLK

PDM serial clock output

6 : UART1TX

Configure as the UART1 TX output signal

7 : SWO

Configure as the serial wire debug SWO signal

End of enumeration elements list.

PAD47PULL : Pad 47 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD47INPEN : Pad 47 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD47STRNG : Pad 47 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD47FNCSEL : Pad 47 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : 32kHzXT

Configure as the 32kHz output clock from the crystal

1 : NCE47

IOM/MSPI nCE group 47

2 : CT26

CTIMER connection 26

3 : GPIO47

Configure as GPIO47

5 : M5MOSI

Configure as the IOMSTR5 SPI MOSI output signal

6 : UART1RX

Configure as the UART1 RX input signal

End of enumeration elements list.


PADREGM

Pad Configuration M (Pads 51-48)
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGM PADREGM read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD48PULL PAD48INPEN PAD48STRNG PAD48FNCSEL PAD48RSEL PAD49PULL PAD49INPEN PAD49STRNG PAD49FNCSEL PAD49RSEL PAD50PULL PAD50INPEN PAD50STRNG PAD50FNCSEL PAD51PULL PAD51INPEN PAD51STRNG PAD51FNCSEL

PAD48PULL : Pad 48 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD48INPEN : Pad 48 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD48STRNG : Pad 48 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD48FNCSEL : Pad 48 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : UART0TX

Configure as the UART0 TX output signal

1 : NCE48

IOM/MSPI nCE group 48

2 : CT28

CTIMER connection 28

3 : GPIO48

Configure as GPIO48

4 : M5SCL

Configure as the IOMSTR5 I2C SCL clock I/O signal

5 : M5SCK

Configure as the IOMSTR5 SPI SCK output

End of enumeration elements list.

PAD48RSEL : Pad 48 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD49PULL : Pad 49 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD49INPEN : Pad 49 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD49STRNG : Pad 49 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD49FNCSEL : Pad 49 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : UART0RX

Configure as the UART0 RX input signal

1 : NCE49

IOM/MSPPI nCE group 49

2 : CT30

CTIMER connection 30

3 : GPIO49

Configure as GPIO49

4 : M5SDAWIR3

Configure as the IOMSTR5 I2C SDA or SPI WIR3 signal

5 : M5MISO

Configure as the IOMSTR5 SPI MISO input signal

End of enumeration elements list.

PAD49RSEL : Pad 49 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD50PULL : Pad 50 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD50INPEN : Pad 50 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD50STRNG : Pad 50 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD50FNCSEL : Pad 50 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE50

IOM/MSPI nCE group 50

2 : CT0

CTIMER connection 0

3 : GPIO50

Configure as GPIO50

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.

PAD51PULL : Pad 51 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD51INPEN : Pad 51 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD51STRNG : Pad 51 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD51FNCSEL : Pad 51 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : MSPI1_0

Configure as the MSPI1 0 signal

1 : NCE51

IOM/MSPI nCE group 51

2 : CT1

CTIMER connection 1

3 : GPIO51

Configure as GPIO51

End of enumeration elements list.


PADREGN

Pad Configuration N (Pads 55-52)
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGN PADREGN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD52PULL PAD52INPEN PAD52STRNG PAD52FNCSEL PAD53PULL PAD53INPEN PAD53STRNG PAD53FNCSEL PAD54PULL PAD54INPEN PAD54STRNG PAD54FNCSEL PAD55PULL PAD55INPEN PAD55STRNG PAD55FNCSEL

PAD52PULL : Pad 52 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD52INPEN : Pad 52 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD52STRNG : Pad 52 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD52FNCSEL : Pad 52 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : MSPI1_1

Configure as the MSPI1 1 signal

1 : NCE52

IOM/MSPI nCE group 52

2 : CT2

CTIMER connection 2

3 : GPIO52

Configure as GPIO52

End of enumeration elements list.

PAD53PULL : Pad 53 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD53INPEN : Pad 53 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD53STRNG : Pad 53 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD53FNCSEL : Pad 53 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : MSPI1_2

Configure as the MSPI1 2 signal

1 : NCE53

IOM/MSPI nCE group 53

2 : CT3

CTIMER connection 3

3 : GPIO53

Configure as GPIO53

End of enumeration elements list.

PAD54PULL : Pad 54 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD54INPEN : Pad 54 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD54STRNG : Pad 54 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD54FNCSEL : Pad 54 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : MSPI1_3

Configure as the MSPI1 3 signal

1 : NCE54

IOM/MSPI nCE group 54

2 : CT4

CTIMER connection 4

3 : GPIO54

Configure as GPIO54

End of enumeration elements list.

PAD55PULL : Pad 55 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD55INPEN : Pad 55 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD55STRNG : Pad 55 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD55FNCSEL : Pad 55 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : MSPI1_4

Configure as the MSPI1 4 signal

1 : NCE55

IOM/MSPI nCE group 55

2 : CT5

CTIMER connection 5

3 : GPIO55

Configure as GPIO55

End of enumeration elements list.


PADREGO

Pad Configuration O (Pads 59-56)
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGO PADREGO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD56PULL PAD56INPEN PAD56STRNG PAD56FNCSEL PAD57PULL PAD57INPEN PAD57STRNG PAD57FNCSEL PAD58PULL PAD58INPEN PAD58STRNG PAD58FNCSEL PAD59PULL PAD59INPEN PAD59STRNG PAD59FNCSEL

PAD56PULL : Pad 56 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD56INPEN : Pad 56 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD56STRNG : Pad 56 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD56FNCSEL : Pad 56 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : MSPI1_5

Configure as the MSPI1 5 signal

1 : NCE56

IOM/MSPI nCE group 56

2 : CT6

CTIMER connection 6

3 : GPIO56

Configure as GPIO56

End of enumeration elements list.

PAD57PULL : Pad 57 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD57INPEN : Pad 57 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD57STRNG : Pad 57 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD57FNCSEL : Pad 57 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : MSPI1_6

Configure as the MSPI1 6 signal

1 : NCE57

IOM/MSPI nCE group 57

2 : CT7

CTIMER connection 7

3 : GPIO57

Configure as GPIO57

End of enumeration elements list.

PAD58PULL : Pad 58 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD58INPEN : Pad 58 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD58STRNG : Pad 58 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD58FNCSEL : Pad 58 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : MSPI1_7

Configure as the MSPI1 7 signal

1 : NCE58

IOM/MSPI nCE group 58

2 : CT8

CTIMER connection 8

3 : GPIO58

Configure as GPIO58

End of enumeration elements list.

PAD59PULL : Pad 59 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD59INPEN : Pad 59 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD59STRNG : Pad 59 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD59FNCSEL : Pad 59 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : MSPI1_8

Configure as the MSPI1 8 signal

1 : NCE59

IOM/MSPI nCE group 59

2 : CT9

CTIMER connection 9

3 : GPIO59

Configure as GPIO59

End of enumeration elements list.


PADREGP

Pad Configuration P (Pads 63-60)
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGP PADREGP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD60PULL PAD60INPEN PAD60STRNG PAD60FNCSEL PAD61PULL PAD61INPEN PAD61STRNG PAD61FNCSEL PAD62PULL PAD62INPEN PAD62STRNG PAD62FNCSEL PAD63PULL PAD63INPEN PAD63STRNG PAD63FNCSEL

PAD60PULL : Pad 60 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD60INPEN : Pad 60 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD60STRNG : Pad 60 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD60FNCSEL : Pad 60 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : MSPI1_9

Configure as the MSPI1 9 signal

1 : NCE60

IOM/MSPI nCE group 60

2 : CT10

CTIMER connection 10

3 : GPIO60

Configure as GPIO60

End of enumeration elements list.

PAD61PULL : Pad 61 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD61INPEN : Pad 61 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD61STRNG : Pad 61 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD61FNCSEL : Pad 61 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE61

IOM/MSPI nCE group 61

2 : CT11

CTIMER connection 11

3 : GPIO61

Configure as GPIO61

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.

PAD62PULL : Pad 62 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD62INPEN : Pad 62 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD62STRNG : Pad 62 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD62FNCSEL : Pad 62 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE62

IOM/MSPI nCE group 62

2 : CT12

CTIMER connection 12

3 : GPIO62

Configure as GPIO62

4 : UA0CTS

Configure as the UART0 CTS input

5 : UA0RTS

Configure as the UART0 RTS output

6 : UA1CTS

Configure as the UART1 CTS input

7 : UA1RTS

Configure as the UART1 RTS output

End of enumeration elements list.

PAD63PULL : Pad 63 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD63INPEN : Pad 63 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD63STRNG : Pad 63 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD63FNCSEL : Pad 63 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE63

IOM/MSPI nCE group 63

2 : CT13

CTIMER connection 13

3 : GPIO63

Configure as GPIO63

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.


PADREGB

Pad Configuration B (Pads 7-4)
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGB PADREGB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD4PULL PAD4INPEN PAD4STRNG PAD4FNCSEL PAD5PULL PAD5INPEN PAD5STRNG PAD5FNCSEL PAD5RSEL PAD6PULL PAD6INPEN PAD6STRNG PAD6FNCSEL PAD6RSEL PAD7PULL PAD7INPEN PAD7STRNG PAD7FNCSEL

PAD4PULL : Pad 4 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD4INPEN : Pad 4 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD4STRNG : Pad 4 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD4FNCSEL : Pad 4 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : UA0CTS

Configure as the UART0 CTS input signal

1 : SLINT

Configure as the IOSLAVE interrupt out signal

2 : NCE4

IOM/SPI nCE group 4

3 : GPIO4

Configure as GPIO4

5 : UART0RX

Configure as the UART0 RX input

6 : CT17

CTIMER connection 17

7 : MSPI2

MSPI data connection 2

End of enumeration elements list.

PAD5PULL : Pad 5 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD5INPEN : Pad 5 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD5STRNG : Pad 5 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD5FNCSEL : Pad 5 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : M0SCL

Configure as the IOMSTR0 I2C SCL signal

1 : M0SCK

Configure as the IOMSTR0 SPI SCK signal

2 : UA0RTS

Configure as the UART0 RTS signal output

3 : GPIO5

Configure as GPIO5

5 : EXTHFA

Configure as the External HFA input clock

7 : CT8

CTIMER connection 8

End of enumeration elements list.

PAD5RSEL : Pad 5 pullup resistor selection.
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD6PULL : Pad 6 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD6INPEN : Pad 6 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD6STRNG : Pad 6 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD6FNCSEL : Pad 6 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : M0SDAWIR3

Configure as the IOMSTR0 I2C SDA or SPI WIR3 signal

1 : M0MISO

Configure as the IOMSTR0 SPI MISO signal

2 : UA0CTS

Configure as the UART0 CTS input signal

3 : GPIO6

Configure as GPIO6

5 : CT10

CTIMER connection 10

7 : I2S_DAT

Configure as the PDM I2S Data output signal

End of enumeration elements list.

PAD6RSEL : Pad 6 pullup resistor selection.
bits : 22 - 45 (24 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD7PULL : Pad 7 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD7INPEN : Pad 7 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD7STRNG : Pad 7 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD7FNCSEL : Pad 7 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : NCE7

IOM/MSPI nCE group 7

1 : M0MOSI

Configure as the IOMSTR0 SPI MOSI signal

2 : CLKOUT

Configure as the CLKOUT signal

3 : GPIO7

Configure as GPIO7

4 : TRIG0

Configure as the ADC Trigger 0 signal

5 : UART0TX

Configure as the UART0 TX output signal

7 : CT19

CTIMER connection 19

End of enumeration elements list.


PADREGQ

Pad Configuration Q (Pads 67-64)
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGQ PADREGQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD64PULL PAD64INPEN PAD64STRNG PAD64FNCSEL PAD65PULL PAD65INPEN PAD65STRNG PAD65FNCSEL PAD66PULL PAD66INPEN PAD66STRNG PAD66FNCSEL PAD67PULL PAD67INPEN PAD67STRNG PAD67FNCSEL

PAD64PULL : Pad 64 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD64INPEN : Pad 64 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD64STRNG : Pad 64 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD64FNCSEL : Pad 64 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : MSPI2_0

Configure as the MSPI2 0 signal

1 : NCE64

IOM/MSPI nCE group 64

2 : CT14

CTIMER connection 14

3 : GPIO64

Configure as GPIO64

End of enumeration elements list.

PAD65PULL : Pad 65 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD65INPEN : Pad 65 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD65STRNG : Pad 65 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD65FNCSEL : Pad 65 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : MSPI2_1

Configure as the MSPI2 1 signal

1 : NCE65

IOM/MSPI nCE group 65

2 : CT15

CTIMER connection 15

3 : GPIO65

Configure as GPIO65

End of enumeration elements list.

PAD66PULL : Pad 66 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD66INPEN : Pad 66 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD66STRNG : Pad 66 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD66FNCSEL : Pad 66 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : MSPI2_2

Configure as the MSPI2 2 signal

1 : NCE66

IOM/MSPI nCE group 66

2 : CT16

CTIMER connection 16

3 : GPIO66

Configure as GPIO66

End of enumeration elements list.

PAD67PULL : Pad 67 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD67INPEN : Pad 67 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD67STRNG : Pad 67 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD67FNCSEL : Pad 67 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : MSPI2_3

Configure as the MSPI2 3 signal

1 : NCE67

IOM/MSPI nCE group 67

2 : CT17

CTIMER connection 17

3 : GPIO67

Configure as GPIO67

End of enumeration elements list.


PADREGR

Pad Configuration R (Pads 71-68)
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGR PADREGR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD68PULL PAD68INPEN PAD68STRNG PAD68FNCSEL PAD69PULL PAD69INPEN PAD69STRNG PAD69FNCSEL PAD70PULL PAD70INPEN PAD70STRNG PAD70FNCSEL PAD71PULL PAD71INPEN PAD71STRNG PAD71FNCSEL

PAD68PULL : Pad 68 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD68INPEN : Pad 68 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD68STRNG : Pad 68 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD68FNCSEL : Pad 68 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : MSPI2_4

Configure as the MSPI2 4 signal

1 : NCE68

IOM/MSPI nCE group 68

2 : CT18

CTIMER connection 18

3 : GPIO68

Configure as GPIO68

End of enumeration elements list.

PAD69PULL : Pad 69 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD69INPEN : Pad 69 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD69STRNG : Pad 69 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD69FNCSEL : Pad 69 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE69

IOM/MSPI nCE group 69

2 : CT19

CTIMER connection 19

3 : GPIO69

Configure as GPIO69

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.

PAD70PULL : Pad 70 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD70INPEN : Pad 70 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD70STRNG : Pad 70 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD70FNCSEL : Pad 70 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE70

IOM/MSPI nCE group 70

2 : CT20

CTIMER connection 20

3 : GPIO70

Configure as GPIO70

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.

PAD71PULL : Pad 71 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD71INPEN : Pad 71 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD71STRNG : Pad 71 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD71FNCSEL : Pad 71 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE71

IOM/MSPI nCE group 71

2 : CT21

CTIMER connection 21

3 : GPIO71

Configure as GPIO71

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.


PADREGS

Pad Configuration S (Pads 73-72)
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGS PADREGS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD72PULL PAD72INPEN PAD72STRNG PAD72FNCSEL PAD73PULL PAD73INPEN PAD73STRNG PAD73FNCSEL

PAD72PULL : Pad 72 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD72INPEN : Pad 72 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD72STRNG : Pad 72 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD72FNCSEL : Pad 72 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE72

IOM/MSPI nCE group 72

2 : CT22

CTIMER connection 22

3 : GPIO72

Configure as GPIO72

4 : UART0TX

Configure as the UART0 TX output

5 : UART0RX

Configure as the UART0 RX input

6 : UART1TX

Configure as the UART1 TX output

7 : UART1RX

Configure as the UART1 RX input

End of enumeration elements list.

PAD73PULL : Pad 73 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD73INPEN : Pad 73 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD73STRNG : Pad 73 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD73FNCSEL : Pad 73 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : SWO

Configure as the SWO output

1 : NCE73

IOM/MSPI nCE group 73

2 : CT23

CTIMER connection 23

3 : GPIO73

Configure as GPIO73

4 : UA0CTS

Configure as the UART0 CTS input

5 : UA0RTS

Configure as the UART0 RTS output

6 : UA1CTS

Configure as the UART1 CTS input

7 : UA1RTS

Configure as the UART1 RTS output

End of enumeration elements list.


CFGA

GPIO Configuration A (Pads 7-0)
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGA CFGA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO0INCFG GPIO0OUTCFG GPIO0INTD GPIO1INCFG GPIO1OUTCFG GPIO1INTD GPIO2INCFG GPIO2OUTCFG GPIO2INTD GPIO3INCFG GPIO3OUTCFG GPIO3INTD GPIO4INCFG GPIO4OUTCFG GPIO4INTD GPIO5INCFG GPIO5OUTCFG GPIO5INTD GPIO6INCFG GPIO6OUTCFG GPIO6INTD GPIO7INCFG GPIO7OUTCFG GPIO7INTD

GPIO0INCFG : GPIO0 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO0OUTCFG : GPIO0 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD0FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD0FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD0FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD0FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO0INTD : GPIO0 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD0FNCSEL = NCE0 - nCE polarity active low

1 : nCEHIGH

Applies when PAD0FNCSEL = NCE0 - nCE polarity active high

End of enumeration elements list.

GPIO1INCFG : GPIO1 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO1OUTCFG : GPIO1 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD1FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD1FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD1FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD1FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO1INTD : GPIO1 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD1FNCSEL = NCE1 - nCE polarity active low

1 : nCEHIGH

Applies when PAD1FNCSEL = NCE1 - nCE polarity active high

End of enumeration elements list.

GPIO2INCFG : GPIO2 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO2OUTCFG : GPIO2 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD2FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD2FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD2FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD2FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO2INTD : GPIO2 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD2FNCSEL = NCE2 - nCE polarity active low

1 : nCEHIGH

Applies when PAD2FNCSEL = NCE2 - nCE polarity active high

End of enumeration elements list.

GPIO3INCFG : GPIO3 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO3OUTCFG : GPIO3 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD3FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD3FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD3FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD3FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO3INTD : GPIO3 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD3FNCSEL = NCE3 - nCE polarity active low

1 : nCEHIGH

Applies when PAD3FNCSEL = NCE3 - nCE polarity active high

End of enumeration elements list.

GPIO4INCFG : GPIO4 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO4OUTCFG : GPIO4 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD4FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD4FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD4FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD4FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO4INTD : GPIO4 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD4FNCSEL = NCE4 - nCE polarity active low

1 : nCEHIGH

Applies when PAD4FNCSEL = NCE4 - nCE polarity active high

End of enumeration elements list.

GPIO5INCFG : GPIO5 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO5OUTCFG : GPIO5 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD5FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD5FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD5FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD5FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO5INTD : GPIO5 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : INTDIS

Applies when GPIO5INCFG = 1 - No interrupt on GPIO transition

1 : INTBOTH

Applies when GPIO5INCFG = 1 - Interrupt on either low to high or high to low GPIO transition

End of enumeration elements list.

GPIO6INCFG : GPIO6 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO6OUTCFG : GPIO6 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD6FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD6FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD6FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD6FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO6INTD : GPIO6 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : INTDIS

Applies when GPIO6INCFG = 1 - No interrupt on GPIO transition

1 : INTBOTH

Applies when GPIO6INCFG = 1 - Interrupt on either low to high or high to low GPIO transition

End of enumeration elements list.

GPIO7INCFG : GPIO7 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO7OUTCFG : GPIO7 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD7FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD7FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD7FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD7FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO7INTD : GPIO7 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD7FNCSEL = NCE7 - nCE polarity active low

1 : nCEHIGH

Applies when PAD7FNCSEL = NCE7 - nCE polarity active high

End of enumeration elements list.


CFGB

GPIO Configuration B (Pads 15-8)
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGB CFGB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO8INCFG GPIO8OUTCFG GPIO8INTD GPIO9INCFG GPIO9OUTCFG GPIO9INTD GPIO10INCFG GPIO10OUTCFG GPIO10INTD GPIO11INCFG GPIO11OUTCFG GPIO11INTD GPIO12INCFG GPIO12OUTCFG GPIO12INTD GPIO13INCFG GPIO13OUTCFG GPIO13INTD GPIO14INCFG GPIO14OUTCFG GPIO14INTD GPIO15INCFG GPIO15OUTCFG GPIO15INTD

GPIO8INCFG : GPIO8 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO8OUTCFG : GPIO8 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD8FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD8FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD8FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD8FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO8INTD : GPIO8 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD8FNCSEL = NCE8 - nCE polarity active low

1 : nCEHIGH

Applies when PAD8FNCSEL = NCE8 - nCE polarity active high

End of enumeration elements list.

GPIO9INCFG : GPIO9 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO9OUTCFG : GPIO9 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD9FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD9FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD9FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD9FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO9INTD : GPIO9 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD9FNCSEL = NCE9 - nCE polarity active low

1 : nCEHIGH

Applies when PAD9FNCSEL = NCE9 - nCE polarity active high

End of enumeration elements list.

GPIO10INCFG : GPIO10 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO10OUTCFG : GPIO10 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD10FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD10FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD10FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD10FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO10INTD : GPIO10 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD10FNCSEL = NCE10 - nCE polarity active low

1 : nCEHIGH

Applies when PAD10FNCSEL = NCE10 - nCE polarity active high

End of enumeration elements list.

GPIO11INCFG : GPIO11 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO11OUTCFG : GPIO11 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD11FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD11FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD11FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD11FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO11INTD : GPIO11 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD11FNCSEL = NCE11 - nCE polarity active low

1 : nCEHIGH

Applies when PAD11FNCSEL = NCE11 - nCE polarity active high

End of enumeration elements list.

GPIO12INCFG : GPIO12 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO12OUTCFG : GPIO12 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD12FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD12FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD12FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD12FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO12INTD : GPIO12 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD12FNCSEL = NCE12 - nCE polarity active low

1 : nCEHIGH

Applies when PAD12FNCSEL = NCE12 - nCE polarity active high

End of enumeration elements list.

GPIO13INCFG : GPIO13 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO13OUTCFG : GPIO13 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD13FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD13FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD13FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD13FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO13INTD : GPIO13 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD13FNCSEL = NCE13 - nCE polarity active low

1 : nCEHIGH

Applies when PAD13FNCSEL = NCE13 - nCE polarity active high

End of enumeration elements list.

GPIO14INCFG : GPIO14 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO14OUTCFG : GPIO14 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD14FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD14FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD14FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD14FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO14INTD : GPIO14 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD14FNCSEL = NCE14 - nCE polarity active low

1 : nCEHIGH

Applies when PAD14FNCSEL = NCE14 - nCE polarity active high

End of enumeration elements list.

GPIO15INCFG : GPIO15 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO15OUTCFG : GPIO15 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD15FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD15FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD15FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD15FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO15INTD : GPIO15 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD15FNCSEL = NCE15 - nCE polarity active low

1 : nCEHIGH

Applies when PAD15FNCSEL = NCE15 - nCE polarity active high

End of enumeration elements list.


CFGC

GPIO Configuration C (Pads 23-16)
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGC CFGC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO16INCFG GPIO16OUTCFG GPIO16INTD GPIO17INCFG GPIO17OUTCFG GPIO17INTD GPIO18INCFG GPIO18OUTCFG GPIO18INTD GPIO19INCFG GPIO19OUTCFG GPIO19INTD GPIO20INCFG GPIO20OUTCFG GPIO20INTD GPIO21INCFG GPIO21OUTCFG GPIO21INTD GPIO22INCFG GPIO22OUTCFG GPIO22INTD GPIO23INCFG GPIO23OUTCFG GPIO23INTD

GPIO16INCFG : GPIO16 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO16OUTCFG : GPIO16 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD16FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD16FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD16FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD16FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO16INTD : GPIO16 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD16FNCSEL = NCE16 - nCE polarity active low

1 : nCEHIGH

Applies when PAD16FNCSEL = NCE16 - nCE polarity active high

End of enumeration elements list.

GPIO17INCFG : GPIO17 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO17OUTCFG : GPIO17 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD17FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD17FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD17FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD17FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO17INTD : GPIO17 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD17FNCSEL = NCE17 - nCE polarity active low

1 : nCEHIGH

Applies when PAD17FNCSEL = NCE17 - nCE polarity active high

End of enumeration elements list.

GPIO18INCFG : GPIO18 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO18OUTCFG : GPIO18 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD18FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD18FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD18FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD18FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO18INTD : GPIO18 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD18FNCSEL = NCE18 - nCE polarity active low

1 : nCEHIGH

Applies when PAD18FNCSEL = NCE18 - nCE polarity active high

End of enumeration elements list.

GPIO19INCFG : GPIO19 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO19OUTCFG : GPIO19 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD19FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD19FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD19FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD19FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO19INTD : GPIO19 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD19FNCSEL = NCE19 - nCE polarity active low

1 : nCEHIGH

Applies when PAD19FNCSEL = NCE19 - nCE polarity active high

End of enumeration elements list.

GPIO20INCFG : GPIO20 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO20OUTCFG : GPIO20 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD20FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD20FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD20FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD20FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO20INTD : GPIO20 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD20FNCSEL = NCE20 - nCE polarity active low

1 : nCEHIGH

Applies when PAD20FNCSEL = NCE20 - nCE polarity active high

End of enumeration elements list.

GPIO21INCFG : GPIO21 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO21OUTCFG : GPIO21 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD21FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD21FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD21FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD21FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO21INTD : GPIO21 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD21FNCSEL = NCE21 - nCE polarity active low

1 : nCEHIGH

Applies when PAD21FNCSEL = NCE21 - nCE polarity active high

End of enumeration elements list.

GPIO22INCFG : GPIO22 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO22OUTCFG : GPIO22 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD22FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD22FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD22FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD22FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO22INTD : GPIO22 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD22FNCSEL = NCE22 - nCE polarity active low

1 : nCEHIGH

Applies when PAD22FNCSEL = NCE22 - nCE polarity active high

End of enumeration elements list.

GPIO23INCFG : GPIO23 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO23OUTCFG : GPIO23 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD23FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD23FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD23FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD23FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO23INTD : GPIO23 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD23FNCSEL = NCE23 - nCE polarity active low

1 : nCEHIGH

Applies when PAD23FNCSEL = NCE23 - nCE polarity active high

End of enumeration elements list.


CFGD

GPIO Configuration D (Pads 31-24)
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGD CFGD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO24INCFG GPIO24OUTCFG GPIO24INTD GPIO25INCFG GPIO25OUTCFG GPIO25INTD GPIO26INCFG GPIO26OUTCFG GPIO26INTD GPIO27INCFG GPIO27OUTCFG GPIO27INTD GPIO28INCFG GPIO28OUTCFG GPIO28INTD GPIO29INCFG GPIO29OUTCFG GPIO29INTD GPIO30INCFG GPIO30OUTCFG GPIO30INTD GPIO31INCFG GPIO31OUTCFG GPIO31INTD

GPIO24INCFG : GPIO24 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO24OUTCFG : GPIO24 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD24FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD24FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD24FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD24FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO24INTD : GPIO24 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD24FNCSEL = NCE24 - nCE polarity active low

1 : nCEHIGH

Applies when PAD24FNCSEL = NCE24 - nCE polarity active high

End of enumeration elements list.

GPIO25INCFG : GPIO25 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO25OUTCFG : GPIO25 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD25FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD25FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD25FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD25FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO25INTD : GPIO25 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD25FNCSEL = NCE25 - nCE polarity active low

1 : nCEHIGH

Applies when PAD25FNCSEL = NCE25 - nCE polarity active high

End of enumeration elements list.

GPIO26INCFG : GPIO26 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO26OUTCFG : GPIO26 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD26FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD26FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD26FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD26FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO26INTD : GPIO26 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD26FNCSEL = NCE26 - nCE polarity active low

1 : nCEHIGH

Applies when PAD26FNCSEL = NCE26 - nCE polarity active high

End of enumeration elements list.

GPIO27INCFG : GPIO27 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO27OUTCFG : GPIO27 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD27FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD27FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD27FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD27FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO27INTD : GPIO27 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD27FNCSEL = NCE27 - nCE polarity active low

1 : nCEHIGH

Applies when PAD27FNCSEL = NCE27 - nCE polarity active high

End of enumeration elements list.

GPIO28INCFG : GPIO28 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO28OUTCFG : GPIO28 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD28FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD28FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD28FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD28FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO28INTD : GPIO28 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD28FNCSEL = NCE28 - nCE polarity active low

1 : nCEHIGH

Applies when PAD28FNCSEL = NCE28 - nCE polarity active high

End of enumeration elements list.

GPIO29INCFG : GPIO29 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO29OUTCFG : GPIO29 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD29FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD29FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD29FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD29FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO29INTD : GPIO29 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD29FNCSEL = NCE29 - nCE polarity active low

1 : nCEHIGH

Applies when PAD29FNCSEL = NCE29 - nCE polarity active high

End of enumeration elements list.

GPIO30INCFG : GPIO30 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO30OUTCFG : GPIO30 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD30FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD30FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD30FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD30FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO30INTD : GPIO30 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD30FNCSEL = NCE30 - nCE polarity active low

1 : nCEHIGH

Applies when PAD30FNCSEL = NCE30 - nCE polarity active high

End of enumeration elements list.

GPIO31INCFG : GPIO31 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO31OUTCFG : GPIO31 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD31FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD31FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD31FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD31FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO31INTD : GPIO31 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD31FNCSEL = NCE31 - nCE polarity active low

1 : nCEHIGH

Applies when PAD31FNCSEL = NCE31 - nCE polarity active high

End of enumeration elements list.


CFGE

GPIO Configuration E (Pads 39-32)
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGE CFGE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO32INCFG GPIO32OUTCFG GPIO32INTD GPIO33INCFG GPIO33OUTCFG GPIO33INTD GPIO34INCFG GPIO34OUTCFG GPIO34INTD GPIO35INCFG GPIO35OUTCFG GPIO35INTD GPIO36INCFG GPIO36OUTCFG GPIO36INTD GPIO37INCFG GPIO37OUTCFG GPIO37INTD GPIO38INCFG GPIO38OUTCFG GPIO38INTD GPIO39INCFG GPIO39OUTCFG GPIO39INTD

GPIO32INCFG : GPIO32 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO32OUTCFG : GPIO32 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD32FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD32FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD32FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD32FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO32INTD : GPIO32 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD32FNCSEL = NCE32 - nCE polarity active low

1 : nCEHIGH

Applies when PAD32FNCSEL = NCE32 - nCE polarity active high

End of enumeration elements list.

GPIO33INCFG : GPIO33 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO33OUTCFG : GPIO33 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD33FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD33FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD33FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD33FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO33INTD : GPIO33 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD33FNCSEL = NCE33 - nCE polarity active low

1 : nCEHIGH

Applies when PAD33FNCSEL = NCE33 - nCE polarity active high

End of enumeration elements list.

GPIO34INCFG : GPIO34 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO34OUTCFG : GPIO34 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD34FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD34FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD34FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD34FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO34INTD : GPIO34 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD34FNCSEL = NCE34 - nCE polarity active low

1 : nCEHIGH

Applies when PAD34FNCSEL = NCE34 - nCE polarity active high

End of enumeration elements list.

GPIO35INCFG : GPIO35 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO35OUTCFG : GPIO35 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD35FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD35FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD35FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD35FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO35INTD : GPIO35 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD35FNCSEL = NCE35 - nCE polarity active low

1 : nCEHIGH

Applies when PAD35FNCSEL = NCE35 - nCE polarity active high

End of enumeration elements list.

GPIO36INCFG : GPIO36 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO36OUTCFG : GPIO36 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD36FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD36FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD36FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD36FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO36INTD : GPIO36 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD36FNCSEL = NCE36 - nCE polarity active low

1 : nCEHIGH

Applies when PAD36FNCSEL = NCE36 - nCE polarity active high

End of enumeration elements list.

GPIO37INCFG : GPIO37 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO37OUTCFG : GPIO37 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD37FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD37FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD37FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD37FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO37INTD : GPIO37 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD37FNCSEL = NCE37 - nCE polarity active low

1 : nCEHIGH

Applies when PAD37FNCSEL = NCE37 - nCE polarity active high

End of enumeration elements list.

GPIO38INCFG : GPIO38 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO38OUTCFG : GPIO38 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD38FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD38FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD38FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD38FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO38INTD : GPIO38 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD38FNCSEL = NCE38 - nCE polarity active low

1 : nCEHIGH

Applies when PAD38FNCSEL = NCE38 - nCE polarity active high

End of enumeration elements list.

GPIO39INCFG : GPIO39 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO39OUTCFG : GPIO39 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD39FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD39FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD39FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD39FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO39INTD : GPIO39 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : INTDIS

Applies when GPIO39INCFG = 1 - No interrupt on GPIO transition

1 : INTBOTH

Applies when GPIO39INCFG = 1 - Interrupt on either low to high or high to low GPIO transition

End of enumeration elements list.


CFGF

GPIO Configuration F (Pads 47-40)
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGF CFGF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO40INCFG GPIO40OUTCFG GPIO40INTD GPIO41INCFG GPIO41OUTCFG GPIO41INTD GPIO42INCFG GPIO42OUTCFG GPIO42INTD GPIO43INCFG GPIO43OUTCFG GPIO43INTD GPIO44INCFG GPIO44OUTCFG GPIO44INTD GPIO45INCFG GPIO45OUTCFG GPIO45INTD GPIO46INCFG GPIO46OUTCFG GPIO46INTD GPIO47INCFG GPIO47OUTCFG GPIO47INTD

GPIO40INCFG : GPIO40 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO40OUTCFG : GPIO40 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD40FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD40FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD40FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD40FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO40INTD : GPIO40 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : INTDIS

Applies when GPIO40INCFG = 1 - No interrupt on GPIO transition

1 : INTBOTH

Applies when GPIO40INCFG = 1 - Interrupt on either low to high or high to low GPIO transition

End of enumeration elements list.

GPIO41INCFG : GPIO41 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO41OUTCFG : GPIO41 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD41FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD41FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD41FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD41FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO41INTD : GPIO41 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD41FNCSEL = NCE41 - nCE polarity active low

1 : nCEHIGH

Applies when PAD41FNCSEL = NCE41 - nCE polarity active high

End of enumeration elements list.

GPIO42INCFG : GPIO42 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO42OUTCFG : GPIO42 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD42FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD42FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD42FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD42FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO42INTD : GPIO42 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD42FNCSEL = NCE42 - nCE polarity active low

1 : nCEHIGH

Applies when PAD42FNCSEL = NCE42 - nCE polarity active high

End of enumeration elements list.

GPIO43INCFG : GPIO43 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO43OUTCFG : GPIO43 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD43FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD43FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD43FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD43FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO43INTD : GPIO43 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD43FNCSEL = NCE43 - nCE polarity active low

1 : nCEHIGH

Applies when PAD43FNCSEL = NCE43 - nCE polarity active high

End of enumeration elements list.

GPIO44INCFG : GPIO44 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO44OUTCFG : GPIO44 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD44FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD44FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD44FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD44FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO44INTD : GPIO44 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD44FNCSEL = NCE44 - nCE polarity active low

1 : nCEHIGH

Applies when PAD44FNCSEL = NCE44 - nCE polarity active high

End of enumeration elements list.

GPIO45INCFG : GPIO45 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO45OUTCFG : GPIO45 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD45FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD45FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD45FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD45FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO45INTD : GPIO45 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD45FNCSEL = NCE45 - nCE polarity active low

1 : nCEHIGH

Applies when PAD45FNCSEL = NCE45 - nCE polarity active high

End of enumeration elements list.

GPIO46INCFG : GPIO46 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO46OUTCFG : GPIO46 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD46FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD46FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD46FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD46FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO46INTD : GPIO46 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD46FNCSEL = NCE46 - nCE polarity active low

1 : nCEHIGH

Applies when PAD46FNCSEL = NCE46 - nCE polarity active high

End of enumeration elements list.

GPIO47INCFG : GPIO47 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO47OUTCFG : GPIO47 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD47FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD47FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD47FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD47FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO47INTD : GPIO47 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD47FNCSEL = NCE47 - nCE polarity active low

1 : nCEHIGH

Applies when PAD47FNCSEL = NCE47 - nCE polarity active high

End of enumeration elements list.


CFGG

GPIO Configuration G (Pads 55-48)
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGG CFGG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO48INCFG GPIO48OUTCFG GPIO48INTD GPIO49INCFG GPIO49OUTCFG GPIO49INTD GPIO50INCFG GPIO50OUTCFG GPIO50INTD GPIO51INCFG GPIO51OUTCFG GPIO51INTD GPIO52INCFG GPIO52OUTCFG GPIO52INTD GPIO53INCFG GPIO53OUTCFG GPIO53INTD GPIO54INCFG GPIO54OUTCFG GPIO54INTD GPIO55INCFG GPIO55OUTCFG GPIO55INTD

GPIO48INCFG : GPIO48 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO48OUTCFG : GPIO48 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD48FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD48FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD48FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD48FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO48INTD : GPIO48 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD48FNCSEL = NCE48 - nCE polarity active low

1 : nCEHIGH

Applies when PAD48FNCSEL = NCE48 - nCE polarity active high

End of enumeration elements list.

GPIO49INCFG : GPIO49 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO49OUTCFG : GPIO49 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD49FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD49FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD49FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD49FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO49INTD : GPIO49 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD49FNCSEL = NCE49 - nCE polarity active low

1 : nCEHIGH

Applies when PAD49FNCSEL = NCE49 - nCE polarity active high

End of enumeration elements list.

GPIO50INCFG : GPIO50 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO50OUTCFG : GPIO50 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD50FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD50FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD50FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD50FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO50INTD : GPIO50 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD50FNCSEL = NCE50 - nCE polarity active low

1 : nCEHIGH

Applies when PAD50FNCSEL = NCE50 - nCE polarity active high

End of enumeration elements list.

GPIO51INCFG : GPIO51 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO51OUTCFG : GPIO51 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD51FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD51FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD51FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD51FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO51INTD : GPIO51 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD51FNCSEL = NCE51 - nCE polarity active low

1 : nCEHIGH

Applies when PAD51FNCSEL = NCE51 - nCE polarity active high

End of enumeration elements list.

GPIO52INCFG : GPIO52 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO52OUTCFG : GPIO52 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD52FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD52FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD52FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD52FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO52INTD : GPIO52 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD52FNCSEL = NCE52 - nCE polarity active low

1 : nCEHIGH

Applies when PAD52FNCSEL = NCE52 - nCE polarity active high

End of enumeration elements list.

GPIO53INCFG : GPIO53 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO53OUTCFG : GPIO53 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD53FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD53FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD53FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD53FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO53INTD : GPIO53 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD53FNCSEL = NCE53 - nCE polarity active low

1 : nCEHIGH

Applies when PAD53FNCSEL = NCE53 - nCE polarity active high

End of enumeration elements list.

GPIO54INCFG : GPIO54 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO54OUTCFG : GPIO54 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD54FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD54FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD54FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD54FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO54INTD : GPIO54 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD54FNCSEL = NCE54 - nCE polarity active low

1 : nCEHIGH

Applies when PAD54FNCSEL = NCE54 - nCE polarity active high

End of enumeration elements list.

GPIO55INCFG : GPIO55 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO55OUTCFG : GPIO55 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD55FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD55FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD55FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD55FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO55INTD : GPIO55 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD55FNCSEL = NCE55 - nCE polarity active low

1 : nCEHIGH

Applies when PAD55FNCSEL = NCE55 - nCE polarity active high

End of enumeration elements list.


CFGH

GPIO Configuration H (Pads 63-56)
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGH CFGH read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO56INCFG GPIO56OUTCFG GPIO56INTD GPIO57INCFG GPIO57OUTCFG GPIO57INTD GPIO58INCFG GPIO58OUTCFG GPIO58INTD GPIO59INCFG GPIO59OUTCFG GPIO59INTD GPIO60INCFG GPIO60OUTCFG GPIO60INTD GPIO61INCFG GPIO61OUTCFG GPIO61INTD GPIO62INCFG GPIO62OUTCFG GPIO62INTD GPIO63INCFG GPIO63OUTCFG GPIO63INTD

GPIO56INCFG : GPIO56 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO56OUTCFG : GPIO56 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD56FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD56FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD56FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD56FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO56INTD : GPIO56 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD56FNCSEL = NCE56 - nCE polarity active low

1 : nCEHIGH

Applies when PAD56FNCSEL = NCE56 - nCE polarity active high

End of enumeration elements list.

GPIO57INCFG : GPIO57 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO57OUTCFG : GPIO57 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD57FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD57FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD57FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD57FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO57INTD : GPIO57 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD57FNCSEL = NCE57 - nCE polarity active low

1 : nCEHIGH

Applies when PAD57FNCSEL = NCE57 - nCE polarity active high

End of enumeration elements list.

GPIO58INCFG : GPIO58 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO58OUTCFG : GPIO58 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD58FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD58FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD58FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD58FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO58INTD : GPIO58 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD58FNCSEL = NCE58 - nCE polarity active low

1 : nCEHIGH

Applies when PAD58FNCSEL = NCE58 - nCE polarity active high

End of enumeration elements list.

GPIO59INCFG : GPIO59 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO59OUTCFG : GPIO59 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD59FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD59FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD59FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD59FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO59INTD : GPIO59 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD59FNCSEL = NCE59 - nCE polarity active low

1 : nCEHIGH

Applies when PAD59FNCSEL = NCE59 - nCE polarity active high

End of enumeration elements list.

GPIO60INCFG : GPIO60 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO60OUTCFG : GPIO60 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD60FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD60FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD60FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD60FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO60INTD : GPIO60 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD60FNCSEL = NCE60 - nCE polarity active low

1 : nCEHIGH

Applies when PAD60FNCSEL = NCE60 - nCE polarity active high

End of enumeration elements list.

GPIO61INCFG : GPIO61 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO61OUTCFG : GPIO61 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD61FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD61FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD61FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD61FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO61INTD : GPIO61 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD61FNCSEL = NCE61 - nCE polarity active low

1 : nCEHIGH

Applies when PAD61FNCSEL = NCE61 - nCE polarity active high

End of enumeration elements list.

GPIO62INCFG : GPIO62 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO62OUTCFG : GPIO62 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD62FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD62FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD62FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD62FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO62INTD : GPIO62 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD62FNCSEL = NCE62 - nCE polarity active low

1 : nCEHIGH

Applies when PAD62FNCSEL = NCE62 - nCE polarity active high

End of enumeration elements list.

GPIO63INCFG : GPIO63 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO63OUTCFG : GPIO63 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD63FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD63FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD63FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD63FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO63INTD : GPIO63 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD63FNCSEL = NCE63 - nCE polarity active low

1 : nCEHIGH

Applies when PAD63FNCSEL = NCE63 - nCE polarity active high

End of enumeration elements list.


CFGI

GPIO Configuration I (Pads 71-64)
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGI CFGI read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO64INCFG GPIO64OUTCFG GPIO64INTD GPIO65INCFG GPIO65OUTCFG GPIO65INTD GPIO66INCFG GPIO66OUTCFG GPIO66INTD GPIO67INCFG GPIO67OUTCFG GPIO67INTD GPIO68INCFG GPIO68OUTCFG GPIO68INTD GPIO69INCFG GPIO69OUTCFG GPIO69INTD GPIO70INCFG GPIO70OUTCFG GPIO70INTD GPIO71INCFG GPIO71OUTCFG GPIO71INTD

GPIO64INCFG : GPIO64 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO64OUTCFG : GPIO64 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD64FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD64FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD64FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD64FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO64INTD : GPIO64 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD64FNCSEL = NCE64 - nCE polarity active low

1 : nCEHIGH

Applies when PAD64FNCSEL = NCE64 - nCE polarity active high

End of enumeration elements list.

GPIO65INCFG : GPIO65 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO65OUTCFG : GPIO65 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD65FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD65FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD65FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD65FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO65INTD : GPIO65 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD65FNCSEL = NCE65 - nCE polarity active low

1 : nCEHIGH

Applies when PAD65FNCSEL = NCE65 - nCE polarity active high

End of enumeration elements list.

GPIO66INCFG : GPIO66 input enable.
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO66OUTCFG : GPIO66 output configuration.
bits : 9 - 19 (11 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD66FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD66FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD66FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD66FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO66INTD : GPIO66 interrupt direction, nCE polarity.
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD66FNCSEL = NCE66 - nCE polarity active low

1 : nCEHIGH

Applies when PAD66FNCSEL = NCE66 - nCE polarity active high

End of enumeration elements list.

GPIO67INCFG : GPIO67 input enable.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO67OUTCFG : GPIO67 output configuration.
bits : 13 - 27 (15 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD67FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD67FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD67FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD67FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO67INTD : GPIO67 interrupt direction, nCE polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD67FNCSEL = NCE67 - nCE polarity active low

1 : nCEHIGH

Applies when PAD67FNCSEL = NCE67 - nCE polarity active high

End of enumeration elements list.

GPIO68INCFG : GPIO68 input enable.
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO68OUTCFG : GPIO68 output configuration.
bits : 17 - 35 (19 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD68FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD68FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD68FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD68FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO68INTD : GPIO68 interrupt direction, nCE polarity.
bits : 19 - 38 (20 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD68FNCSEL = NCE68 - nCE polarity active low

1 : nCEHIGH

Applies when PAD68FNCSEL = NCE68 - nCE polarity active high

End of enumeration elements list.

GPIO69INCFG : GPIO69 input enable.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO69OUTCFG : GPIO69 output configuration.
bits : 21 - 43 (23 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD69FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD69FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD69FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD69FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO69INTD : GPIO69 interrupt direction, nCE polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD69FNCSEL = NCE69 - nCE polarity active low

1 : nCEHIGH

Applies when PAD69FNCSEL = NCE69 - nCE polarity active high

End of enumeration elements list.

GPIO70INCFG : GPIO70 input enable.
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO70OUTCFG : GPIO70 output configuration.
bits : 25 - 51 (27 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD70FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD70FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD70FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD70FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO70INTD : GPIO70 interrupt direction, nCE polarity.
bits : 27 - 54 (28 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD70FNCSEL = NCE70 - nCE polarity active low

1 : nCEHIGH

Applies when PAD70FNCSEL = NCE70 - nCE polarity active high

End of enumeration elements list.

GPIO71INCFG : GPIO71 input enable.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO71OUTCFG : GPIO71 output configuration.
bits : 29 - 59 (31 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD71FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD71FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD71FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD71FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO71INTD : GPIO71 interrupt direction, nCE polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD71FNCSEL = NCE71 - nCE polarity active low

1 : nCEHIGH

Applies when PAD71FNCSEL = NCE71 - nCE polarity active high

End of enumeration elements list.


CFGJ

GPIO Configuration J (Pads 73-72)
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFGJ CFGJ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO72INCFG GPIO72OUTCFG GPIO72INTD GPIO73INCFG GPIO73OUTCFG GPIO73INTD

GPIO72INCFG : GPIO72 input enable.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO72OUTCFG : GPIO72 output configuration.
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD72FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD72FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD72FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD72FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO72INTD : GPIO72 interrupt direction, nCE polarity.
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD72FNCSEL = NCE72 - nCE polarity active low

1 : nCEHIGH

Applies when PAD72FNCSEL = NCE72 - nCE polarity active high

End of enumeration elements list.

GPIO73INCFG : GPIO73 input enable.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : READ

Read the GPIO pin data

1 : RDZERO

INTD = 0 - Read-back will always be zero

End of enumeration elements list.

GPIO73OUTCFG : GPIO73 output configuration.
bits : 5 - 11 (7 bit)
access : read-write

Enumeration:

0 : DIS

Applies when PAD73FNCSEL = GPIO - Output disabled

1 : PUSHPULL

Applies when PAD73FNCSEL = GPIO - Output is push-pull

2 : OD

Applies when PAD73FNCSEL = GPIO - Output is open drain

3 : TS

Applies when PAD73FNCSEL = GPIO - Output is tri-state

End of enumeration elements list.

GPIO73INTD : GPIO73 interrupt direction, nCE polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : nCELOW

Applies when PAD73FNCSEL = NCE73 - nCE polarity active low

1 : nCEHIGH

Applies when PAD73FNCSEL = NCE73 - nCE polarity active high

End of enumeration elements list.


PADKEY

Key for all pad configuration registers
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADKEY PADKEY read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PADKEY

PADKEY : Key register value.
bits : 0 - 31 (32 bit)
access : read-write

Enumeration:

115 : Key

Key

End of enumeration elements list.


PADREGC

Pad Configuration C (Pads 11-8)
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGC PADREGC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD8PULL PAD8INPEN PAD8STRNG PAD8FNCSEL PAD8RSEL PAD9PULL PAD9INPEN PAD9STRNG PAD9FNCSEL PAD9RSEL PAD10PULL PAD10INPEN PAD10STRNG PAD10FNCSEL PAD11PULL PAD11INPEN PAD11STRNG PAD11FNCSEL

PAD8PULL : Pad 8 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD8INPEN : Pad 8 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD8STRNG : Pad 8 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD8FNCSEL : Pad 8 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : M1SCL

Configure as the IOMSTR1 I2C SCL signal

1 : M1SCK

Configure as the IOMSTR1 SPI SCK signal

2 : NCE8

IOM/MSPI nCE group 8

3 : GPIO8

Configure as GPIO8

4 : SCCLK

SCARD serial clock output

6 : UART1TX

Configure as the UART1 TX output signal

End of enumeration elements list.

PAD8RSEL : Pad 8 pullup resistor selection.
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD9PULL : Pad 9 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD9INPEN : Pad 9 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD9STRNG : Pad 9 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD9FNCSEL : Pad 9 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : M1SDAWIR3

Configure as the IOMSTR1 I2C SDA or SPI WIR3 signal

1 : M1MISO

Configure as the IOMSTR1 SPI MISO signal

2 : NCE9

IOM/MSPI nCE group 9

3 : GPIO9

Configure as GPIO9

4 : SCCIO

SCARD data I/O connection

6 : UART1RX

Configure as UART1 RX input signal

End of enumeration elements list.

PAD9RSEL : Pad 9 pullup resistor selection
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : PULL1_5K

Pullup is ~1.5 KOhms

1 : PULL6K

Pullup is ~6 KOhms

2 : PULL12K

Pullup is ~12 KOhms

3 : PULL24K

Pullup is ~24 KOhms

End of enumeration elements list.

PAD10PULL : Pad 10 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD10INPEN : Pad 10 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD10STRNG : Pad 10 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD10FNCSEL : Pad 10 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

1 : M1MOSI

Configure as the IOMSTR1 SPI MOSI signal

2 : NCE10

IOM/MSPI nCE group 10

3 : GPIO10

Configure as GPIO10

4 : PDMCLK

PDM serial clock out

5 : UA1RTS

Configure as the UART1 RTS output signal

End of enumeration elements list.

PAD11PULL : Pad 11 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD11INPEN : Pad 11 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD11STRNG : Pad 11 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD11FNCSEL : Pad 11 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : ADCSE2

Configure as the analog input for ADC single ended input 2

1 : NCE11

IOM/MSPI nCE group 11

2 : CT31

CTIMER connection 31

3 : GPIO11

Configure as GPIO11

4 : SLINT

Configure as the IOSLAVE interrupt out signal

5 : UA1CTS

Configure as the UART1 CTS input signal

6 : UART0RX

Configure as the UART0 RX input signal

7 : PDM_DATA

Configure as the PDM Data input signal

End of enumeration elements list.


RDA

GPIO Input A (31-0)
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RDA RDA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDA

RDA : GPIO31-0 read data.
bits : 0 - 31 (32 bit)
access : read-write


RDB

GPIO Input B (63-32)
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RDB RDB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDB

RDB : GPIO63-32 read data.
bits : 0 - 31 (32 bit)
access : read-write


RDC

GPIO Input C (73-64)
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RDC RDC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RDC

RDC : GPIO73-64 read data.
bits : 0 - 9 (10 bit)
access : read-write


WTA

GPIO Output A (31-0)
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTA WTA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTA

WTA : GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTB

GPIO Output B (63-32)
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTB WTB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTB

WTB : GPIO63-32 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTC

GPIO Output C (73-64)
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTC WTC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTC

WTC : GPIO73-64 write data.
bits : 0 - 9 (10 bit)
access : read-write


WTSA

GPIO Output A Set (31-0)
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTSA WTSA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTSA

WTSA : Set the GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTSB

GPIO Output B Set (63-32)
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTSB WTSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTSB

WTSB : Set the GPIO63-32 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTSC

GPIO Output C Set (73-64)
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTSC WTSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTSC

WTSC : Set the GPIO73-64 write data.
bits : 0 - 9 (10 bit)
access : read-write


WTCA

GPIO Output A Clear (31-0)
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTCA WTCA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTCA

WTCA : Clear the GPIO31-0 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTCB

GPIO Output B Clear (63-32)
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTCB WTCB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTCB

WTCB : Clear the GPIO63-32 write data.
bits : 0 - 31 (32 bit)
access : read-write


WTCC

GPIO Output C Clear (73-64)
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WTCC WTCC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WTCB

WTCB : Clear the GPIO73-64 write data.
bits : 0 - 9 (10 bit)
access : read-write


ENA

GPIO Enable A (31-0)
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENA ENA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENA

ENA : GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write


ENB

GPIO Enable B (63-32)
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENB ENB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENB

ENB : GPIO63-32 output enables
bits : 0 - 31 (32 bit)
access : read-write


ENC

GPIO Enable C (73-64)
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENC ENC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENC

ENC : GPIO73-64 output enables
bits : 0 - 9 (10 bit)
access : read-write


ENSA

GPIO Enable A Set (31-0)
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENSA ENSA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENSA

ENSA : Set the GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write


PADREGD

Pad Configuration D (Pads 15-12)
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PADREGD PADREGD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD12PULL PAD12INPEN PAD12STRNG PAD12FNCSEL PAD13PULL PAD13INPEN PAD13STRNG PAD13FNCSEL PAD14PULL PAD14INPEN PAD14STRNG PAD14FNCSEL PAD15PULL PAD15INPEN PAD15STRNG PAD15FNCSEL

PAD12PULL : Pad 12 pullup enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD12INPEN : Pad 12 input enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD12STRNG : Pad 12 drive strength
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD12FNCSEL : Pad 12 function select
bits : 3 - 8 (6 bit)
access : read-write

Enumeration:

0 : ADCD0NSE9

Configure as the ADC Differential pair 0 N, or Single Ended input 9 analog input signal. Determination of the D0N vs SE9 usage is done when the particular channel is selected within the ADC module

1 : NCE12

IOM/MSPI nCE group 12

2 : CT0

CTIMER connection 0

3 : GPIO12

Configure as GPIO12

4 : SLnCE

Configure as the IOSLAVE SPI nCE signal

5 : PDMCLK

PDM serial clock output

6 : UA0CTS

Configure as the UART0 CTS input signal

7 : UART1TX

Configure as the UART1 TX output signal

End of enumeration elements list.

PAD13PULL : Pad 13 pullup enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD13INPEN : Pad 13 input enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD13STRNG : Pad 13 drive strength
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD13FNCSEL : Pad 13 function select
bits : 11 - 24 (14 bit)
access : read-write

Enumeration:

0 : ADCD0PSE8

Configure as the ADC Differential pair 0 P, or Single Ended input 8 analog input signal. Determination of the D0P vs SE8 usage is done when the particular channel is selected within the ADC module

1 : NCE13

IOM/MSPI nCE group 13

2 : CT2

CTIMER connection 2

3 : GPIO13

Configure as GPIO13

4 : I2SBCLK

I2C interface bit clock

5 : EXTHFB

Configure as the external HFRC oscillator input

6 : UA0RTS

Configure as the UART0 RTS signal output

7 : UART1RX

Configure as the UART1 RX input signal

End of enumeration elements list.

PAD14PULL : Pad 14 pullup enable
bits : 16 - 32 (17 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD14INPEN : Pad 14 input enable
bits : 17 - 34 (18 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD14STRNG : Pad 14 drive strength
bits : 18 - 36 (19 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD14FNCSEL : Pad 14 function select
bits : 19 - 40 (22 bit)
access : read-write

Enumeration:

0 : ADCD1P

Configure as the analog ADC differential pair 1 P input signal

1 : NCE14

IOM/MSPI nCE group 14

2 : UART1TX

Configure as the UART1 TX output signal

3 : GPIO14

Configure as GPIO14

4 : PDMCLK

PDM serial clock output

5 : EXTHFS

Configure as the External HFRC oscillator input select

6 : SWDCK

Configure as the alternate input for the SWDCK input signal

7 : 32kHzXT

Configure as the 32kHz crystal output signal

End of enumeration elements list.

PAD15PULL : Pad 15 pullup enable
bits : 24 - 48 (25 bit)
access : read-write

Enumeration:

0 : DIS

Pullup disabled

1 : EN

Pullup enabled

End of enumeration elements list.

PAD15INPEN : Pad 15 input enable
bits : 25 - 50 (26 bit)
access : read-write

Enumeration:

0 : DIS

Pad input disabled

1 : EN

Pad input enabled

End of enumeration elements list.

PAD15STRNG : Pad 15 drive strength
bits : 26 - 52 (27 bit)
access : read-write

Enumeration:

0 : LOW

Low drive strength

1 : HIGH

High drive strength

End of enumeration elements list.

PAD15FNCSEL : Pad 15 function select
bits : 27 - 56 (30 bit)
access : read-write

Enumeration:

0 : ADCD1N

Configure as the analog ADC differential pair 1 N input signal

1 : NCE15

IOM/MSPI nCE group 15

2 : UART1RX

Configure as the UART1 RX signal

3 : GPIO15

Configure as GPIO15

4 : PDMDATA

PDM serial data input

5 : EXTXT

Configure as the external XTAL oscillator input

6 : SWDIO

Configure as an alternate port for the SWDIO I/O signal

7 : SWO

Configure as an SWO (Serial Wire Trace output)

End of enumeration elements list.


ENSB

GPIO Enable B Set (63-32)
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENSB ENSB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENSB

ENSB : Set the GPIO63-32 output enables
bits : 0 - 31 (32 bit)
access : read-write


ENSC

GPIO Enable C Set (73-64)
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENSC ENSC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENSC

ENSC : Set the GPIO73-64 output enables
bits : 0 - 9 (10 bit)
access : read-write


ENCA

GPIO Enable A Clear (31-0)
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENCA ENCA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENCA

ENCA : Clear the GPIO31-0 output enables
bits : 0 - 31 (32 bit)
access : read-write


ENCB

GPIO Enable B Clear (63-32)
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENCB ENCB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENCB

ENCB : Clear the GPIO49-32 output enables
bits : 0 - 31 (32 bit)
access : read-write


ENCC

GPIO Enable C Clear (73-64)
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENCC ENCC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENCC

ENCC : Clear the GPIO73-64 output enables
bits : 0 - 9 (10 bit)
access : read-write


STMRCAP

STIMER Capture Control
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STMRCAP STMRCAP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 STSEL0 STPOL0 STSEL1 STPOL1 STSEL2 STPOL2 STSEL3 STPOL3

STSEL0 : STIMER Capture 0 Select.
bits : 0 - 6 (7 bit)
access : read-write

STPOL0 : STIMER Capture 0 Polarity.
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : CAPLH

Capture on low to high GPIO transition

1 : CAPHL

Capture on high to low GPIO transition

End of enumeration elements list.

STSEL1 : STIMER Capture 1 Select.
bits : 8 - 22 (15 bit)
access : read-write

STPOL1 : STIMER Capture 1 Polarity.
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : CAPLH

Capture on low to high GPIO transition

1 : CAPHL

Capture on high to low GPIO transition

End of enumeration elements list.

STSEL2 : STIMER Capture 2 Select.
bits : 16 - 38 (23 bit)
access : read-write

STPOL2 : STIMER Capture 2 Polarity.
bits : 23 - 46 (24 bit)
access : read-write

Enumeration:

0 : CAPLH

Capture on low to high GPIO transition

1 : CAPHL

Capture on high to low GPIO transition

End of enumeration elements list.

STSEL3 : STIMER Capture 3 Select.
bits : 24 - 54 (31 bit)
access : read-write

STPOL3 : STIMER Capture 3 Polarity.
bits : 31 - 62 (32 bit)
access : read-write

Enumeration:

0 : CAPLH

Capture on low to high GPIO transition

1 : CAPHL

Capture on high to low GPIO transition

End of enumeration elements list.


IOM0IRQ

IOM0 Flow Control IRQ Select
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM0IRQ IOM0IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM0IRQ

IOM0IRQ : IOMSTR0 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


IOM1IRQ

IOM1 Flow Control IRQ Select
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM1IRQ IOM1IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM1IRQ

IOM1IRQ : IOMSTR1 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


IOM2IRQ

IOM2 Flow Control IRQ Select
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM2IRQ IOM2IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM2IRQ

IOM2IRQ : IOMSTR2 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


IOM3IRQ

IOM3 Flow Control IRQ Select
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM3IRQ IOM3IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM3IRQ

IOM3IRQ : IOMSTR3 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


IOM4IRQ

IOM4 Flow Control IRQ Select
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM4IRQ IOM4IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM4IRQ

IOM4IRQ : IOMSTR4 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


IOM5IRQ

IOM5 Flow Control IRQ Select
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IOM5IRQ IOM5IRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOM5IRQ

IOM5IRQ : IOMSTR5 IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


BLEIFIRQ

BLEIF Flow Control IRQ Select
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BLEIFIRQ BLEIFIRQ read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BLEIFIRQ

BLEIFIRQ : BLEIF IRQ pad select.
bits : 0 - 6 (7 bit)
access : read-write


GPIOOBS

GPIO Observation Mode Sample register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

GPIOOBS GPIOOBS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OBS_DATA

OBS_DATA : Sample of the data output on the GPIO observation port. May have sampling non-synchronization issues, as the data is not synchronized to the read operation. Intended for debug purposes only
bits : 0 - 15 (16 bit)
access : read-write


ALTPADCFGA

Alternate Pad Configuration A (Pads 3-0)
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGA ALTPADCFGA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD0_DS1 PAD0_SR PAD1_DS1 PAD1_SR PAD2_DS1 PAD2_SR PAD3_DS1 PAD3_SR

PAD0_DS1 : Pad 0 high order drive strength selection. Used in conjunction with PAD0STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD0_SR : Pad 3 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD1_DS1 : Pad 1 high order drive strength selection. Used in conjunction with PAD1STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD1_SR : Pad 3 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD2_DS1 : Pad 2 high order drive strength selection. Used in conjunction with PAD2STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD2_SR : Pad 3 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD3_DS1 : Pad 3 high order drive strength selection. Used in conjunction with PAD3STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD3_SR : Pad 3 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.


ALTPADCFGB

Alternate Pad Configuration B (Pads 7-4)
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTPADCFGB ALTPADCFGB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PAD4_DS1 PAD4_SR PAD5_DS1 PAD5_SR PAD6_DS1 PAD6_SR PAD7_DS1 PAD7_SR

PAD4_DS1 : Pad 4 high order drive strength selection. Used in conjunction with PAD4STRNG field to set the pad drive strength.
bits : 0 - 0 (1 bit)
access : read-write

PAD4_SR : Pad 7 slew rate selection.
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD5_DS1 : Pad 5 high order drive strength selection. Used in conjunction with PAD5STRNG field to set the pad drive strength.
bits : 8 - 16 (9 bit)
access : read-write

PAD5_SR : Pad 7 slew rate selection.
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD6_DS1 : Pad 6 high order drive strength selection. Used in conjunction with PAD6STRNG field to set the pad drive strength.
bits : 16 - 32 (17 bit)
access : read-write

PAD6_SR : Pad 7 slew rate selection.
bits : 20 - 40 (21 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.

PAD7_DS1 : Pad 7 high order drive strength selection. Used in conjunction with PAD7STRNG field to set the pad drive strength.
bits : 24 - 48 (25 bit)
access : read-write

PAD7_SR : Pad 7 slew rate selection.
bits : 28 - 56 (29 bit)
access : read-write

Enumeration:

1 : SR_EN

Enables Slew rate control on pad

End of enumeration elements list.



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