\n

PF

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection :

address_offset : 0xC Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : reserved
protection :

address_offset : 0x28 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

address_offset : 0x30 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection :

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection :

Registers

DATA

OD

PUP

IE

CR

FR1


DATA

PF Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4 PF5 PF6

PF4 : PF4
bits : 4 - 4 (1 bit)
access : read-write

PF5 : PF5
bits : 5 - 5 (1 bit)
access : read-write

PF6 : PF6
bits : 6 - 6 (1 bit)
access : read-write


OD

PF Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4OD PF5OD PF6OD

PF4OD : PF4OD
bits : 4 - 4 (1 bit)
access : read-write

PF5OD : PF5OD
bits : 5 - 5 (1 bit)
access : read-write

PF6OD : PF6OD
bits : 6 - 6 (1 bit)
access : read-write


PUP

PF Pull-Up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4UP PF5UP PF6UP

PF4UP : PF4UP
bits : 4 - 4 (1 bit)
access : read-write

PF5UP : PF5UP
bits : 5 - 5 (1 bit)
access : read-write

PF6UP : PF6UP
bits : 6 - 6 (1 bit)
access : read-write


IE

PF Input Enable Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4IE PF5IE PF6IE

PF4IE : PF4IE
bits : 4 - 4 (1 bit)
access : read-write

PF5IE : PF5IE
bits : 5 - 5 (1 bit)
access : read-write

PF6IE : PF6IE
bits : 6 - 6 (1 bit)
access : read-write


CR

PF Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4C PF5C PF6C

PF4C : PF4C
bits : 4 - 4 (1 bit)
access : read-write

PF5C : PF5C
bits : 5 - 5 (1 bit)
access : read-write

PF6C : PF6C
bits : 6 - 6 (1 bit)
access : read-write


FR1

PF Function Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR1 FR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PF4F1 PF5F1 PF6F1

PF4F1 : PF4F1
bits : 4 - 4 (1 bit)
access : read-write

PF5F1 : PF5F1
bits : 5 - 5 (1 bit)
access : read-write

PF6F1 : PF6F1
bits : 6 - 6 (1 bit)
access : read-write



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