\n
address_offset : 0x0 Bytes (0x0)
size : 0x2C byte (0x0)
mem_usage : registers
protection :
EN
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SIOE : SIOE
bits : 0 - 0 (1 bit)
access : read-write
SWRST : SWRST
bits : 6 - 7 (2 bit)
access : write-only
CR2
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SINT : SINT
bits : 0 - 2 (3 bit)
access : read-write
CSHD0 : CSHD0
bits : 3 - 4 (2 bit)
access : read-write
FDPX0 : FDPX0
bits : 6 - 7 (2 bit)
access : read-write
CR3
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INTTXWE : INTTXWE
bits : 0 - 0 (1 bit)
access : read-write
INTTXFE : INTTXFE
bits : 1 - 1 (1 bit)
access : read-write
INTRXWE : INTRXWE
bits : 2 - 2 (1 bit)
access : read-write
INTRXFE : INTRXFE
bits : 3 - 3 (1 bit)
access : read-write
INTRXEE : INTRXEE
bits : 4 - 4 (1 bit)
access : read-write
DMATE : DMATE
bits : 6 - 6 (1 bit)
access : read-write
DMARE : DMARE
bits : 7 - 7 (1 bit)
access : read-write
TWEND : TWEND
bits : 8 - 8 (1 bit)
access : read-write
RWEND : RWEND
bits : 9 - 9 (1 bit)
access : read-write
RXRUN : RXRUN
bits : 11 - 11 (1 bit)
access : read-only
TXRUN : TXRUN
bits : 12 - 12 (1 bit)
access : read-only
ORER : ORER
bits : 13 - 13 (1 bit)
access : read-write
RBFLL : RBFLL
bits : 14 - 14 (1 bit)
access : read-only
TBEMP : TBEMP
bits : 15 - 15 (1 bit)
access : read-only
BRCR
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BRS0 : BRS0
bits : 0 - 3 (4 bit)
access : read-write
BRCK0 : BRCK0
bits : 4 - 7 (4 bit)
access : read-write
RFC
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RIL0 : RIL0
bits : 0 - 2 (3 bit)
access : read-write
RFCS : RFCS
bits : 7 - 7 (1 bit)
access : write-only
TFC
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TIL0 : TIL0
bits : 0 - 2 (3 bit)
access : read-write
TFCS : TFCS
bits : 7 - 7 (1 bit)
access : write-only
RST
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RLVL0 : RLVL0
bits : 0 - 2 (3 bit)
access : read-only
TST
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
TLVL0 : TLVL0
bits : 0 - 2 (3 bit)
access : read-only
BUF
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TRB : TRB
bits : 0 - 31 (32 bit)
access : read-write
CR0
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DL : DL
bits : 0 - 5 (6 bit)
access : read-write
DRCHG : DRCHG
bits : 6 - 6 (1 bit)
access : read-write
CKPH : CKPH
bits : 7 - 7 (1 bit)
access : read-write
CS0PH : CS0PH
bits : 8 - 8 (1 bit)
access : read-write
CS1PH : CS1PH
bits : 9 - 9 (1 bit)
access : read-write
CR1
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SC : SC
bits : 0 - 1 (2 bit)
access : read-write
SM : SM
bits : 2 - 3 (2 bit)
access : read-write
CSS : CSS
bits : 4 - 4 (1 bit)
access : read-write
TRXE : TRXE
bits : 7 - 7 (1 bit)
access : read-write
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