\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :
Clcok Control
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NFCKS : NFCKS
bits : 0 - 2 (3 bit)
access : read-write
EnableControl
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NFEN0 : NFEN0
bits : 0 - 0 (1 bit)
access : read-write
NFEN1 : NFEN1
bits : 1 - 1 (1 bit)
access : read-write
NFEN2 : NFEN2
bits : 2 - 2 (1 bit)
access : read-write
NFEN3 : NFEN3
bits : 3 - 3 (1 bit)
access : read-write
NFEN4 : NFEN4
bits : 4 - 4 (1 bit)
access : read-write
NFEN5 : NFEN5
bits : 5 - 5 (1 bit)
access : read-write
NFEN6 : NFEN6
bits : 6 - 6 (1 bit)
access : read-write
NFEN7 : NFEN7
bits : 7 - 7 (1 bit)
access : read-write
NFEN8 : NFEN8
bits : 8 - 8 (1 bit)
access : read-write
NFEN9 : NFEN9
bits : 9 - 9 (1 bit)
access : read-write
NFENA : NFENA
bits : 10 - 10 (1 bit)
access : read-write
NFENB : NFENB
bits : 11 - 11 (1 bit)
access : read-write
NFENC : NFENC
bits : 12 - 12 (1 bit)
access : read-write
NFEND : NFEND
bits : 13 - 13 (1 bit)
access : read-write
NFENE : NFENE
bits : 14 - 14 (1 bit)
access : read-write
NFENF : NFENF
bits : 15 - 15 (1 bit)
access : read-write
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