\n
address_offset : 0x0 Bytes (0x0)
size : 0x58 byte (0x0)
mem_usage : registers
protection :
MPT Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTMODE : MTMODE
bits : 0 - 0 (1 bit)
access : read-write
MTHALT : MTHALT
bits : 6 - 6 (1 bit)
access : read-write
MTEN : MTEN
bits : 7 - 7 (1 bit)
access : read-write
MPT Flip-Flop Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTTBFF0C : MTTBFF0C
bits : 0 - 1 (2 bit)
access : read-write
MTTBE0T1 : MTTBE0T1
bits : 2 - 2 (1 bit)
access : read-write
MTTBE1T1 : MTTBE1T1
bits : 3 - 3 (1 bit)
access : read-write
MTTBC0T1 : MTTBC0T1
bits : 4 - 4 (1 bit)
access : read-write
MTTBC1T1 : MTTBC1T1
bits : 5 - 5 (1 bit)
access : read-write
MPT Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MTTBINTTB0 : MTTBINTTB0
bits : 0 - 0 (1 bit)
access : read-only
MTTBINTTB1 : MTTBINTTB1
bits : 1 - 1 (1 bit)
access : read-only
MTTBINTTBOF : MTTBINTTBOF
bits : 2 - 2 (1 bit)
access : read-only
MPT Interrupt Mask Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTTBIM0 : MTTBIM0
bits : 0 - 0 (1 bit)
access : read-write
MTTBIM1 : MTTBIM1
bits : 1 - 1 (1 bit)
access : read-write
MTTBIMOF : MTTBIMOF
bits : 2 - 2 (1 bit)
access : read-write
MPT Read Capture Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MTUC : MTUC
bits : 0 - 15 (16 bit)
access : read-only
MPT RG0 Timer Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTRG0 : MTRG0
bits : 0 - 15 (16 bit)
access : read-write
MPT RG1 Timer Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTRG1 : MTRG1
bits : 0 - 15 (16 bit)
access : read-write
MPT CP0 Capture Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MTCP0 : MTCP0
bits : 0 - 15 (16 bit)
access : read-only
MPT CP1 Capture Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MTCP1 : MTCP1
bits : 0 - 15 (16 bit)
access : read-only
IGBT Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGCLK : IGCLK
bits : 0 - 1 (2 bit)
access : read-write
IGSTA : IGSTA
bits : 2 - 3 (2 bit)
access : read-write
IGSTP : IGSTP
bits : 4 - 5 (2 bit)
access : read-write
IGSNGL : IGSNGL
bits : 6 - 6 (1 bit)
access : read-write
IGPRD : IGPRD
bits : 8 - 9 (2 bit)
access : read-write
IGIDIS : IGIDIS
bits : 10 - 10 (1 bit)
access : read-write
IGBT Timer Restart Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IGRESTA : IGRESTA
bits : 0 - 0 (1 bit)
access : write-only
IGBT Timer Status Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IGST : IGST
bits : 0 - 0 (1 bit)
access : read-only
IGBT Input Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGNCSEL : IGNCSEL
bits : 0 - 3 (4 bit)
access : read-write
IGTRGSEL : IGTRGSEL
bits : 6 - 6 (1 bit)
access : read-write
IGTRGM : IGTRGM
bits : 7 - 7 (1 bit)
access : read-write
MPT RUN Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTRUN : MTRUN
bits : 0 - 0 (1 bit)
access : read-write
MTPRUN : MTPRUN
bits : 2 - 2 (1 bit)
access : read-write
IGBT Output Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGOEN0 : IGOEN0
bits : 0 - 0 (1 bit)
access : read-write
IGOEN1 : IGOEN1
bits : 1 - 1 (1 bit)
access : read-write
IGPOL0 : IGPOL0
bits : 4 - 4 (1 bit)
access : read-write
IGPOL1 : IGPOL1
bits : 5 - 5 (1 bit)
access : read-write
IGBT RG2 Timer Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGRG2 : IGRG2
bits : 0 - 15 (16 bit)
access : read-write
IGBT RG3 Timer Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGRG3 : IGRG3
bits : 0 - 15 (16 bit)
access : read-write
IGBT RG4 Timer Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGRG4 : IGRG4
bits : 0 - 15 (16 bit)
access : read-write
IGBT EMG Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IGEMGEN : IGEMGEN
bits : 0 - 0 (1 bit)
access : read-write
IGEMGOC : IGEMGOC
bits : 1 - 1 (1 bit)
access : read-write
IGEMGRS : IGEMGRS
bits : 2 - 2 (1 bit)
access : write-only
IGEMGCNT : IGEMGCNT
bits : 4 - 7 (4 bit)
access : read-write
IGBT EMG Status Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IGEMGST : IGEMGST
bits : 0 - 0 (1 bit)
access : read-only
IGEMGIN : IGEMGIN
bits : 1 - 1 (1 bit)
access : read-only
MPT Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTTBCSSEL : MTTBCSSEL
bits : 0 - 0 (1 bit)
access : read-write
MTTBTRGSEL : MTTBTRGSEL
bits : 1 - 1 (1 bit)
access : read-write
MTI2TB : MTI2TB
bits : 3 - 3 (1 bit)
access : read-write
MTTBWBF : MTTBWBF
bits : 7 - 7 (1 bit)
access : read-write
MPT Mode Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MTTBCLK : MTTBCLK
bits : 0 - 1 (2 bit)
access : read-write
MTTBCLE : MTTBCLE
bits : 2 - 2 (1 bit)
access : read-write
MTTBCPM : MTTBCPM
bits : 3 - 4 (2 bit)
access : read-write
MTTBCP : MTTBCP
bits : 5 - 5 (1 bit)
access : write-only
MTTBRSWR : MTTBRSWR
bits : 6 - 6 (1 bit)
access : read-write
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