\n
address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :
LVD control register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VD1LVL : VD1LVL
bits : 0 - 1 (2 bit)
access : read-write
VD2LVL : VD2LVL
bits : 4 - 5 (2 bit)
access : read-write
VD1EN : VD1EN
bits : 8 - 8 (1 bit)
access : read-write
VD2EN : VD2EN
bits : 9 - 9 (1 bit)
access : read-write
VD1MOD : VD1MOD
bits : 10 - 10 (1 bit)
access : read-write
VD2MOD : VD2MOD
bits : 11 - 11 (1 bit)
access : read-write
LVD status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
LVDST1 : LVDST1
bits : 0 - 0 (1 bit)
access : read-only
LVDST2 : LVDST2
bits : 1 - 1 (1 bit)
access : read-only
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