\n

LVD

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

Registers

CR1

ST1


CR1

LVD control register 1
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR1 CR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VD1LVL VD2LVL VD1EN VD2EN VD1MOD VD2MOD

VD1LVL : VD1LVL
bits : 0 - 1 (2 bit)
access : read-write

VD2LVL : VD2LVL
bits : 4 - 5 (2 bit)
access : read-write

VD1EN : VD1EN
bits : 8 - 8 (1 bit)
access : read-write

VD2EN : VD2EN
bits : 9 - 9 (1 bit)
access : read-write

VD1MOD : VD1MOD
bits : 10 - 10 (1 bit)
access : read-write

VD2MOD : VD2MOD
bits : 11 - 11 (1 bit)
access : read-write


ST1

LVD status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

ST1 ST1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LVDST1 LVDST2

LVDST1 : LVDST1
bits : 0 - 0 (1 bit)
access : read-only

LVDST2 : LVDST2
bits : 1 - 1 (1 bit)
access : read-only



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.