\n

DNFA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection :

Registers

CKCR

ENCR


CKCR

DNF clock Control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKCR CKCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NFCKS

NFCKS : NFCKS
bits : 0 - 2 (3 bit)
access : read-write


ENCR

DNF Enable register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ENCR ENCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NFEN0 NFEN1 NFEN2 NFEN3 NFEN4 NFEN5 NFEN6 NFEN7 NFEN8 NFEN9 NFEN10 NFEN11 NFEN12 NFEN13 NFEN14 NFEN15

NFEN0 : NFEN0
bits : 0 - 0 (1 bit)
access : read-write

NFEN1 : NFEN1
bits : 1 - 1 (1 bit)
access : read-write

NFEN2 : NFEN2
bits : 2 - 2 (1 bit)
access : read-write

NFEN3 : NFEN3
bits : 3 - 3 (1 bit)
access : read-write

NFEN4 : NFEN4
bits : 4 - 4 (1 bit)
access : read-write

NFEN5 : NFEN5
bits : 5 - 5 (1 bit)
access : read-write

NFEN6 : NFEN6
bits : 6 - 6 (1 bit)
access : read-write

NFEN7 : NFEN7
bits : 7 - 7 (1 bit)
access : read-write

NFEN8 : NFEN8
bits : 8 - 8 (1 bit)
access : read-write

NFEN9 : NFEN9
bits : 9 - 9 (1 bit)
access : read-write

NFEN10 : NFEN10
bits : 10 - 10 (1 bit)
access : read-write

NFEN11 : NFEN11
bits : 11 - 11 (1 bit)
access : read-write

NFEN12 : NFEN12
bits : 12 - 12 (1 bit)
access : read-write

NFEN13 : NFEN13
bits : 13 - 13 (1 bit)
access : read-write

NFEN14 : NFEN14
bits : 14 - 14 (1 bit)
access : read-write

NFEN15 : NFEN15
bits : 15 - 15 (1 bit)
access : read-write



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