\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
power control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPDS : Low-power deep sleep
bits : 0 - 0 (1 bit)
PDDS : Power down deepsleep
bits : 1 - 1 (1 bit)
CWUF : Clear wakeup flag
bits : 2 - 2 (1 bit)
CSBF : Clear standby flag
bits : 3 - 3 (1 bit)
DBP : Disable backup domain write protection
bits : 8 - 8 (1 bit)
power control/status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WUF : Wakeup flag
bits : 0 - 0 (1 bit)
access : read-only
SBF : Standby flag
bits : 1 - 1 (1 bit)
access : read-only
EWUP1 : Enable WKUP pin 1
bits : 8 - 8 (1 bit)
access : read-write
EWUP2 : Enable WKUP pin 2
bits : 9 - 9 (1 bit)
access : read-write
EWUP4 : Enable WKUP pin 4
bits : 11 - 11 (1 bit)
access : read-write
EWUP5 : Enable WKUP pin 5
bits : 12 - 12 (1 bit)
access : read-write
EWUP6 : Enable WKUP pin 6
bits : 13 - 13 (1 bit)
access : read-write
EWUP7 : Enable WKUP pin 7
bits : 14 - 14 (1 bit)
access : read-write
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.