\n

OPAMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x3C8 byte (0x0)
mem_usage : registers
protection :

Registers

OPAMP1_CR

OPAMP2_CR

OPAMP3_CR

OPAMP4_CR


OPAMP1_CR

OPAMP1 control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP1_CR OPAMP1_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAMP1_EN FORCE_VP VP_SEL VM_SEL TCM_EN VMS_SEL VPS_SEL CALON CALSEL PGA_GAIN USER_TRIM TRIMOFFSETP TRIMOFFSETN TSTREF OUTCAL LOCK

OPAMP1_EN : OPAMP1 enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write

VP_SEL : OPAMP1 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write

VM_SEL : OPAMP1 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write

VMS_SEL : OPAMP1 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write

VPS_SEL : OPAMP1 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write

CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write

CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write

USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write

TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write

TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write

OUTCAL : OPAMP 1 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only

LOCK : OPAMP 1 lock
bits : 31 - 31 (1 bit)
access : read-write


OPAMP2_CR

OPAMP2 control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP2_CR OPAMP2_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAMP2EN FORCE_VP VP_SEL VM_SEL TCM_EN VMS_SEL VPS_SEL CALON CAL_SEL PGA_GAIN USER_TRIM TRIMOFFSETP TRIMOFFSETN TSTREF OUTCAL LOCK

OPAMP2EN : OPAMP2 enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write

VP_SEL : OPAMP2 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write

VM_SEL : OPAMP2 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write

VMS_SEL : OPAMP2 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write

VPS_SEL : OPAMP2 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write

CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write

CAL_SEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write

USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write

TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write

TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write

OUTCAL : OPAMP 2 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only

LOCK : OPAMP 2 lock
bits : 31 - 31 (1 bit)
access : read-write


OPAMP3_CR

OPAMP3 control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP3_CR OPAMP3_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAMP3EN FORCE_VP VP_SEL VM_SEL TCM_EN VMS_SEL VPS_SEL CALON CALSEL PGA_GAIN USER_TRIM TRIMOFFSETP TRIMOFFSETN TSTREF OUTCAL LOCK

OPAMP3EN : OPAMP3 enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write

VP_SEL : OPAMP3 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write

VM_SEL : OPAMP3 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write

VMS_SEL : OPAMP3 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write

VPS_SEL : OPAMP3 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write

CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write

CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write

USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write

TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write

TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write

OUTCAL : OPAMP 3 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only

LOCK : OPAMP 3 lock
bits : 31 - 31 (1 bit)
access : read-write


OPAMP4_CR

OPAMP4 control register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPAMP4_CR OPAMP4_CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OPAMP4EN FORCE_VP VP_SEL VM_SEL TCM_EN VMS_SEL VPS_SEL CALON CALSEL PGA_GAIN USER_TRIM TRIMOFFSETP TRIMOFFSETN TSTREF OUTCAL LOCK

OPAMP4EN : OPAMP4 enable
bits : 0 - 0 (1 bit)
access : read-write

FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write

VP_SEL : OPAMP4 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write

VM_SEL : OPAMP4 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write

TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write

VMS_SEL : OPAMP4 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write

VPS_SEL : OPAMP4 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write

CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write

CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write

PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write

USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write

TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write

TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write

TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write

OUTCAL : OPAMP 4 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only

LOCK : OPAMP 4 lock
bits : 31 - 31 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.