\n
address_offset : 0x0 Bytes (0x0)
size : 0x3C8 byte (0x0)
mem_usage : registers
protection :
OPAMP1 control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAMP1_EN : OPAMP1 enable
bits : 0 - 0 (1 bit)
access : read-write
FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write
VP_SEL : OPAMP1 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write
VM_SEL : OPAMP1 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write
TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write
VMS_SEL : OPAMP1 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write
VPS_SEL : OPAMP1 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write
CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write
CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write
PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write
USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write
TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write
TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write
TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write
OUTCAL : OPAMP 1 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only
LOCK : OPAMP 1 lock
bits : 31 - 31 (1 bit)
access : read-write
OPAMP2 control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAMP2EN : OPAMP2 enable
bits : 0 - 0 (1 bit)
access : read-write
FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write
VP_SEL : OPAMP2 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write
VM_SEL : OPAMP2 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write
TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write
VMS_SEL : OPAMP2 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write
VPS_SEL : OPAMP2 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write
CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write
CAL_SEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write
PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write
USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write
TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write
TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write
TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write
OUTCAL : OPAMP 2 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only
LOCK : OPAMP 2 lock
bits : 31 - 31 (1 bit)
access : read-write
OPAMP3 control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAMP3EN : OPAMP3 enable
bits : 0 - 0 (1 bit)
access : read-write
FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write
VP_SEL : OPAMP3 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write
VM_SEL : OPAMP3 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write
TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write
VMS_SEL : OPAMP3 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write
VPS_SEL : OPAMP3 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write
CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write
CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write
PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write
USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write
TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write
TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write
TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write
OUTCAL : OPAMP 3 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only
LOCK : OPAMP 3 lock
bits : 31 - 31 (1 bit)
access : read-write
OPAMP4 control register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPAMP4EN : OPAMP4 enable
bits : 0 - 0 (1 bit)
access : read-write
FORCE_VP : FORCE_VP
bits : 1 - 1 (1 bit)
access : read-write
VP_SEL : OPAMP4 Non inverting input selection
bits : 2 - 3 (2 bit)
access : read-write
VM_SEL : OPAMP4 inverting input selection
bits : 5 - 6 (2 bit)
access : read-write
TCM_EN : Timer controlled Mux mode enable
bits : 7 - 7 (1 bit)
access : read-write
VMS_SEL : OPAMP4 inverting input secondary selection
bits : 8 - 8 (1 bit)
access : read-write
VPS_SEL : OPAMP4 Non inverting input secondary selection
bits : 9 - 10 (2 bit)
access : read-write
CALON : Calibration mode enable
bits : 11 - 11 (1 bit)
access : read-write
CALSEL : Calibration selection
bits : 12 - 13 (2 bit)
access : read-write
PGA_GAIN : Gain in PGA mode
bits : 14 - 17 (4 bit)
access : read-write
USER_TRIM : User trimming enable
bits : 18 - 18 (1 bit)
access : read-write
TRIMOFFSETP : Offset trimming value (PMOS)
bits : 19 - 23 (5 bit)
access : read-write
TRIMOFFSETN : Offset trimming value (NMOS)
bits : 24 - 28 (5 bit)
access : read-write
TSTREF : TSTREF
bits : 29 - 29 (1 bit)
access : read-write
OUTCAL : OPAMP 4 ouput status flag
bits : 30 - 30 (1 bit)
access : read-only
LOCK : OPAMP 4 lock
bits : 31 - 31 (1 bit)
access : read-write
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