\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
Flash access control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LATENCY : Latency
bits : 0 - 2 (3 bit)
access : read-write
PRFTEN : Prefetch enable
bits : 8 - 8 (1 bit)
access : read-write
ICEN : Instruction cache enable
bits : 9 - 9 (1 bit)
access : read-write
DCEN : Data cache enable
bits : 10 - 10 (1 bit)
access : read-write
ICRST : Instruction cache reset
bits : 11 - 11 (1 bit)
access : write-only
DCRST : Data cache reset
bits : 12 - 12 (1 bit)
access : read-write
Control register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG : Programming
bits : 0 - 0 (1 bit)
SER : Sector Erase
bits : 1 - 1 (1 bit)
MER : Mass Erase of sectors 0 to 11
bits : 2 - 2 (1 bit)
SNB : Sector number
bits : 3 - 7 (5 bit)
PSIZE : Program size
bits : 8 - 9 (2 bit)
MER1 : Mass Erase of sectors 12 to 23
bits : 15 - 15 (1 bit)
STRT : Start
bits : 16 - 16 (1 bit)
EOPIE : End of operation interrupt enable
bits : 24 - 24 (1 bit)
ERRIE : Error interrupt enable
bits : 25 - 25 (1 bit)
LOCK : Lock
bits : 31 - 31 (1 bit)
Flash option control register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OPTLOCK : Option lock
bits : 0 - 0 (1 bit)
OPTSTRT : Option start
bits : 1 - 1 (1 bit)
BOR_LEV : BOR reset Level
bits : 2 - 3 (2 bit)
WDG_SW : WDG_SW User option bytes
bits : 5 - 5 (1 bit)
nRST_STOP : nRST_STOP User option bytes
bits : 6 - 6 (1 bit)
nRST_STDBY : nRST_STDBY User option bytes
bits : 7 - 7 (1 bit)
RDP : Read protect
bits : 8 - 15 (8 bit)
nWRP : Not write protect
bits : 16 - 27 (12 bit)
DB1M : Dual-bank on 1 Mbyte Flash memory devices
bits : 30 - 30 (1 bit)
SPRMOD : Selection of protection mode for nWPRi bits
bits : 31 - 31 (1 bit)
Flash option control register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
nWRP : Not write protect
bits : 16 - 27 (12 bit)
Flash key register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
KEY : FPEC key
bits : 0 - 31 (32 bit)
Flash option key register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OPTKEY : Option byte key
bits : 0 - 31 (32 bit)
Status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EOP : End of operation
bits : 0 - 0 (1 bit)
access : read-write
OPERR : Operation error
bits : 1 - 1 (1 bit)
access : read-write
WRPERR : Write protection error
bits : 4 - 4 (1 bit)
access : read-write
PGAERR : Programming alignment error
bits : 5 - 5 (1 bit)
access : read-write
PGPERR : Programming parallelism error
bits : 6 - 6 (1 bit)
access : read-write
PGSERR : Programming sequence error
bits : 7 - 7 (1 bit)
access : read-write
BSY : Busy
bits : 16 - 16 (1 bit)
access : read-only
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