\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
OTG_HS device configuration register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DSPD : Device speed
bits : 0 - 1 (2 bit)
NZLSOHSK : Nonzero-length status OUT handshake
bits : 2 - 2 (1 bit)
DAD : Device address
bits : 4 - 10 (7 bit)
PFIVL : Periodic (micro)frame interval
bits : 11 - 12 (2 bit)
PERSCHIVL : Periodic scheduling interval
bits : 24 - 25 (2 bit)
OTG_HS device IN endpoint common interrupt mask register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRCM : Transfer completed interrupt mask
bits : 0 - 0 (1 bit)
EPDM : Endpoint disabled interrupt mask
bits : 1 - 1 (1 bit)
TOM : Timeout condition mask (nonisochronous endpoints)
bits : 3 - 3 (1 bit)
ITTXFEMSK : IN token received when TxFIFO empty mask
bits : 4 - 4 (1 bit)
INEPNMM : IN token received with EP mismatch mask
bits : 5 - 5 (1 bit)
INEPNEM : IN endpoint NAK effective mask
bits : 6 - 6 (1 bit)
TXFURM : FIFO underrun mask
bits : 8 - 8 (1 bit)
BIM : BNA interrupt mask
bits : 9 - 9 (1 bit)
OTG device endpoint-0 control register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-0 interrupt register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device IN endpoint 0 transfer size register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 6 (7 bit)
PKTCNT : Packet count
bits : 19 - 20 (2 bit)
OTG_HS device endpoint-1 DMA address register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAADDR : DMA address
bits : 0 - 31 (32 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG device endpoint-1 control register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-1 interrupt register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device endpoint-2 DMA address register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAADDR : DMA address
bits : 0 - 31 (32 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG_HS device OUT endpoint common interrupt mask register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRCM : Transfer completed interrupt mask
bits : 0 - 0 (1 bit)
EPDM : Endpoint disabled interrupt mask
bits : 1 - 1 (1 bit)
STUPM : SETUP phase done mask
bits : 3 - 3 (1 bit)
OTEPDM : OUT token received when endpoint disabled mask
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received mask
bits : 6 - 6 (1 bit)
OPEM : OUT packet error mask
bits : 8 - 8 (1 bit)
BOIM : BNA interrupt mask
bits : 9 - 9 (1 bit)
OTG device endpoint-2 control register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-2 interrupt register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device endpoint-3 DMA address register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAADDR : DMA address
bits : 0 - 31 (32 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG device endpoint-3 control register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-3 interrupt register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device endpoint-4 DMA address register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAADDR : DMA address
bits : 0 - 31 (32 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG_HS device all endpoints interrupt register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IEPINT : IN endpoint interrupt bits
bits : 0 - 15 (16 bit)
OEPINT : OUT endpoint interrupt bits
bits : 16 - 31 (16 bit)
OTG device endpoint-4 control register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-4 interrupt register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x190 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device endpoint-5 DMA address register
address_offset : 0x194 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMAADDR : DMA address
bits : 0 - 31 (32 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x198 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG device endpoint-5 control register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x1A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : OTG_HS_DIEPCTL5
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x1A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG device endpoint-5 interrupt register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device endpoint transfer size register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : OTG_HS_DIEPINT5
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x1AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG_HS device endpoint transfer size register
address_offset : 0x1B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
MCNT : Multi count
bits : 29 - 30 (2 bit)
OTG_HS device IN endpoint transmit FIFO status register
address_offset : 0x1B8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INEPTFSAV : IN endpoint TxFIFO space avail
bits : 0 - 15 (16 bit)
OTG_HS all endpoints interrupt mask register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IEPM : IN EP interrupt mask bits
bits : 0 - 15 (16 bit)
OEPM : OUT EP interrupt mask bits
bits : 16 - 31 (16 bit)
OTG device endpoint-6 control register
address_offset : 0x1C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-6 interrupt register
address_offset : 0x1C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG device endpoint-7 control register
address_offset : 0x1E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even/odd frame
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
TXFNUM : TxFIFO number
bits : 22 - 25 (4 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG device endpoint-7 interrupt register
address_offset : 0x1E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
access : read-write
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
access : read-write
TOC : Timeout condition
bits : 3 - 3 (1 bit)
access : read-write
ITTXFE : IN token received when TxFIFO is empty
bits : 4 - 4 (1 bit)
access : read-write
INEPNE : IN endpoint NAK effective
bits : 6 - 6 (1 bit)
access : read-write
TXFE : Transmit FIFO empty
bits : 7 - 7 (1 bit)
access : read-only
TXFIFOUDRN : Transmit Fifo Underrun
bits : 8 - 8 (1 bit)
access : read-write
BNA : Buffer not available interrupt
bits : 9 - 9 (1 bit)
access : read-write
PKTDRPSTS : Packet dropped status
bits : 11 - 11 (1 bit)
access : read-write
BERR : Babble error interrupt
bits : 12 - 12 (1 bit)
access : read-write
NAK : NAK interrupt
bits : 13 - 13 (1 bit)
access : read-write
OTG_HS device VBUS discharge time register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VBUSDT : Device VBUS discharge time
bits : 0 - 15 (16 bit)
OTG_HS device VBUS pulsing time register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DVBUSP : Device VBUS pulsing time
bits : 0 - 11 (12 bit)
OTG_HS Device threshold control register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NONISOTHREN : Nonisochronous IN endpoints threshold enable
bits : 0 - 0 (1 bit)
ISOTHREN : ISO IN endpoint threshold enable
bits : 1 - 1 (1 bit)
TXTHRLEN : Transmit threshold length
bits : 2 - 10 (9 bit)
RXTHREN : Receive threshold enable
bits : 16 - 16 (1 bit)
RXTHRLEN : Receive threshold length
bits : 17 - 25 (9 bit)
ARPEN : Arbiter parking enable
bits : 27 - 27 (1 bit)
OTG_HS device control OUT endpoint 0 control register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 1 (2 bit)
access : read-only
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-only
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-only
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : write-only
OTG_HS device endpoint-0 interrupt register
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-0 transfer size register
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 6 (7 bit)
PKTCNT : Packet count
bits : 19 - 19 (1 bit)
STUPCNT : SETUP packet count
bits : 29 - 30 (2 bit)
OTG device endpoint-1 control register
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-1 interrupt register
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-1 transfer size register
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG_HS device IN endpoint FIFO empty interrupt mask register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
INEPTXFEM : IN EP Tx FIFO empty interrupt mask bits
bits : 0 - 15 (16 bit)
OTG device endpoint-2 control register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-2 interrupt register
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-2 transfer size register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG device endpoint-3 control register
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-3 interrupt register
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-3 transfer size register
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG_HS device each endpoint interrupt register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IEP1INT : IN endpoint 1interrupt bit
bits : 1 - 1 (1 bit)
OEP1INT : OUT endpoint 1 interrupt bit
bits : 17 - 17 (1 bit)
OTG device endpoint-4 control register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-4 interrupt register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-4 transfer size register
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG device endpoint-5 control register
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-5 interrupt register
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-5 transfer size register
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG_HS device each endpoint interrupt register mask
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IEP1INTM : IN Endpoint 1 interrupt mask bit
bits : 1 - 1 (1 bit)
OEP1INTM : OUT Endpoint 1 interrupt mask bit
bits : 17 - 17 (1 bit)
OTG device endpoint-6 control register
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-6 interrupt register
address_offset : 0x3C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-6 transfer size register
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG device endpoint-7 control register
address_offset : 0x3E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPSIZ : Maximum packet size
bits : 0 - 10 (11 bit)
access : read-write
USBAEP : USB active endpoint
bits : 15 - 15 (1 bit)
access : read-write
EONUM_DPID : Even odd frame/Endpoint data PID
bits : 16 - 16 (1 bit)
access : read-only
NAKSTS : NAK status
bits : 17 - 17 (1 bit)
access : read-only
EPTYP : Endpoint type
bits : 18 - 19 (2 bit)
access : read-write
SNPM : Snoop mode
bits : 20 - 20 (1 bit)
access : read-write
Stall : STALL handshake
bits : 21 - 21 (1 bit)
access : read-write
CNAK : Clear NAK
bits : 26 - 26 (1 bit)
access : write-only
SNAK : Set NAK
bits : 27 - 27 (1 bit)
access : write-only
SD0PID_SEVNFRM : Set DATA0 PID/Set even frame
bits : 28 - 28 (1 bit)
access : write-only
SODDFRM : Set odd frame
bits : 29 - 29 (1 bit)
access : write-only
EPDIS : Endpoint disable
bits : 30 - 30 (1 bit)
access : read-write
EPENA : Endpoint enable
bits : 31 - 31 (1 bit)
access : read-write
OTG_HS device endpoint-7 interrupt register
address_offset : 0x3E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRC : Transfer completed interrupt
bits : 0 - 0 (1 bit)
EPDISD : Endpoint disabled interrupt
bits : 1 - 1 (1 bit)
STUP : SETUP phase done
bits : 3 - 3 (1 bit)
OTEPDIS : OUT token received when endpoint disabled
bits : 4 - 4 (1 bit)
B2BSTUP : Back-to-back SETUP packets received
bits : 6 - 6 (1 bit)
NYET : NYET interrupt
bits : 14 - 14 (1 bit)
OTG_HS device endpoint-7 transfer size register
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
XFRSIZ : Transfer size
bits : 0 - 18 (19 bit)
PKTCNT : Packet count
bits : 19 - 28 (10 bit)
RXDPID_STUPCNT : Received data PID/SETUP packet count
bits : 29 - 30 (2 bit)
OTG_HS device control register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RWUSIG : Remote wakeup signaling
bits : 0 - 0 (1 bit)
access : read-write
SDIS : Soft disconnect
bits : 1 - 1 (1 bit)
access : read-write
GINSTS : Global IN NAK status
bits : 2 - 2 (1 bit)
access : read-only
GONSTS : Global OUT NAK status
bits : 3 - 3 (1 bit)
access : read-only
TCTL : Test control
bits : 4 - 6 (3 bit)
access : read-write
SGINAK : Set global IN NAK
bits : 7 - 7 (1 bit)
access : write-only
CGINAK : Clear global IN NAK
bits : 8 - 8 (1 bit)
access : write-only
SGONAK : Set global OUT NAK
bits : 9 - 9 (1 bit)
access : write-only
CGONAK : Clear global OUT NAK
bits : 10 - 10 (1 bit)
access : write-only
POPRGDNE : Power-on programming done
bits : 11 - 11 (1 bit)
access : read-write
OTG_HS device status register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SUSPSTS : Suspend status
bits : 0 - 0 (1 bit)
ENUMSPD : Enumerated speed
bits : 1 - 2 (2 bit)
EERR : Erratic error
bits : 3 - 3 (1 bit)
FNSOF : Frame number of the received SOF
bits : 8 - 21 (14 bit)
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