Ethernet

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x100 byte (0x0)
mem_usage : registers
protection :

Registers

add a new register to this peripheral

MACCR

MACMIIAR

MACMIIDR

MACFCR

MACVLANTR

MACPMTCSR

MACDBGR

MACSR

MACIMR

MACFFR

MACA0HR

MACA0LR

MACA1HR

MACA1LR

MACA2HR

MACA2LR

MACA3HR

MACA3LR

MACRWUFFER

MACHTHR

MACHTLR


MACCR

Ethernet MAC configuration register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACCR MACCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RE TE DC BL APCS RD IPCO DM LM ROD FES CSD IFG JD WD CSTF

RE : RE
bits : 2 - 2 (1 bit)

TE : TE
bits : 3 - 3 (1 bit)

DC : DC
bits : 4 - 4 (1 bit)

BL : BL
bits : 5 - 6 (2 bit)

APCS : APCS
bits : 7 - 7 (1 bit)

RD : RD
bits : 9 - 9 (1 bit)

IPCO : IPCO
bits : 10 - 10 (1 bit)

DM : DM
bits : 11 - 11 (1 bit)

LM : LM
bits : 12 - 12 (1 bit)

ROD : ROD
bits : 13 - 13 (1 bit)

FES : FES
bits : 14 - 14 (1 bit)

CSD : CSD
bits : 16 - 16 (1 bit)

IFG : IFG
bits : 17 - 19 (3 bit)

JD : JD
bits : 22 - 22 (1 bit)

WD : WD
bits : 23 - 23 (1 bit)

CSTF : CSTF
bits : 25 - 25 (1 bit)


MACMIIAR

Ethernet MAC MII address register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACMIIAR MACMIIAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MB MW CR MR PA

MB : MB
bits : 0 - 0 (1 bit)

MW : MW
bits : 1 - 1 (1 bit)

CR : CR
bits : 2 - 4 (3 bit)

MR : MR
bits : 6 - 10 (5 bit)

PA : PA
bits : 11 - 15 (5 bit)


MACMIIDR

Ethernet MAC MII data register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACMIIDR MACMIIDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TD

TD : TD
bits : 0 - 15 (16 bit)


MACFCR

Ethernet MAC flow control register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACFCR MACFCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FCB TFCE RFCE UPFD PLT ZQPD PT

FCB : FCB
bits : 0 - 0 (1 bit)

TFCE : TFCE
bits : 1 - 1 (1 bit)

RFCE : RFCE
bits : 2 - 2 (1 bit)

UPFD : UPFD
bits : 3 - 3 (1 bit)

PLT : PLT
bits : 4 - 5 (2 bit)

ZQPD : ZQPD
bits : 7 - 7 (1 bit)

PT : PT
bits : 16 - 31 (16 bit)


MACVLANTR

Ethernet MAC VLAN tag register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACVLANTR MACVLANTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VLANTI VLANTC

VLANTI : VLANTI
bits : 0 - 15 (16 bit)

VLANTC : VLANTC
bits : 16 - 16 (1 bit)


MACPMTCSR

Ethernet MAC PMT control and status register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACPMTCSR MACPMTCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PD MPE WFE MPR WFR GU WFFRPR

PD : PD
bits : 0 - 0 (1 bit)

MPE : MPE
bits : 1 - 1 (1 bit)

WFE : WFE
bits : 2 - 2 (1 bit)

MPR : MPR
bits : 5 - 5 (1 bit)

WFR : WFR
bits : 6 - 6 (1 bit)

GU : GU
bits : 9 - 9 (1 bit)

WFFRPR : WFFRPR
bits : 31 - 31 (1 bit)


MACDBGR

Ethernet MAC debug register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MACDBGR MACDBGR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CR CSR ROR MCF MCP MCFHP

CR : CR
bits : 0 - 0 (1 bit)

CSR : CSR
bits : 1 - 1 (1 bit)

ROR : ROR
bits : 2 - 2 (1 bit)

MCF : MCF
bits : 3 - 3 (1 bit)

MCP : MCP
bits : 4 - 4 (1 bit)

MCFHP : MCFHP
bits : 5 - 5 (1 bit)


MACSR

Ethernet MAC interrupt status register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACSR MACSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PMTS MMCS MMCRS MMCTS TSTS

PMTS : PMTS
bits : 3 - 3 (1 bit)
access : read-only

MMCS : MMCS
bits : 4 - 4 (1 bit)
access : read-only

MMCRS : MMCRS
bits : 5 - 5 (1 bit)
access : read-only

MMCTS : MMCTS
bits : 6 - 6 (1 bit)
access : read-only

TSTS : TSTS
bits : 9 - 9 (1 bit)
access : read-write


MACIMR

Ethernet MAC interrupt mask register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACIMR MACIMR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PMTIM TSTIM

PMTIM : PMTIM
bits : 3 - 3 (1 bit)

TSTIM : TSTIM
bits : 9 - 9 (1 bit)


MACFFR

Ethernet MAC frame filter register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACFFR MACFFR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PM HU HM DAIF RAM BFD PCF SAIF SAF HPF RA

PM : PM
bits : 0 - 0 (1 bit)

HU : HU
bits : 1 - 1 (1 bit)

HM : HM
bits : 2 - 2 (1 bit)

DAIF : DAIF
bits : 3 - 3 (1 bit)

RAM : RAM
bits : 4 - 4 (1 bit)

BFD : BFD
bits : 5 - 5 (1 bit)

PCF : PCF
bits : 6 - 6 (1 bit)

SAIF : SAIF
bits : 7 - 7 (1 bit)

SAF : SAF
bits : 8 - 8 (1 bit)

HPF : HPF
bits : 9 - 9 (1 bit)

RA : RA
bits : 31 - 31 (1 bit)


MACA0HR

Ethernet MAC address 0 high register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA0HR MACA0HR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA0H MO

MACA0H : MAC address0 high
bits : 0 - 15 (16 bit)
access : read-write

MO : Always 1
bits : 31 - 31 (1 bit)
access : read-only


MACA0LR

Ethernet MAC address 0 low register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA0LR MACA0LR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA0L

MACA0L : 0
bits : 0 - 31 (32 bit)


MACA1HR

Ethernet MAC address 1 high register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA1HR MACA1HR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA1H MBC SA AE

MACA1H : MACA1H
bits : 0 - 15 (16 bit)

MBC : MBC
bits : 24 - 29 (6 bit)

SA : SA
bits : 30 - 30 (1 bit)

AE : AE
bits : 31 - 31 (1 bit)


MACA1LR

Ethernet MAC address1 low register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA1LR MACA1LR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA1LR

MACA1LR : MACA1LR
bits : 0 - 31 (32 bit)


MACA2HR

Ethernet MAC address 2 high register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA2HR MACA2HR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MAC2AH MBC SA AE

MAC2AH : MAC2AH
bits : 0 - 15 (16 bit)

MBC : MBC
bits : 24 - 29 (6 bit)

SA : SA
bits : 30 - 30 (1 bit)

AE : AE
bits : 31 - 31 (1 bit)


MACA2LR

Ethernet MAC address 2 low register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA2LR MACA2LR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA2L

MACA2L : MACA2L
bits : 0 - 30 (31 bit)


MACA3HR

Ethernet MAC address 3 high register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA3HR MACA3HR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MACA3H MBC SA AE

MACA3H : MACA3H
bits : 0 - 15 (16 bit)

MBC : MBC
bits : 24 - 29 (6 bit)

SA : SA
bits : 30 - 30 (1 bit)

AE : AE
bits : 31 - 31 (1 bit)


MACA3LR

Ethernet MAC address 3 low register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACA3LR MACA3LR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MBCA3L

MBCA3L : MBCA3L
bits : 0 - 31 (32 bit)


MACRWUFFER

Ethernet MAC remote wakeup frame filter register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACRWUFFER MACRWUFFER read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MACHTHR

Ethernet MAC hash table high register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACHTHR MACHTHR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HTH

HTH : HTH
bits : 0 - 31 (32 bit)


MACHTLR

Ethernet MAC hash table low register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MACHTLR MACHTLR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HTL

HTL : HTL
bits : 0 - 31 (32 bit)



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