\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
power control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPDS : Low-power deep sleep
bits : 0 - 0 (1 bit)
PDDS : Power down deepsleep
bits : 1 - 1 (1 bit)
CSBF : Clear standby flag
bits : 3 - 3 (1 bit)
PVDE : Power voltage detector enable
bits : 4 - 4 (1 bit)
PLS : PVD level selection
bits : 5 - 7 (3 bit)
DBP : Disable backup domain write protection
bits : 8 - 8 (1 bit)
FPDS : Flash power down in Stop mode
bits : 9 - 9 (1 bit)
LPUDS : Low-power regulator in deepsleep under-drive mode
bits : 10 - 10 (1 bit)
MRUDS : Main regulator in deepsleep under-drive mode
bits : 11 - 11 (1 bit)
ADCDC1 : ADCDC1
bits : 13 - 13 (1 bit)
VOS : Regulator voltage scaling output selection
bits : 14 - 15 (2 bit)
ODEN : Over-drive enable
bits : 16 - 16 (1 bit)
ODSWEN : Over-drive switching enabled
bits : 17 - 17 (1 bit)
UDEN : Under-drive enable in stop mode
bits : 18 - 19 (2 bit)
power control/status register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WUIF : Wakeup internal flag
bits : 0 - 0 (1 bit)
access : read-only
SBF : Standby flag
bits : 1 - 1 (1 bit)
access : read-only
PVDO : PVD output
bits : 2 - 2 (1 bit)
access : read-only
BRR : Backup regulator ready
bits : 3 - 3 (1 bit)
access : read-only
BRE : Backup regulator enable
bits : 9 - 9 (1 bit)
access : read-write
VOSRDY : Regulator voltage scaling output selection ready bit
bits : 14 - 14 (1 bit)
access : read-only
ODRDY : Over-drive mode ready
bits : 16 - 16 (1 bit)
access : read-only
ODSWRDY : Over-drive mode switching ready
bits : 17 - 17 (1 bit)
access : read-only
UDRDY : Under-drive ready flag
bits : 18 - 19 (2 bit)
access : read-write
power control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CWUPF1 : Clear Wakeup Pin flag for PA0
bits : 0 - 0 (1 bit)
access : read-only
CWUPF2 : Clear Wakeup Pin flag for PA2
bits : 1 - 1 (1 bit)
access : read-only
CWUPF3 : Clear Wakeup Pin flag for PC1
bits : 2 - 2 (1 bit)
access : read-only
CWUPF4 : Clear Wakeup Pin flag for PC13
bits : 3 - 3 (1 bit)
access : read-only
CWUPF5 : Clear Wakeup Pin flag for PI8
bits : 4 - 4 (1 bit)
access : read-only
CWUPF6 : Clear Wakeup Pin flag for PI11
bits : 5 - 5 (1 bit)
access : read-only
WUPP1 : Wakeup pin polarity bit for PA0
bits : 8 - 8 (1 bit)
access : read-write
WUPP2 : Wakeup pin polarity bit for PA2
bits : 9 - 9 (1 bit)
access : read-write
WUPP3 : Wakeup pin polarity bit for PC1
bits : 10 - 10 (1 bit)
access : read-write
WUPP4 : Wakeup pin polarity bit for PC13
bits : 11 - 11 (1 bit)
access : read-write
WUPP5 : Wakeup pin polarity bit for PI8
bits : 12 - 12 (1 bit)
access : read-write
WUPP6 : Wakeup pin polarity bit for PI11
bits : 13 - 13 (1 bit)
access : read-write
power control/status register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WUPF1 : Wakeup Pin flag for PA0
bits : 0 - 0 (1 bit)
access : read-only
WUPF2 : Wakeup Pin flag for PA2
bits : 1 - 1 (1 bit)
access : read-only
WUPF3 : Wakeup Pin flag for PC1
bits : 2 - 2 (1 bit)
access : read-only
WUPF4 : Wakeup Pin flag for PC13
bits : 3 - 3 (1 bit)
access : read-only
WUPF5 : Wakeup Pin flag for PI8
bits : 4 - 4 (1 bit)
access : read-only
WUPF6 : Wakeup Pin flag for PI11
bits : 5 - 5 (1 bit)
access : read-only
EWUP1 : Enable Wakeup pin for PA0
bits : 8 - 8 (1 bit)
access : read-write
EWUP2 : Enable Wakeup pin for PA2
bits : 9 - 9 (1 bit)
access : read-write
EWUP3 : Enable Wakeup pin for PC1
bits : 10 - 10 (1 bit)
access : read-write
EWUP4 : Enable Wakeup pin for PC13
bits : 11 - 11 (1 bit)
access : read-write
EWUP5 : Enable Wakeup pin for PI8
bits : 12 - 12 (1 bit)
access : read-write
EWUP6 : Enable Wakeup pin for PI11
bits : 13 - 13 (1 bit)
access : read-write
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