FMAC_X1BUFCFG (X1BUFCFG)

FMAC_CR (CR)

FMAC_SR (SR)

FMAC_WDATA (WDATA)

FMAC_RDATA (RDATA)

FMAC_X2BUFCFG (X2BUFCFG)

FMAC_YBUFCFG (YBUFCFG)

FMAC_PARAM (PARAM)

X1_BASE : Base address of X1 buffer
bits : 0 - 7 (8 bit)
access : read-write

X1_BUF_SIZE : Allocated size of X1 buffer in 16-bit words The minimum buffer size is the number of feed-forward taps in the filter (+ the watermark threshold - 1).
bits : 8 - 15 (8 bit)
access : read-write

FULL_WM : Watermark for buffer full flag Defines the threshold for setting the X1 buffer full flag when operating in circular mode. The flag is set if the number of free spaces in the buffer is less than 2FULL_WM. 2: Threshold = 4 3: Threshold = 8 Setting a threshold greater than 1 allows several data to be transferred into the buffer under one interrupt. Threshold should be set to 1 if DMA write requests are enabled (DMAWEN = 1 in FMAC_CR register).
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

RIEN : Enable read interrupt This bit is set and cleared by software. A read returns the current state of the bit.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

WIEN : Enable write interrupt This bit is set and cleared by software. A read returns the current state of the bit.
bits : 1 - 1 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

OVFLIEN : Enable overflow error interrupts This bit is set and cleared by software. A read returns the current state of the bit.
bits : 2 - 2 (1 bit)
access : read-write

Enumeration:

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UNFLIEN : Enable underflow error interrupts This bit is set and cleared by software. A read returns the current state of the bit.
bits : 3 - 3 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

SATIEN : Enable saturation error interrupts This bit is set and cleared by software. A read returns the current state of the bit.
bits : 4 - 4 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DMAREN : Enable DMA read channel requests This bit can only be modified when START= 0 in the FMAC_PARAM register. A read returns the current state of the bit.
bits : 8 - 8 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

DMAWEN : Enable DMA write channel requests This bit can only be modified when START= 0 in the FMAC_PARAM register. A read returns the current state of the bit.
bits : 9 - 9 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

CLIPEN : Enable clipping
bits : 15 - 15 (1 bit)
access : read-write

Enumeration:

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RESET : Reset FMAC unit This resets the write and read pointers, the internal control logic, the FMAC_SR register and the FMAC_PARAM register, including the START bit if active. Other register settings are not affected. This bit is reset by hardware.
bits : 16 - 16 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.

YEMPTY : Y buffer empty flag The buffer is flagged as empty if the number of unread data is less than the EMPTY_WM threshold. The number of unread data is the difference between the read pointer and the current output destination address. This flag is set and cleared by hardware, or by a reset. Note: after the last sample is read from the Y buffer there is a delay of 3 clock cycles before the YEMPTY flag goes high. To avoid any risk of underflow it is recommended to insert a software delay after reading from the Y buffer before reading the FMAC_SR. Alternatively, an EMPTY_WM threshold of 2 can be used.
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

X1FULL : X1 buffer full flag The buffer is flagged as full if the number of available spaces is less than the FULL_WM threshold. The number of available spaces is the difference between the write pointer and the least recent sample currently in use. This flag is set and cleared by hardware, or by a reset. Note: after the last available space in the X1 buffer is filled there is a delay of 3 clock cycles before the X1FULL flag goes high. To avoid any risk of overflow it is recommended to insert a software delay after writing to the X1 buffer before reading the FMAC_SR. Alternatively, a FULL_WM threshold of 2 can be used.
bits : 1 - 1 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

OVFL : Overflow error flag An overflow occurs when a write is made to FMAC_WDATA when no free space is available in the X1 buffer. This flag is cleared by a reset of the unit.
bits : 8 - 8 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

UNFL : Underflow error flag An underflow occurs when a read is made from FMAC_RDATA when no valid data is available in the Y buffer. This flag is cleared by a reset of the unit.
bits : 9 - 9 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

SAT : Saturation error flag Saturation occurs when the result of an accumulation exceeds the numeric range of the accumulator. This flag is cleared by a reset of the unit.
bits : 10 - 10 (1 bit)
access : read-only

Enumeration:

End of enumeration elements list.

WDATA : Write data When a write access to this register occurs, the write data are transferred to the address offset indicated by the write pointer. The pointer address is automatically incremented after each write access.
bits : 0 - 15 (16 bit)
access : write-only

RDATA : Read data When a read access to this register occurs, the read data are the contents of the Y output buffer at the address offset indicated by the READ pointer. The pointer address is automatically incremented after each read access.
bits : 0 - 15 (16 bit)
access : read-only

X2_BASE : Base address of X2 buffer The X2 buffer base address can be modified while START=1, for example to change coefficient values. The filter should be stalled when doing this, since changing the coefficients while a calculation is ongoing affects the result.
bits : 0 - 7 (8 bit)
access : read-write

X2_BUF_SIZE : Size of X2 buffer in 16-bit words This bitfield can not be modified when a function is ongoing (START = 1).
bits : 8 - 15 (8 bit)
access : read-write

Y_BASE : Base address of Y buffer
bits : 0 - 7 (8 bit)
access : read-write

Y_BUF_SIZE : Size of Y buffer in 16-bit words For FIR filters, the minimum buffer size is 1 (+ the watermark threshold). For IIR filters the minimum buffer size is the number of feedback taps (+ the watermark threshold).
bits : 8 - 15 (8 bit)
access : read-write

EMPTY_WM : Watermark for buffer empty flag Defines the threshold for setting the Y buffer empty flag when operating in circular mode. The flag is set if the number of unread values in the buffer is less than 2EMPTY_WM. 2: Threshold = 4 3: Threshold = 8 Setting a threshold greater than 1 allows several data to be transferred from the buffer under one interrupt. Threshold should be set to 1 if DMA read requests are enabled (DMAREN = 1 in FMAC_CR register).
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

End of enumeration elements list.

P : Input parameter P. The value of this parameter is dependent on the function This bitfield can not be modified when a function is ongoing (START = 1)
bits : 0 - 7 (8 bit)
access : read-write

Q : Input parameter Q. The value of this parameter is dependent on the function. This bitfield can not be modified when a function is ongoing (START = 1)
bits : 8 - 15 (8 bit)
access : read-write

R : Input parameter R. The value of this parameter is dependent on the function. This bitfield can not be modified when a function is ongoing (START = 1)
bits : 16 - 23 (8 bit)
access : read-write

FUNC : Function 2: Load X2 buffer 3: Load Y buffer 4 to 7: Reserved 8: Convolution (FIR filter) 9: IIR filter (direct form 1) This bitfield can not be modified when a function is ongoing (START = 1)
bits : 24 - 30 (7 bit)
access : read-write

Enumeration:

End of enumeration elements list.

START : Enable execution Setting this bit triggers the execution of the function selected in the FUNC bitfield. Resetting it by software stops any ongoing function. For initialization functions, this bit is reset by hardware.
bits : 31 - 31 (1 bit)
access : read-write

Enumeration:

End of enumeration elements list.