\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :
RAMECC interrupt enable register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GIE : Global interrupt enable
bits : 0 - 0 (1 bit)
GECCSEIE_ : Global ECC single error interrupt enable
bits : 1 - 1 (1 bit)
GECCDEIE : Global ECC double error interrupt enable
bits : 2 - 2 (1 bit)
GECCDEBWIE : Global ECC double error on byte write (BW) interrupt enable
bits : 3 - 3 (1 bit)
RAMECC monitor x configuration register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCSEIE : ECC single error interrupt enable
bits : 2 - 2 (1 bit)
ECCDEIE : ECC double error interrupt enable
bits : 3 - 3 (1 bit)
ECCDEBWIE : ECC double error on byte write (BW) interrupt enable
bits : 4 - 4 (1 bit)
ECCELEN : ECC error latching enable
bits : 5 - 5 (1 bit)
RAMECC monitor x status register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDCF : ECC single error detected and corrected flag
bits : 0 - 0 (1 bit)
DEDF : ECC double error detected flag
bits : 1 - 1 (1 bit)
DEBWDF : ECC double error on byte write (BW) detected flag
bits : 2 - 2 (1 bit)
RAMECC monitor x failing address register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FADD : ECC error failing address
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data low register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAL : Failing data low
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data high register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAH : Failing data high (64-bit memory)
bits : 0 - 31 (32 bit)
RAMECC monitor x failing ECC error code register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
RAMECC monitor x configuration register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCSEIE : ECC single error interrupt enable
bits : 2 - 2 (1 bit)
ECCDEIE : ECC double error interrupt enable
bits : 3 - 3 (1 bit)
ECCDEBWIE : ECC double error on byte write (BW) interrupt enable
bits : 4 - 4 (1 bit)
ECCELEN : ECC error latching enable
bits : 5 - 5 (1 bit)
RAMECC monitor x status register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDCF : ECC single error detected and corrected flag
bits : 0 - 0 (1 bit)
DEDF : ECC double error detected flag
bits : 1 - 1 (1 bit)
DEBWDF : ECC double error on byte write (BW) detected flag
bits : 2 - 2 (1 bit)
RAMECC monitor x failing address register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FADD : ECC error failing address
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data low register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAL : Failing data low
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data high register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FDATAH : Failing data high (64-bit memory)
bits : 0 - 31 (32 bit)
RAMECC monitor x failing ECC error code register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
RAMECC monitor x configuration register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCSEIE : ECC single error interrupt enable
bits : 2 - 2 (1 bit)
ECCDEIE : ECC double error interrupt enable
bits : 3 - 3 (1 bit)
ECCDEBWIE : ECC double error on byte write (BW) interrupt enable
bits : 4 - 4 (1 bit)
ECCELEN : ECC error latching enable
bits : 5 - 5 (1 bit)
RAMECC monitor x status register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDCF : ECC single error detected and corrected flag
bits : 0 - 0 (1 bit)
DEDF : ECC double error detected flag
bits : 1 - 1 (1 bit)
DEBWDF : ECC double error on byte write (BW) detected flag
bits : 2 - 2 (1 bit)
RAMECC monitor x failing address register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FADD : ECC error failing address
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data low register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAL : Failing data low
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data high register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAH : Failing data high (64-bit memory)
bits : 0 - 31 (32 bit)
RAMECC monitor x failing ECC error code register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
RAMECC monitor x configuration register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCSEIE : ECC single error interrupt enable
bits : 2 - 2 (1 bit)
ECCDEIE : ECC double error interrupt enable
bits : 3 - 3 (1 bit)
ECCDEBWIE : ECC double error on byte write (BW) interrupt enable
bits : 4 - 4 (1 bit)
ECCELEN : ECC error latching enable
bits : 5 - 5 (1 bit)
RAMECC monitor x status register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDCF : ECC single error detected and corrected flag
bits : 0 - 0 (1 bit)
DEDF : ECC double error detected flag
bits : 1 - 1 (1 bit)
DEBWDF : ECC double error on byte write (BW) detected flag
bits : 2 - 2 (1 bit)
RAMECC monitor x failing address register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FADD : ECC error failing address
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data low register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAL : Failing data low
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data high register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAH : Failing data high (64-bit memory)
bits : 0 - 31 (32 bit)
RAMECC monitor x failing ECC error code register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
alternate_register : M4FDRH
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
RAMECC monitor x configuration register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ECCSEIE : ECC single error interrupt enable
bits : 2 - 2 (1 bit)
ECCDEIE : ECC double error interrupt enable
bits : 3 - 3 (1 bit)
ECCDEBWIE : ECC double error on byte write (BW) interrupt enable
bits : 4 - 4 (1 bit)
ECCELEN : ECC error latching enable
bits : 5 - 5 (1 bit)
RAMECC monitor x status register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEDCF : ECC single error detected and corrected flag
bits : 0 - 0 (1 bit)
DEDF : ECC double error detected flag
bits : 1 - 1 (1 bit)
DEBWDF : ECC double error on byte write (BW) detected flag
bits : 2 - 2 (1 bit)
RAMECC monitor x failing address register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FADD : ECC error failing address
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data low register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FDATAL : Failing data low
bits : 0 - 31 (32 bit)
RAMECC monitor x failing data high register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
RAMECC monitor x failing ECC error code register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FEC : Failing error code
bits : 0 - 31 (32 bit)
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