\n
address_offset : 0x0 Bytes (0x0)
size : 0x80 byte (0x0)
mem_usage : registers
protection :
Master Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CK_PSC : HRTIM Master Clock prescaler
bits : 0 - 2 (3 bit)
CONT : Master Continuous mode
bits : 3 - 3 (1 bit)
RETRIG : Master Re-triggerable mode
bits : 4 - 4 (1 bit)
HALF : Half mode enable
bits : 5 - 5 (1 bit)
SYNC_IN : ynchronization input
bits : 8 - 9 (2 bit)
SYNCRSTM : Synchronization Resets Master
bits : 10 - 10 (1 bit)
SYNCSTRTM : Synchronization Starts Master
bits : 11 - 11 (1 bit)
SYNC_OUT : Synchronization output
bits : 12 - 13 (2 bit)
SYNC_SRC : Synchronization source
bits : 14 - 15 (2 bit)
MCEN : Master Counter enable
bits : 16 - 16 (1 bit)
TACEN : Timer A counter enable
bits : 17 - 17 (1 bit)
TBCEN : Timer B counter enable
bits : 18 - 18 (1 bit)
TCCEN : Timer C counter enable
bits : 19 - 19 (1 bit)
TDCEN : Timer D counter enable
bits : 20 - 20 (1 bit)
TECEN : Timer E counter enable
bits : 21 - 21 (1 bit)
DACSYNC : AC Synchronization
bits : 25 - 26 (2 bit)
PREEN : Preload enable
bits : 27 - 27 (1 bit)
MREPU : Master Timer Repetition update
bits : 29 - 29 (1 bit)
BRSTDMA : Burst DMA Update
bits : 30 - 31 (2 bit)
Master Timer Counter Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCNT : Counter value
bits : 0 - 15 (16 bit)
Master Timer Period Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MPER : Master Timer Period value
bits : 0 - 15 (16 bit)
Master Timer Repetition Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MREP : Master Timer Repetition counter value
bits : 0 - 7 (8 bit)
Master Timer Compare 1 Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCMP1 : Master Timer Compare 1 value
bits : 0 - 15 (16 bit)
Master Timer Compare 2 Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCMP2 : Master Timer Compare 2 value
bits : 0 - 15 (16 bit)
Master Timer Compare 3 Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCMP3 : Master Timer Compare 3 value
bits : 0 - 15 (16 bit)
Master Timer Compare 4 Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCMP4 : Master Timer Compare 4 value
bits : 0 - 15 (16 bit)
Master Timer Interrupt Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MCMP1 : Master Compare 1 Interrupt Flag
bits : 0 - 0 (1 bit)
MCMP2 : Master Compare 2 Interrupt Flag
bits : 1 - 1 (1 bit)
MCMP3 : Master Compare 3 Interrupt Flag
bits : 2 - 2 (1 bit)
MCMP4 : Master Compare 4 Interrupt Flag
bits : 3 - 3 (1 bit)
MREP : Master Repetition Interrupt Flag
bits : 4 - 4 (1 bit)
SYNC : Sync Input Interrupt Flag
bits : 5 - 5 (1 bit)
MUPD : Master Update Interrupt Flag
bits : 6 - 6 (1 bit)
Master Timer Interrupt Clear Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
MCMP1C : Master Compare 1 Interrupt flag clear
bits : 0 - 0 (1 bit)
MCMP2C : Master Compare 2 Interrupt flag clear
bits : 1 - 1 (1 bit)
MCMP3C : Master Compare 3 Interrupt flag clear
bits : 2 - 2 (1 bit)
MCMP4C : Master Compare 4 Interrupt flag clear
bits : 3 - 3 (1 bit)
MREPC : Repetition Interrupt flag clear
bits : 4 - 4 (1 bit)
SYNCC : Sync Input Interrupt flag clear
bits : 5 - 5 (1 bit)
MUPDC : Master update Interrupt flag clear
bits : 6 - 6 (1 bit)
MDIER4
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MCMP1IE : MCMP1IE
bits : 0 - 0 (1 bit)
MCMP2IE : MCMP2IE
bits : 1 - 1 (1 bit)
MCMP3IE : MCMP3IE
bits : 2 - 2 (1 bit)
MCMP4IE : MCMP4IE
bits : 3 - 3 (1 bit)
MREPIE : MREPIE
bits : 4 - 4 (1 bit)
SYNCIE : SYNCIE
bits : 5 - 5 (1 bit)
MUPDIE : MUPDIE
bits : 6 - 6 (1 bit)
MCMP1DE : MCMP1DE
bits : 16 - 16 (1 bit)
MCMP2DE : MCMP2DE
bits : 17 - 17 (1 bit)
MCMP3DE : MCMP3DE
bits : 18 - 18 (1 bit)
MCMP4DE : MCMP4DE
bits : 19 - 19 (1 bit)
MREPDE : MREPDE
bits : 20 - 20 (1 bit)
SYNCDE : SYNCDE
bits : 21 - 21 (1 bit)
MUPDDE : MUPDDE
bits : 22 - 22 (1 bit)
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