\n

JPEG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

CONFR0

CONFRN1

CONFRN2

CONFRN3

CONFRN4

CR

SR

CFR

CONFR1

DIR

DOR

CONFR2

CONFR3


CONFR0

JPEG codec control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CONFR0 CONFR0 write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START

START : Start This bit start or stop the encoding or decoding process. Read this register always return 0.
bits : 0 - 0 (1 bit)


CONFRN1

JPEG codec configuration register 4-7
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFRN1 CONFRN1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HD HA QT NB VSF HSF

HD : Huffman DC Selects the Huffman table for encoding the DC coefficients.
bits : 0 - 0 (1 bit)

HA : Huffman AC Selects the Huffman table for encoding the AC coefficients.
bits : 1 - 1 (1 bit)

QT : Quantization Table Selects quantization table associated with a color component.
bits : 2 - 3 (2 bit)

NB : Number of Block Number of data units minus 1 that belong to a particular color in the MCU.
bits : 4 - 7 (4 bit)

VSF : Vertical Sampling Factor Vertical sampling factor for component i.
bits : 8 - 11 (4 bit)

HSF : Horizontal Sampling Factor Horizontal sampling factor for component i.
bits : 12 - 15 (4 bit)


CONFRN2

JPEG codec configuration register 4-7
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFRN2 CONFRN2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HD HA QT NB VSF HSF

HD : Huffman DC Selects the Huffman table for encoding the DC coefficients.
bits : 0 - 0 (1 bit)

HA : Huffman AC Selects the Huffman table for encoding the AC coefficients.
bits : 1 - 1 (1 bit)

QT : Quantization Table Selects quantization table associated with a color component.
bits : 2 - 3 (2 bit)

NB : Number of Block Number of data units minus 1 that belong to a particular color in the MCU.
bits : 4 - 7 (4 bit)

VSF : Vertical Sampling Factor Vertical sampling factor for component i.
bits : 8 - 11 (4 bit)

HSF : Horizontal Sampling Factor Horizontal sampling factor for component i.
bits : 12 - 15 (4 bit)


CONFRN3

JPEG codec configuration register 4-7
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFRN3 CONFRN3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HD HA QT NB VSF HSF

HD : Huffman DC Selects the Huffman table for encoding the DC coefficients.
bits : 0 - 0 (1 bit)

HA : Huffman AC Selects the Huffman table for encoding the AC coefficients.
bits : 1 - 1 (1 bit)

QT : Quantization Table Selects quantization table associated with a color component.
bits : 2 - 3 (2 bit)

NB : Number of Block Number of data units minus 1 that belong to a particular color in the MCU.
bits : 4 - 7 (4 bit)

VSF : Vertical Sampling Factor Vertical sampling factor for component i.
bits : 8 - 11 (4 bit)

HSF : Horizontal Sampling Factor Horizontal sampling factor for component i.
bits : 12 - 15 (4 bit)


CONFRN4

JPEG codec configuration register 4-7
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFRN4 CONFRN4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HD HA QT NB VSF HSF

HD : Huffman DC Selects the Huffman table for encoding the DC coefficients.
bits : 0 - 0 (1 bit)

HA : Huffman AC Selects the Huffman table for encoding the AC coefficients.
bits : 1 - 1 (1 bit)

QT : Quantization Table Selects quantization table associated with a color component.
bits : 2 - 3 (2 bit)

NB : Number of Block Number of data units minus 1 that belong to a particular color in the MCU.
bits : 4 - 7 (4 bit)

VSF : Vertical Sampling Factor Vertical sampling factor for component i.
bits : 8 - 11 (4 bit)

HSF : Horizontal Sampling Factor Horizontal sampling factor for component i.
bits : 12 - 15 (4 bit)


CR

JPEG control register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 JCEN IFTIE IFNFIE OFTIE OFNEIE EOCIE HPDIE IDMAEN ODMAEN IFF OFF

JCEN : JPEG Core Enable Enable the JPEG codec Core.
bits : 0 - 0 (1 bit)

IFTIE : Input FIFO Threshold Interrupt Enable This bit enables the interrupt generation when input FIFO reach the threshold.
bits : 1 - 1 (1 bit)

IFNFIE : Input FIFO Not Full Interrupt Enable This bit enables the interrupt generation when input FIFO is not empty.
bits : 2 - 2 (1 bit)

OFTIE : Output FIFO Threshold Interrupt Enable This bit enables the interrupt generation when output FIFO reach the threshold.
bits : 3 - 3 (1 bit)

OFNEIE : Output FIFO Not Empty Interrupt Enable This bit enables the interrupt generation when output FIFO is not empty.
bits : 4 - 4 (1 bit)

EOCIE : End of Conversion Interrupt Enable This bit enables the interrupt generation on the end of conversion.
bits : 5 - 5 (1 bit)

HPDIE : Header Parsing Done Interrupt Enable This bit enables the interrupt generation on the Header Parsing Operation.
bits : 6 - 6 (1 bit)

IDMAEN : Input DMA Enable Enable the DMA request generation for the input FIFO.
bits : 11 - 11 (1 bit)

ODMAEN : Output DMA Enable Enable the DMA request generation for the output FIFO.
bits : 12 - 12 (1 bit)

IFF : Input FIFO Flush This bit flush the input FIFO. This bit is always read as 0.
bits : 13 - 13 (1 bit)

OFF : Output FIFO Flush This bit flush the output FIFO. This bit is always read as 0.
bits : 14 - 14 (1 bit)


SR

JPEG status register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SR SR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IFTF IFNFF OFTF OFNEF EOCF HPDF COF

IFTF : Input FIFO Threshold Flag This bit is set when the input FIFO is not full and is bellow its threshold.
bits : 1 - 1 (1 bit)

IFNFF : Input FIFO Not Full Flag This bit is set when the input FIFO is not full (a data can be written).
bits : 2 - 2 (1 bit)

OFTF : Output FIFO Threshold Flag This bit is set when the output FIFO is not empty and has reach its threshold.
bits : 3 - 3 (1 bit)

OFNEF : Output FIFO Not Empty Flag This bit is set when the output FIFO is not empty (a data is available).
bits : 4 - 4 (1 bit)

EOCF : End of Conversion Flag This bit is set when the JPEG codec core has finished the encoding or the decoding process and than last data has been sent to the output FIFO.
bits : 5 - 5 (1 bit)

HPDF : Header Parsing Done Flag This bit is set in decode mode when the JPEG codec has finished the parsing of the headers and the internal registers have been updated.
bits : 6 - 6 (1 bit)

COF : Codec Operation Flag This bit is set when when a JPEG codec operation is on going (encoding or decoding).
bits : 7 - 7 (1 bit)


CFR

JPEG clear flag register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFR CFR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEOCF CHPDF

CEOCF : Clear End of Conversion Flag Writing 1 clears the End of Conversion Flag of the JPEG Status Register.
bits : 5 - 5 (1 bit)

CHPDF : Clear Header Parsing Done Flag Writing 1 clears the Header Parsing Done Flag of the JPEG Status Register.
bits : 6 - 6 (1 bit)


CONFR1

JPEG codec configuration register 1
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFR1 CONFR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NF DE COLORSPACE NS HDR YSIZE

NF : Number of color components This field defines the number of color components minus 1.
bits : 0 - 1 (2 bit)

DE : Decoding Enable This bit selects the coding or decoding process
bits : 3 - 3 (1 bit)

COLORSPACE : Color Space This filed defines the number of quantization tables minus 1 to insert in the output stream.
bits : 4 - 5 (2 bit)

NS : Number of components for Scan This field defines the number of components minus 1 for scan header marker segment.
bits : 6 - 7 (2 bit)

HDR : Header Processing This bit enable the header processing (generation/parsing).
bits : 8 - 8 (1 bit)

YSIZE : Y Size This field defines the number of lines in source image.
bits : 16 - 31 (16 bit)


DIR

JPEG data input register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

DIR DIR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAIN

DATAIN : Data Input FIFO Input FIFO data register.
bits : 0 - 31 (32 bit)


DOR

JPEG data output register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DOR DOR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAOUT

DATAOUT : Data Output FIFO Output FIFO data register.
bits : 0 - 31 (32 bit)


CONFR2

JPEG codec configuration register 2
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFR2 CONFR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NMCU

NMCU : Number of MCU For encoding: this field defines the number of MCU units minus 1 to encode. For decoding: this field indicates the number of complete MCU units minus 1 to be decoded (this field is updated after the JPEG header parsing). If the decoded image size has not a X or Y size multiple of 8 or 16 (depending on the sub-sampling process), the resulting incomplete or empty MCU must be added to this value to get the total number of MCU generated.
bits : 0 - 25 (26 bit)


CONFR3

JPEG codec configuration register 3
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONFR3 CONFR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XSIZE

XSIZE : X size This field defines the number of pixels per line.
bits : 16 - 31 (16 bit)



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.