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SYSCFG

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection :

Registers

EXTICR3

SYSCFG_BRK_LOCKUPR (BRK_LOCKUPR)

EXTICR4

CCCSR

CCVR

CCCR

PMCR

EXTICR1

EXTICR2


EXTICR3

external interrupt configuration register 3
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTICR3 EXTICR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI8 EXTI9 EXTI10 EXTI11

EXTI8 : EXTI x configuration (x = 8 to 11)
bits : 0 - 3 (4 bit)

EXTI9 : EXTI x configuration (x = 8 to 11)
bits : 4 - 7 (4 bit)

EXTI10 : EXTI10
bits : 8 - 11 (4 bit)

EXTI11 : EXTI x configuration (x = 8 to 11)
bits : 12 - 15 (4 bit)


SYSCFG_BRK_LOCKUPR (BRK_LOCKUPR)

SYSCFG timer break lockup register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSCFG_BRK_LOCKUPR SYSCFG_BRK_LOCKUPR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PVDL FLASHL CM7L DTCML ITCML

PVDL : PVD lock enable bit.
bits : 2 - 2 (1 bit)

FLASHL : Flash double ECC error lock bit
bits : 3 - 3 (1 bit)

CM7L : Cortex®-M7 LOCKUP (HardFault) output enable bit
bits : 6 - 6 (1 bit)

DTCML : D1TCM or D0TCM double ECC error signal lock
bits : 13 - 13 (1 bit)

ITCML : ITCM double ECC error signal lock
bits : 14 - 14 (1 bit)


EXTICR4

external interrupt configuration register 4
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTICR4 EXTICR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI12 EXTI13 EXTI14 EXTI15

EXTI12 : EXTI x configuration (x = 12 to 15)
bits : 0 - 3 (4 bit)

EXTI13 : EXTI x configuration (x = 12 to 15)
bits : 4 - 7 (4 bit)

EXTI14 : EXTI x configuration (x = 12 to 15)
bits : 8 - 11 (4 bit)

EXTI15 : EXTI x configuration (x = 12 to 15)
bits : 12 - 15 (4 bit)


CCCSR

compensation cell control/status register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCCSR CCCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN CS READY HSLV

EN : enable
bits : 0 - 0 (1 bit)

CS : Code selection
bits : 1 - 1 (1 bit)

READY : Compensation cell ready flag
bits : 8 - 8 (1 bit)

HSLV : High-speed at low-voltage
bits : 16 - 16 (1 bit)


CCVR

SYSCFG compensation cell value register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CCVR CCVR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NCV PCV

NCV : NMOS compensation value
bits : 0 - 3 (4 bit)

PCV : PMOS compensation value
bits : 4 - 7 (4 bit)


CCCR

SYSCFG compensation cell code register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCCR CCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NCC PCC

NCC : NMOS compensation code
bits : 0 - 3 (4 bit)

PCC : PMOS compensation code
bits : 4 - 7 (4 bit)


PMCR

peripheral mode configuration register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PMCR PMCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 I2C1FMP I2C2FMP I2C3FMP I2C4FMP PB6FMP PB7FMP PB8FMP PB9FMP BOOSTE EPIS PA0SO PA1SO PC2SO PC3SO

I2C1FMP : I2C1 Fm+
bits : 0 - 0 (1 bit)

I2C2FMP : I2C2 Fm+
bits : 1 - 1 (1 bit)

I2C3FMP : I2C3 Fm+
bits : 2 - 2 (1 bit)

I2C4FMP : I2C4 Fm+
bits : 3 - 3 (1 bit)

PB6FMP : PB(6) Fm+
bits : 4 - 4 (1 bit)

PB7FMP : PB(7) Fast Mode Plus
bits : 5 - 5 (1 bit)

PB8FMP : PB(8) Fast Mode Plus
bits : 6 - 6 (1 bit)

PB9FMP : PB(9) Fm+
bits : 7 - 7 (1 bit)

BOOSTE : Booster Enable
bits : 8 - 8 (1 bit)

EPIS : Ethernet PHY Interface Selection
bits : 21 - 23 (3 bit)

PA0SO : PA0 Switch Open
bits : 24 - 24 (1 bit)

PA1SO : PA1 Switch Open
bits : 25 - 25 (1 bit)

PC2SO : PC2 Switch Open
bits : 26 - 26 (1 bit)

PC3SO : PC3 Switch Open
bits : 27 - 27 (1 bit)


EXTICR1

external interrupt configuration register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTICR1 EXTICR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI0 EXTI1 EXTI2 EXTI3

EXTI0 : EXTI x configuration (x = 0 to 3)
bits : 0 - 3 (4 bit)

EXTI1 : EXTI x configuration (x = 0 to 3)
bits : 4 - 7 (4 bit)

EXTI2 : EXTI x configuration (x = 0 to 3)
bits : 8 - 11 (4 bit)

EXTI3 : EXTI x configuration (x = 0 to 3)
bits : 12 - 15 (4 bit)


EXTICR2

external interrupt configuration register 2
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTICR2 EXTICR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTI4 EXTI5 EXTI6 EXTI7

EXTI4 : EXTI x configuration (x = 4 to 7)
bits : 0 - 3 (4 bit)

EXTI5 : EXTI x configuration (x = 4 to 7)
bits : 4 - 7 (4 bit)

EXTI6 : EXTI x configuration (x = 4 to 7)
bits : 8 - 11 (4 bit)

EXTI7 : EXTI x configuration (x = 4 to 7)
bits : 12 - 15 (4 bit)



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