silan
SC32F58128
2024.05.06
SC32F58128 M0
CM0
r0p0
little
2
false
8
32
ADC
ADC
ADC
0x0
0x0
0x1000
registers
n
ADC1
ADC1 Interrupt
19
ADC2
ADC2 Interrupt
20
ADC3
ADC3 Interrupt
21
ADC
ADC Interrupt
22
ADCCMP0_HI
ADC Comparator 0 High Comparison Value
0x18C
-1
read-write
n
ADCCMP0_LO
ADC Comparator 0 Low Comparison Value
0x188
32
read-write
n
0x0
0x0
ADCCMP1_HI
ADC Comparator 1 High Comparison Value
0x194
-1
read-write
n
ADCCMP1_LO
ADC Comparator 1 Low Comparison Value
0x190
-1
read-write
n
ADCCMP2_HI
ADC Comparator 2 High Comparison Value
0x19C
-1
read-write
n
ADCCMP2_LO
ADC Comparator 2 Low Comparison Value
0x198
-1
read-write
n
ADCCMP3_HI
ADC Comparator 3 High Comparison Value
0x1A4
-1
read-write
n
ADCCMP3_LO
ADC Comparator 3 Low Comparison Value
0x1A0
-1
read-write
n
ADCCMPCTL
ADC Compare Control Register
0x180
32
read-write
n
0x0
0x0
CMP0SEL
Compare 0 SOC Channel Select
0
4
read-write
CMP1SEL
Compare 1 SOC Channel Select
4
4
read-write
CMP2SEL
Compare 2 SOC Channel Select
8
4
read-write
CMP3SEL
Compare 3 SOC Channel Select
12
4
read-write
ADCCMPINTR
ADC Compare INterrupt Register
0x184
32
read-write
n
0x0
0x0
CMP0HI
Compare 0 High Interrupt Status
1
1
read-write
CMP0HI_EN
Compare 0 High Interrupt Enable
17
1
read-write
CMP0LO
Compare 0 Low Interrupt Status
0
1
read-write
CMP0LO_EN
Compare 0 Low Interrupt Enable
16
1
read-write
CMP1HI
Compare 1 High Interrupt Status
3
1
read-write
CMP1HI_EN
Compare 1 High Interrupt Enable
19
1
read-write
CMP1LO
Compare 1 Low Interrupt Status
2
1
read-write
CMP1LO_EN
Compare 1 Low Interrupt Enable
18
1
read-write
CMP2HI
Compare 2 High Interrupt Status
5
1
read-write
CMP2HI_EN
Compare 2 High Interrupt Enable
21
1
read-write
CMP2LO
Compare 2 Low Interrupt Status
4
1
read-write
CMP2LO_EN
Compare 2 Low Interrupt Enable
20
1
read-write
CMP3HI
Compare 3 High Interrupt Status
7
1
read-write
CMP3HI_EN
Compare 3 High Interrupt Enable
23
1
read-write
CMP3LO
Compare 3 Low Interrupt Status
6
1
read-write
CMP3LO_EN
Compare 3 Low Interrupt Enable
22
1
read-write
ADCCTL1
ADC Control 1 Register
0x0
32
read-write
n
0x0
0x0
AADCREFPD
Reference buffers circuit power down
5
1
read-write
ADCBSY
ADC Busy
13
1
read-write
ADCBSYCHN
Set when ADC SOC for current channel is generated
8
5
read-write
ADCCOREPD
ADC core power down
4
1
read-write
ADCENABLE
ADC Enable
14
1
read-write
ADCPD
ADC power down
7
1
read-write
ADCREFSEL
Internal/external reference select
3
1
read-write
ADCSHPD
ADC sample ciruit power down
6
1
read-write
i25ut_oe
i25ut_oe Enable Control Bit
1
1
read-write
INA6_SEL
Analog channel A6 input selection
22
1
read-write
INA7_SEL
Analog channel A7 input selection
23
1
read-write
INB5_SEL
Analog channel B5 input selection
29
1
read-write
INB6_SEL
Analog channel B6 input selection
30
1
read-write
INB7_SEL
Analog channel B7 input selection
31
1
read-write
INTPULSEPOS
INT Pulse Generation control
2
1
read-write
RESET
ADC module software reset
15
1
read-write
vbg_oe
vbg Enable Control Bit
0
1
read-write
vreflo_tie_gnd
vreflo_tie_gnd
16
1
read-write
ADCCTL2
ADC Control 2 Register
0x4
32
read-write
n
0x0
0x0
clkdiv
ADC Clock Division
2
4
read-write
clockalwayson
ADC Clock Always on Enable
6
1
read-write
dlyprediv
ADC Trig Delay Clock Prescale
16
10
read-write
NONOVERLAP
No Overlap
1
1
read-write
smp_conv_delay
ADC Converte Delay Time after Sample
11
3
read-write
start_width
ADC Start Pulse Width Select
8
3
read-write
ADCCTL3
ADC Control 3 Register
0x8
32
read-write
n
0x0
0x0
alias
ADC Result Alias
14
2
read-write
chseldlysel
CHSEL Signal Delay Select
5
1
read-write
converteocsel
ADC Convert Start Signal Mode Select
2
1
read-write
convstdlysel
ADC Convert Start Signal Delay Select
0
1
read-write
convstinvsel
ADC Convert Start Signal Invert Select
1
1
read-write
sampledlysel
Sample Signal Delay Select
4
1
read-write
shift
ADC Result Left Shift
24
5
read-write
ADCINTFLG
ADC Interrupt Flag Register
0x10
32
read-only
n
0x0
0x0
ADCINT1
ADC Interrupt Flag 1
0
1
read-only
ADCINT2
ADC Interrupt Flag 2
1
1
read-only
ADCINT3
ADC Interrupt Flag 3
2
1
read-only
ADCINT4
ADC Interrupt Flag 4
3
1
read-only
ADCINT5
ADC Interrupt Flag 5
4
1
read-only
ADCINT6
ADC Interrupt Flag 6
5
1
read-only
ADCINT7
ADC Interrupt Flag 7
6
1
read-only
ADCINT8
ADC Interrupt Flag 8
7
1
read-only
ADCINT9
ADC Interrupt Flag 9
8
1
read-only
ADCINTFLGCLR
ADC Interrupt Flag Clear Register
0x14
32
read-write
n
0x0
0x0
ADCINT1
ADC Interrupt Flag Clear 1
0
1
read-write
ADCINT2
ADC Interrupt Flag Clear 2
1
1
read-write
ADCINT3
ADC Interrupt Flag Clear 3
2
1
read-write
ADCINT4
ADC Interrupt Flag Clear 4
3
1
read-write
ADCINT5
ADC Interrupt Flag Clear 5
4
1
read-write
ADCINT6
ADC Interrupt Flag Clear 6
5
1
read-write
ADCINT7
ADC Interrupt Flag Clear 7
6
1
read-write
ADCINT8
ADC Interrupt Flag Clear 8
7
1
read-write
ADCINT9
ADC Interrupt Flag Clear 9
8
1
read-write
ADCINTOVF
ADC Interrupt Overflow Register
0x18
32
read-only
n
0x0
0x0
ADCOVINT1
ADC Interrupt Overflow Flag 1
0
1
read-only
ADCOVINT2
ADC Interrupt Overflow Flag 2
1
1
read-only
ADCOVINT3
ADC Interrupt Overflow Flag 3
2
1
read-only
ADCOVINT4
ADC Interrupt Overflow Flag 4
3
1
read-only
ADCOVINT5
ADC Interrupt Overflow Flag 5
4
1
read-only
ADCOVINT6
ADC Interrupt Overflow Flag 6
5
1
read-only
ADCOVINT7
ADC Interrupt Overflow Flag 7
6
1
read-only
ADCOVINT8
ADC Interrupt Overflow Flag 8
7
1
read-only
ADCOVINT9
ADC Interrupt Overflow Flag 9
8
1
read-only
ADCINTOVFCLR
ADC Interrupt Overflow Clear Register
0x1C
32
read-write
n
0x0
0x0
ADCOVINT1
ADC Interrupt Overflow Flag Clear 1
0
1
read-write
ADCOVINT2
ADC Interrupt Overflow Flag Clear 2
1
1
read-write
ADCOVINT3
ADC Interrupt Overflow Flag Clear 3
2
1
read-write
ADCOVINT4
ADC Interrupt Overflow Flag Clear 4
3
1
read-write
ADCOVINT5
ADC Interrupt Overflow Flag Clear 5
4
1
read-write
ADCOVINT6
ADC Interrupt Overflow Flag Clear 6
5
1
read-write
ADCOVINT7
ADC Interrupt Overflow Flag Clear 7
6
1
read-write
ADCOVINT8
ADC Interrupt Overflow Flag Clear 8
7
1
read-write
ADCOVINT9
ADC Interrupt Overflow Flag Clear 9
8
1
read-write
ADCINTSOCSEL1
ADC Interrupt SOC Selection 1 Register
0x50
32
read-write
n
0x0
0x0
SOC0
SOC0 ADC Interrupt Trigger Select
0
2
read-write
SOC1
SOC1 ADC Interrupt Trigger Select
2
2
read-write
SOC2
SOC2 ADC Interrupt Trigger Select
4
2
read-write
SOC3
SOC3 ADC Interrupt Trigger Select
6
2
read-write
SOC4
SOC4 ADC Interrupt Trigger Select
8
2
read-write
SOC5
SOC5 ADC Interrupt Trigger Select
10
2
read-write
SOC6
SOC6 ADC Interrupt Trigger Select
12
2
read-write
SOC7
SOC7 ADC Interrupt Trigger Select
14
2
read-write
ADCINTSOCSEL2
ADC Interrupt SOC Selection 2 Register
0x54
32
read-write
n
0x0
0x0
SOC10
SOC10 ADC Interrupt Trigger Select
4
2
read-write
SOC11
SOC11 ADC Interrupt Trigger Select
6
2
read-write
SOC12
SOC12 ADC Interrupt Trigger Select
8
2
read-write
SOC13
SOC13 ADC Interrupt Trigger Select
10
2
read-write
SOC14
SOC14 ADC Interrupt Trigger Select
12
2
read-write
SOC15
SOC15 ADC Interrupt Trigger Select
14
2
read-write
SOC8
SOC8 ADC Interrupt Trigger Select
0
2
read-write
SOC9
SOC9 ADC Interrupt Trigger Select
2
2
read-write
ADCRESULT0
Conversion Result Buffer 0
0x200
32
read-only
n
0x0
0x0
ADCRESULT1
0x204
-1
read-write
n
ADCRESULT10
0x228
-1
read-write
n
ADCRESULT11
0x22C
-1
read-write
n
ADCRESULT12
0x230
-1
read-write
n
ADCRESULT13
0x234
-1
read-write
n
ADCRESULT14
0x238
-1
read-write
n
ADCRESULT15
0x23C
-1
read-write
n
ADCRESULT2
0x208
-1
read-write
n
ADCRESULT3
0x20C
-1
read-write
n
ADCRESULT4
0x210
-1
read-write
n
ADCRESULT5
0x214
-1
read-write
n
ADCRESULT6
0x218
-1
read-write
n
ADCRESULT7
0x21C
-1
read-write
n
ADCRESULT8
0x220
-1
read-write
n
ADCRESULT9
0x224
-1
read-write
n
ADCSAMPLEMODE
ADC Sampling Mode Register
0x48
32
read-write
n
0x0
0x0
SIMULEN0
Simultaneous sampling enable for SOC0/SOC1
0
1
read-write
SIMULEN12
Simultaneous sampling enable for SOC12/SOC13
6
1
read-write
SIMULEN14
Simultaneous sampling enable for SOC14/SOC15
7
1
read-write
SIMULEN1O
Simultaneous sampling enable for SOC10/SOC11
5
1
read-write
SIMULEN2
Simultaneous sampling enable for SOC2/SOC3
1
1
read-write
SIMULEN4
Simultaneous sampling enable for SOC4/SOC5
2
1
read-write
SIMULEN6
Simultaneous sampling enable for SOC6/SOC7
3
1
read-write
SIMULEN8
Simultaneous sampling enable for SOC8/SOC9
4
1
read-write
ADCSOC0CTL
ADC SOCx Control Register
0x80
32
read-write
n
0x0
0x0
ACQPS
SOCx Acquisition Prescale
0
6
read-write
CHSEL
SOCx Channel Select
6
4
read-write
INDLY
SOCx Trigger Delay Select
16
8
read-write
TRIGSEL
SOCx Trigger Source Select
11
5
read-write
ADCSOC10CTL
0xA8
-1
read-write
n
ADCSOC11CTL
0xAC
-1
read-write
n
ADCSOC12CTL
0xB0
-1
read-write
n
ADCSOC13CTL
0xB4
-1
read-write
n
ADCSOC14CTL
0xB8
-1
read-write
n
ADCSOC15CTL
0xBC
-1
read-write
n
ADCSOC1CTL
0x84
-1
read-write
n
ADCSOC2CTL
0x88
-1
read-write
n
ADCSOC3CTL
0x8C
-1
read-write
n
ADCSOC4CTL
0x90
-1
read-write
n
ADCSOC5CTL
0x94
-1
read-write
n
ADCSOC6CTL
0x98
-1
read-write
n
ADCSOC7CTL
0x9C
-1
read-write
n
ADCSOC8CTL
0xA0
-1
read-write
n
ADCSOC9CTL
0xA4
-1
read-write
n
ADCSOCFLG1
ADC SOC Flag 1 Register
0x60
32
read-only
n
0x0
0x0
SOC0
SOC0 Start of Conversion Flag
0
1
read-write
SOC1
SOC1 Start of Conversion Flag
1
1
read-write
SOC10
SOC10 Start of Conversion Flag
10
1
read-write
SOC11
SOC11 Start of Conversion Flag
11
1
read-write
SOC12
SOC12 Start of Conversion Flag
12
1
read-write
SOC13
SOC13 Start of Conversion Flag
13
1
read-write
SOC14
SOC14 Start of Conversion Flag
14
1
read-write
SOC15
SOC15 Start of Conversion Flag
15
1
read-write
SOC2
SOC2 Start of Conversion Flag
2
1
read-write
SOC3
SOC3 Start of Conversion Flag
3
1
read-write
SOC4
SOC4 Start of Conversion Flag
4
1
read-write
SOC5
SOC5 Start of Conversion Flag
5
1
read-write
SOC6
SOC6 Start of Conversion Flag
6
1
read-write
SOC7
SOC7 Start of Conversion Flag
7
1
read-write
SOC8
SOC8 Start of Conversion Flag
8
1
read-write
SOC9
SOC9 Start of Conversion Flag
9
1
read-write
ADCSOCFRC1
ADC SOC Flag Force 1 Register
0x68
32
read-write
n
0x0
0x0
SOC0
SOC0 Force Start of Conversion Flag
0
1
read-write
SOC1
SOC1 Force Start of Conversion Flag
1
1
read-write
SOC10
SOC10 Force Start of Conversion Flag
10
1
read-write
SOC11
SOC11 Force Start of Conversion Flag
11
1
read-write
SOC12
SOC12 Force Start of Conversion Flag
12
1
read-write
SOC13
SOC13 Force Start of Conversion Flag
13
1
read-write
SOC14
SOC14 Force Start of Conversion Flag
14
1
read-write
SOC15
SOC15 Force Start of Conversion Flag
15
1
read-write
SOC2
SOC2 Force Start of Conversion Flag
2
1
read-write
SOC3
SOC3 Force Start of Conversion Flag
3
1
read-write
SOC4
SOC4 Force Start of Conversion Flag
4
1
read-write
SOC5
SOC5 Force Start of Conversion Flag
5
1
read-write
SOC6
SOC6 Force Start of Conversion Flag
6
1
read-write
SOC7
SOC7 Force Start of Conversion Flag
7
1
read-write
SOC8
SOC8 Force Start of Conversion Flag
8
1
read-write
SOC9
SOC9 Force Start of Conversion Flag
9
1
read-write
ADCSOCOVF1
ADC SOC Overflow 1 Register
0x70
32
read-only
n
0x0
0x0
SOC0
SOC0 Start of Conversion Overflow Flag
0
1
read-write
SOC1
SOC1 Start of Conversion Overflow Flag
1
1
read-write
SOC10
SOC10 Start of Conversion Overflow Flag
10
1
read-write
SOC11
SOC11 Start of Conversion Overflow Flag
11
1
read-write
SOC12
SOC12 Start of Conversion Overflow Flag
12
1
read-write
SOC13
SOC13 Start of Conversion Overflow Flag
13
1
read-write
SOC14
SOC14 Start of Conversion Overflow Flag
14
1
read-write
SOC15
SOC15 Start of Conversion Overflow Flag
15
1
read-write
SOC2
SOC2 Start of Conversion Overflow Flag
2
1
read-write
SOC3
SOC3 Start of Conversion Overflow Flag
3
1
read-write
SOC4
SOC4 Start of Conversion Overflow Flag
4
1
read-write
SOC5
SOC5 Start of Conversion Overflow Flag
5
1
read-write
SOC6
SOC6 Start of Conversion Overflow Flag
6
1
read-write
SOC7
SOC7 Start of Conversion Overflow Flag
7
1
read-write
SOC8
SOC8 Start of Conversion Overflow Flag
8
1
read-write
SOC9
SOC9 Start of Conversion Overflow Flag
9
1
read-write
ADCSOCOVFCLR1
ADC SOC Overflow Clear 1 Register
0x78
32
read-write
n
0x0
0x0
SOC0
SOC0 Clear Start of Conversion Overflow Flag
0
1
read-write
SOC1
SOC1 Clear Start of Conversion Overflow Flag
1
1
read-write
SOC10
SOC10 Clear Start of Conversion Overflow Flag
10
1
read-write
SOC11
SOC11 Clear Start of Conversion Overflow Flag
11
1
read-write
SOC12
SOC12 Clear Start of Conversion Overflow Flag
12
1
read-write
SOC13
SOC13 Clear Start of Conversion Overflow Flag
13
1
read-write
SOC14
SOC14 Clear Start of Conversion Overflow Flag
14
1
read-write
SOC15
SOC15 Clear Start of Conversion Overflow Flag
15
1
read-write
SOC2
SOC2 Clear Start of Conversion Overflow Flag
2
1
read-write
SOC3
SOC3 Clear Start of Conversion Overflow Flag
3
1
read-write
SOC4
SOC4 Clear Start of Conversion Overflow Flag
4
1
read-write
SOC5
SOC5 Clear Start of Conversion Overflow Flag
5
1
read-write
SOC6
SOC6 Clear Start of Conversion Overflow Flag
6
1
read-write
SOC7
SOC7 Clear Start of Conversion Overflow Flag
7
1
read-write
SOC8
SOC8 Clear Start of Conversion Overflow Flag
8
1
read-write
SOC9
SOC9 Clear Start of Conversion Overflow Flag
9
1
read-write
ADCTRIM
ADCTRIM Register
0x100
32
read-write
n
0x0
0x0
itrim
i trim
16
4
read-write
meas_i
meas_i
22
1
read-write
mode2
mode2
29
1
read-write
ntrim
no trim
23
1
read-write
offtrim
offest trim
8
8
read-write
reftrim
reference trim
0
8
read-write
tadj
Temperature compensated enable control
27
1
read-write
tc
Temperature compensation setting
24
3
read-write
trim_opt2
trim option
28
1
read-write
vol_sel
voltage select
30
1
read-write
INTSEL1N2
ADC Interrupt 1 and 2 Selection Register
0x20
32
read-write
n
0x0
0x0
INT1CONT
ADCINT1 Continuous Mode Enable
6
1
read-write
INT1E
ADCINT1 Interrupt Enable
5
1
read-write
INT1SEL
ADCINT1 EOC Source Select
0
5
read-write
INT2CONT
ADCINT2 Continuous Mode Enable
14
1
read-write
INT2E
ADCINT2 Interrupt Enable
13
1
read-write
INT2SEL
ADCINT2 EOC Source Select
8
5
read-write
INTSEL3N4
ADC Interrupt 3 and 4 Selection Register
0x24
32
read-write
n
0x0
0x0
INT3CONT
ADCINT3 Continuous Mode Enable
6
1
read-write
INT3E
ADCINT3 Interrupt Enable
5
1
read-write
INT3SEL
ADCINT3 EOC Source Select
0
5
read-write
INT4CONT
ADCINT4 Continuous Mode Enable
14
1
read-write
INT4E
ADCINT4 Interrupt Enable
13
1
read-write
INT4SEL
ADCINT4 EOC Source Select
8
5
read-write
INTSEL5N6
ADC Interrupt 5 and 6 Selection Register
0x28
32
read-write
n
0x0
0x0
INT5CONT
ADCINT5 Continuous Mode Enable
6
1
read-write
INT5E
ADCINT5 Interrupt Enable
5
1
read-write
INT5SEL
ADCINT5 EOC Source Select
0
5
read-write
INT6CONT
ADCINT6 Continuous Mode Enable
14
1
read-write
INT6E
ADCINT6 Interrupt Enable
13
1
read-write
INT6SEL
ADCINT6 EOC Source Select
8
5
read-write
INTSEL7N8
ADC Interrupt 7 and 8 Selection
0x2C
32
read-write
n
0x0
0x0
INT7CONT
ADCINT7 Continuous Mode Enable
6
1
read-write
INT7E
ADCINT7 Interrupt Enable
5
1
read-write
INT7SEL
ADCINT7 EOC Source Select
0
5
read-write
INT8CONT
ADCINT8 Continuous Mode Enable
14
1
read-write
INT8E
ADCINT8 Interrupt Enable
13
1
read-write
INT8SEL
ADCINT8 EOC Source Select
8
5
read-write
INTSEL9N10
ADC Interrupt 9 and 10 Selection
0x30
32
read-write
n
0x0
0x0
INT9CONT
ADCINT9 Continuous Mode Enable
6
1
read-write
INT9E
ADCINT9 Interrupt Enable
5
1
read-write
INT9SEL
ADCINT9 EOC Source Select
0
5
read-write
SOCPRICTL
ADC SOC Priority Control
0x40
32
read-write
n
0x0
0x0
RRPOINTER
Round Robin Pointer
5
6
read-only
SOCPRIORITY
SOC Priority.
0
5
read-write
ATOM
Multiple core control Registers
ATOM
0x0
0x0
0x1000
registers
n
SYS
SYS Interrupt
14
ATOM0
Multiplication Control Register
0x0
32
read-write
n
0x0
0x0
LOCK0
Core0 lock flag
0
1
read-write
LOCK1
Core1 lock flag
4
1
read-write
MSG
messages between two cores
8
24
read-write
ATOM1
0x4
-1
read-write
n
ATOM2
0x8
-1
read-write
n
ATOM3
0xC
-1
read-write
n
ATOM4
0x10
-1
read-write
n
ATOM5
0x14
-1
read-write
n
ATOM6
0x18
-1
read-write
n
ATOM7
0x1C
-1
read-write
n
ATOMERROR
ATOM error register
0x400
32
read-write
n
0x0
0x0
ATOMERROR0
ATOM0 error flag
0
1
read-write
ATOMERROR1
ATOM1 error flag
1
1
read-write
ATOMERROR2
ATOM2 error flag
2
1
read-write
ATOMERROR3
ATOM3 error flag
3
1
read-write
ATOMERROR4
ATOM4 error flag
4
1
read-write
ATOMERROR5
ATOM5 error flag
5
1
read-write
ATOMERROR6
ATOM6 error flag
6
1
read-write
ATOMERROR7
ATOM7 error flag
7
1
read-write
ATOMID
ATOM ID Register
0x800
32
read-only
n
0x0
0x0
ATOMINTEN
ATOMERROR Interruput enable Register
0x404
32
read-write
n
0x0
0x0
ATOMINTR0
ATOM0 error interrupt enable
0
1
read-write
ATOMINTR1
ATOM1 error interrupt enable
1
1
read-write
ATOMINTR2
ATOM2 error interrupt enable
2
1
read-write
ATOMINTR3
ATOM3 error interrupt enable
3
1
read-write
ATOMINTR4
ATOM4 error interrupt enable
4
1
read-write
ATOMINTR5
ATOM5 error interrupt enable
5
1
read-write
ATOMINTR6
ATOM6 error interrupt enable
6
1
read-write
ATOMINTR7
ATOM7 error interrupt enable
7
1
read-write
CACHE
CACHE module
CACHE
0x0
0x0
0x1000
registers
n
SYS
SYS Interrupt
14
CTRL
CACHE Control Register
0x4
32
read-write
n
0x0
0x0
AUTOCLEAR
CACHE autoclear trig
8
1
read-write
AUTOCLEARING
CACHE is autoclearing
9
1
read-only
AUTOCLEAR_END
CACHE autoclear end flag
10
1
read-write
AUTOFILL
CACHE autofill trig
0
1
read-write
AUTOFILLING
CACHE is autofilling
1
1
read-only
AUTOFILL_END
CACHE autofill end flag
2
1
read-write
LOADLOCK
CACHE lock control
4
1
read-write
RUNLOCK
CACHE runlock control
5
1
read-write
STATISTICS_EN
CACHE statistics enable
30
1
read-write
UNLOCK
CACHE unlock control
16
1
read-write
UNLOCKING
CACHE is unlocking
17
1
read-only
UNLOCK_END
CACHE unlock end flag
18
1
read-write
UNVALID
CACHE unvalid control
20
1
read-write
HIT_HI
CACHE hit number high register
0x194
32
read-only
n
0x0
0x0
HIT_LO
CACHE hit number low register
0x190
32
read-only
n
0x0
0x0
INTR
CACHE interrupt register
0x30
32
read-write
n
0x0
0x0
DATARAM_PARITY_ERR
DATARAM parity error status
3
1
read-write
DATARAM_PARITY_ERR_INTEN
DATARAM parity error interrupt enable
19
1
read-write
STATE_ERR
CACHE state error status
1
1
read-write
STATE_ERR_INTEN
CACHE state error interrupt enable
17
1
read-write
STATISTICS_ERR
CACHE statistics error status
5
1
read-write
STATISTICS_ERR_INTEN
CACHE statistics error interrupt enable
21
1
read-write
TAGRAM_PARITY_ERR
TAGRAM parity error status
2
1
read-write
TAGRAM_PARITY_ERR_INTEN
TAGRAM parity error interrupt enable
18
1
read-write
MAIN_CTRL
Main Control Register
0x0
32
read-write
n
0x0
0x0
CACHE_EN
CACHE Enable
0
1
read-write
CACHE_RAM_EN
CACHE used as ram
8
1
read-write
MISS_LO
CACHE miss number low register
0x198
32
read-only
n
0x0
0x0
MULT_MISS_HI
CACHE miss number high register
0x19C
32
read-only
n
0x0
0x0
OPADDR
CACHE lock start address
0x8
32
read-write
n
0x0
0x0
ADDRESS
CACHE lock start address
0
18
read-write
OPSIZE
CACHE lock line size
0xC
32
read-write
n
0x0
0x0
LINE_SIZE
CACHE lock line size
0
8
read-write
SOFTRESET
CACHE software reset register
0x38
32
read-write
n
0x0
0x0
CAN0
CAN0 module
CAN
0x0
0x0
0x100
registers
n
CAN
CAN Interrupt
5
AFC
CAN Transmit Frame Information Register
0x60
32
read-write
n
0x0
0x0
AFC0EN
Automatic filter 0 enable
0
1
read-write
AFC1EN
Automatic filter 1 enable
1
1
read-write
AFC2EN
Automatic filter 2 enable
2
1
read-write
AFC3EN
Automatic filter 3 enable
3
1
read-write
AFC4EN
Automatic filter 4 enable
4
1
read-write
AFC5EN
Automatic filter 5 enable
5
1
read-write
AFC6EN
Automatic filter 6 enable
6
1
read-write
AFT
CAN Transmit Identification Register
0x64
32
read-write
n
0x0
0x0
AFC0TYPE
Automatic filter 0 type
0
1
read-write
AFC1TYPE
Automatic filter 1 type
1
1
read-write
AFC2TYPE
Automatic filter 2 type
2
1
read-write
AFC3TYPE
Automatic filter 3 type
3
1
read-write
AFC4TYPE
Automatic filter 4 type
4
1
read-write
AFC5TYPE
Automatic filter 5 type
5
1
read-write
AFC6TYPE
Automatic filter 6 type
6
1
read-write
BTR
CAN Bus Timing Register
0x14
32
read-write
n
0x0
0x0
BRP
Baud Rate Prescaler
0
10
read-write
SAM
Sampling
23
1
read-write
SJW
The Synchronization Jump Width is CAN clocks
14
2
read-write
TESG1
The delay from the nominal Sync point to the sample point is (this value plus one)CAN clocks.
16
4
read-write
TESG2
The delay from the sample point to the next nominal sync point is (this value plus one)CAN clocks
20
3
read-write
COD
CAN Receive Filter Code Register 0
0x0
32
read-write
n
0x0
0x0
COMMAND
CAN Command Register
0x4
32
read-write
n
0x0
0x0
AT
Abort Transmission
1
1
read-write
CAB
Clear All Buffer
8
1
read-write
CBF
Clear Buffer Full Flag
9
1
read-write
CDO
Clear Data Overrun
3
1
read-write
RRB
Release Receive Buffer
2
1
read-write
SRR
Self Reception Request
4
1
read-write
STB0
Select Tx Buffer 0
5
1
read-write
STB1
Select Tx Buffer 1
6
1
read-write
STB2
Select Tx Buffer 2
7
1
read-write
TR
Transmisson Request
0
1
read-write
DA
CAN Transmit Low Byte Register 0
0x8
32
read-write
n
0x0
0x0
DATA0
DATA0
0
8
read-write
DATA1
DATA1
8
8
read-write
DATA2
DATA2
16
8
read-write
DATA3
DATA3
24
8
read-write
DB
CAN Transmit High Byte Register 0
0xC
32
read-write
n
0x0
0x0
DATA4
DATA4
0
8
read-write
DATA5
DATA5
8
8
read-write
DATA6
DATA6
16
8
read-write
DATA7
DATA7
24
8
read-write
DMAEN
CAN DMA Control Register
0xA0
32
read-write
n
0x0
0x0
AUTORRB
Auto RRB Enable
4
1
read-write
RBDMAEN
Receive Buffer DMA Enable
1
1
read-write
RBSEL
Receive Buffer DMA Trig Level Select
2
2
read-write
TB0DMAEN
Transmit Buffer 0 DMA Enable
0
1
read-write
TB1DMAEN
Transmit Buffer 1 DMA Enable
5
1
read-write
TB2DMAEN
Transmit Buffer 2 DMA Enable
6
1
read-write
DMASR
CAN DMA Status Register
0xA4
32
read-only
n
0x0
0x0
AUTORRB
Auto RRB Status
4
1
read-only
RBDMASR
Receive Buffer DMA Status
1
1
read-only
TB0DMASR
Transmit Buffer 0 DMA Status
0
1
read-only
TB1DMASR
Transmit Buffer 1 DMA Status
5
1
read-only
TB2DMASR
Transmit Buffer 2 DMA Status
6
1
read-only
EWL
CAN Error Warning Limit Register
0x18
32
read-write
n
0x0
0x0
FI
CAN Transmit Frame Information Register 0
0x0
32
read-write
n
0x0
0x0
DLC
Transmit Data Length Code
0
4
read-write
PRIO
PRIO
24
8
read-write
GSR
CAN Global Status and Error Register
0x8
32
read-write
n
0x0
0x0
BS
Bus Status
7
1
read-only
DOS
Data Overrun Status
1
1
read-only
ES
Error Status
6
1
read-only
RBF
Receive Buffer Full
8
1
read-only
RBS
Receive Buffer Status
0
1
read-only
RS
Receive Status
4
1
read-only
RXCNT
Rx Buffer Counter
12
4
read-only
RXERR
The current value of the Rx Counter
16
8
read-write
TBS
Transmit Buffer Status
2
1
read-only
TCS
Transmit Complete Status
3
1
read-only
TS
Transmit Status
5
1
read-only
TXERR
The current value of the Tx Counter
24
8
read-write
TXSEL
Tx Buffer Select
9
3
read-only
ID
CAN Transmit Identification Register 0
0x4
32
read-write
n
0x0
0x0
FF
FF
2
1
read-write
ID
ID
3
29
read-write
RTR
RTR
1
1
read-write
IER
CAN Interrupt Enable Register
0x10
32
read-write
n
0x0
0x0
ALIE
Arbitration Lost Interrupt Enable
6
1
read-write
BEIE
Bus Error Interrupt Enable
7
1
read-write
DFIE
Receive FIFO Full Interrupt Enable
11
1
read-write
DOIE
Data Overrun Interrupt Enable
3
1
read-write
EIE
Error Warning Interrupt Enable
2
1
read-write
EPIE
Error Passive Interrupt Enable
5
1
read-write
RIE
Receiver Interrupt Enable
0
1
read-write
TIE0
Transmit Interrupt Enable for Buffer 0
1
1
read-write
TIE1
Transmit Interrupt Enable for Buffer 1
9
1
read-write
TIE2
Transmit Interrupt Enable for Buffer 2
10
1
read-write
ISR
CAN Interrupt Status Register
0xC
32
read-only
n
0x0
0x0
ALCBIT
Error Type
24
5
read-only
ALI
Arbitration Lost Interrupt
6
1
read-only
BEI
Bus Error Interrupt
7
1
read-only
DFI
Receive FIFO Full Interrupt
11
1
read-only
DOI
Data Overrun Interrupt
3
1
read-only
EI
Error Warning Interrupt
2
1
read-only
EPI
Error Passive Interrupt
5
1
read-only
ERRBIT
Error Code Capture
16
5
read-only
ERRC
Error Type
22
2
read-only
ERRDIR
Error Direction
21
1
read-only
RI
Receive Interrupt
0
1
read-only
TI0
Transmit Interrupt 0
1
1
read-only
TI1
Transmit Interrupt 1
9
1
read-only
TI2
Transmit Interrupt 2
10
1
read-only
MODE
CAN Mode Register
0x0
32
read-write
n
0x0
0x0
LOM
Listen Only Mode
1
1
read-write
RM
Reset Mode
0
1
read-write
RPM
Receive Polarity Mode
5
1
read-write
STM
Self test Mode
2
1
read-write
TM
Test Mode
7
1
read-write
TPM
Test Priority Mode
3
1
read-write
MSK
CAN Receive Filter Mask Register 0
0x4
32
read-write
n
0x0
0x0
RDA
CAN Receive Low Byte Register
0x28
32
read-write
n
0x0
0x0
DATA0
DATA0
0
8
read-only
DATA1
DATA1
8
8
read-only
DATA2
DATA2
16
8
read-only
DATA3
DATA3
24
8
read-only
RDB
CAN Receive High Byte Register
0x2C
32
read-write
n
0x0
0x0
DATA4
DATA4
0
8
read-only
DATA5
DATA5
8
8
read-only
DATA6
DATA6
16
8
read-only
DATA7
DATA7
24
8
read-only
RFS
CAN Receive Frame Status Register
0x20
32
read-write
n
0x0
0x0
ACF0
ACF0
16
1
read-only
ACF1
ACF1
17
1
read-only
ACF10
ACF10
27
1
read-only
ACF11
ACF11
28
1
read-only
ACF12
ACF12
29
1
read-only
ACF13
ACF13
30
1
read-only
ACF2
ACF2
18
1
read-only
ACF3
ACF3
19
1
read-only
ACF4
ACF4
20
1
read-only
ACF5
ACF5
21
1
read-only
ACF6
ACF6
22
1
read-only
ACF7
ACF7
24
1
read-only
ACF8
ACF8
25
1
read-only
ACF9
ACF9
26
1
read-only
DLC
Data Length Code
0
4
read-only
RID
CAN Receive Identification Register
0x24
32
read-write
n
0x0
0x0
FF
FF
2
1
read-only
ID
ID
3
29
read-only
RTR
RTR
1
1
read-only
SR
CAN Status Register
0x1C
32
read-only
n
0x0
0x0
BS0
Bus Status
7
1
read-only
BS1
Bus Status
15
1
read-only
BS2
Bus Status
23
1
read-only
DOS0
Data Overrun Status
1
1
read-only
DOS1
Data Overrun Status
9
1
read-only
DOS2
Data Overrun Status
17
1
read-only
ES0
Error Status
6
1
read-only
ES1
Error Status
14
1
read-only
ES2
Error Status
22
1
read-only
RBS0
Receive Buffer Status
0
1
read-only
RBS1
Receive Buffer Status
8
1
read-only
RBS2
Receive Buffer Status
16
1
read-only
RS0
Receive Status
4
1
read-only
RS1
Receive Status
12
1
read-only
RS2
Receive Status
20
1
read-only
TBS0
Transmit Buffer Status 0
2
1
read-only
TBS1
Transmit Buffer Status 1
10
1
read-only
TBS2
Transmit Buffer Status 2
18
1
read-only
TCS0
Tx Buffer 0 Transmission Complete Status
3
1
read-only
TCS1
Tx Buffer1 Transmission Complete Status
11
1
read-only
TCS2
Tx Buffer 2 Transmission Complete Status
19
1
read-only
TS0
Receive Status 0
5
1
read-only
TS1
Receive Status 1
13
1
read-only
TS2
Receive Status 2
21
1
read-only
CHIPCTL
CHIPCTL
CHIPCTL
0x0
0x0
0x1000
registers
n
CHIP_KEY
CHIP_KEY Register
0x5C
32
read-write
n
0x0
0x0
CLKCFG0
CLKCFG0 Register
0x4
32
read-write
n
0x0
0x0
PLLDIV
PLL reference clock prescale
4
4
read-write
PLLMULT
PLL mult select
10
2
read-write
PLLSRC
PLL source
0
1
read-write
XCLKDIV
XCLK output prescale
28
3
read-write
XCLKINSEL
XCLK input select
20
2
read-write
XCLKSEL
XCLK output select
24
4
read-write
CLKCFG1
CLKCFG1 Register
0x8
32
read-write
n
0x0
0x0
SYSCLKLOCK
system clock lock status
4
1
read-only
SYSCLKSEL
system clock select
0
2
read-write
SYSTICKSEL
systick clock select
8
2
read-write
CLKCFG2
CLKCFG2 Register
0xC
32
read-write
n
0x0
0x0
HDIV
AHB clock prescale
0
8
read-write
MTDIV
motor control clock prescale
8
4
read-write
PDIV01
APB01 clock prescale
16
4
read-write
PDIV23
APB23 clock prescale
24
4
read-write
CLKCTRL
CLKCTRL Register
0x0
32
read-write
n
0x0
0x0
OSCDETEN
OSC detect enable
1
1
read-write
OSCEN
OSC enable
0
1
read-write
OSCGAIN
OSC gain
4
2
read-write
OSCRFEN
OSC internal resistor enable
6
1
read-write
OSCSTB
OSC stable status
11
1
read-only
OSCSTB_SEL
OSC stable time select
8
2
read-write
OSCSTOP
OSC stop
2
1
read-write
OSCXCKEN
OSCOUT enable
7
1
read-write
PLLEN
PLL enable
28
1
read-write
PLL_LOCK
PLL lock status
30
1
read-only
RCHEN
RCH enable
12
1
read-write
RCHPT
RCH temperature trim value
24
4
read-write
RCHSTB
RCH stable status
14
1
read-only
RCHTRIM
RCH trim value
16
8
read-write
CLKEN_H01
CLKEN_H01 Register
0x10
32
read-write
n
0x0
0x0
PA_EN
port A clock enable
0
1
read-write
PB_EN
port B clock enable
1
1
read-write
PC_EN
port C clock enable
2
1
read-write
PD_EN
port D clock enable
3
1
read-write
PE_EN
port E clock enable
4
1
read-write
PF_EN
port F clock enable
5
1
read-write
CLKEN_H23
CLKEN_H23 Register
0x14
32
read-write
n
0x0
0x0
ATOM_EN
ATOM clock enable
2
1
read-write
COPROC_EN
COPROC clock enable
0
1
read-write
CLKEN_P01
CLKEN_P01 Register
0x18
32
read-write
n
0x0
0x0
CAN_EN
CAN clock enable
30
1
read-write
DMA_EN
DMA clock enable
6
1
read-write
ERU_EN
ERU clock enable
3
1
read-write
I2C_EN
I2C clock enable
23
1
read-write
PPU_EN
PPU clock enable
2
1
read-write
SSP0_EN
SSP0 clock enable
24
1
read-write
SSP1_EN
SSP1 clock enable
25
1
read-write
SSP2_EN
SSP2 clock enable
26
1
read-write
SSP3_EN
SSP3 clock enable
27
1
read-write
UART0_EN
UART0 clock enable
16
1
read-write
UART1_EN
UART1 clock enable
17
1
read-write
UART2_EN
UART2 clock enable
18
1
read-write
CLKEN_P23
CLKEN_P23 Register
0x1C
32
read-write
n
0x0
0x0
ADC_EN
ADC clock enable
8
1
read-write
CMPSS_EN
CMPSS clock enable
11
1
read-write
ECAP_EN
ECAP clock enable
0
1
read-write
EQEP_EN
EQEP clock enable
2
1
read-write
PWM_GP0_EN
PWM group0 clock enable
4
1
read-write
PWM_GP1_EN
PWM group1 clock enable
5
1
read-write
TIMER_EN
TIMER clock enable
15
1
read-write
INTMASK
INTMASK Register
0x50
32
read-write
n
0x0
0x0
CVM
CVM interrupt mask
2
1
read-write
DBG_WAKEUP
DBG_WAKEUP interrupt mask
12
1
read-write
IO_WAKEUP
IO_WAKEUP interrupt mask
11
1
read-write
IWDTRST
IWDTRST interrupt mask
7
1
read-write
LOCKUP
LOCKUP interrupt mask
9
1
read-write
LVD
LVD interrupt mask
4
1
read-write
LVR
LVR interrupt mask
3
1
read-write
NRST
NRST interrupt mask
5
1
read-write
OSCEN_CFGERR
OSC enable config error interrupt mask
28
1
read-write
OSC_MISS
OSC miss interrupt mask
18
1
read-write
PLLEN_CFGERR
PLL enable config error interrupt mask
29
1
read-write
PLLSRC_CFGERR
PLL source config error interrupt mask
25
1
read-write
PLL_MISS
PLL miss interrupt mask
20
1
read-write
POC
POC interrupt mask
1
1
read-write
POR
POR interrupt mask
0
1
read-write
RCHEN_CFGERR
RCH enable config error interrupt mask
27
1
read-write
RCH_MISS
RCH miss interrupt mask
16
1
read-write
SCLKSEL_CFGERR
system clock select config error interrupt mask
24
1
read-write
SRST
SRST interrupt mask
8
1
read-write
SYSCLKMUX_ERR
system clock error interrupt mask
22
1
read-write
SYSCLKMUX_RST
SYSCLKMUX_RST interrupt mask
10
1
read-write
WDTRST
WDTRST interrupt mask
6
1
read-write
IWDT_CFG
IWDT_CFG Register
0x40
32
read-write
n
0x0
0x0
WINEN
window function enable
0
1
read-write
WINSEL
window value select
8
1
read-write
IWDT_CLKDIV
IWDT_CLKDIV Register
0x44
32
read-write
n
0x0
0x0
CLKDIV
IWDT clock prescale
0
4
read-write
IWDT_CTRL
IWDT_CTRL Register
0x3C
32
write-only
n
0x0
0x0
IWDT_RLD
IWDT_RLD Register
0x48
32
read-write
n
0x0
0x0
RLD
IWDT reload value
0
16
read-write
IWDT_STATUS
IWDT_STATUS Register
0x4C
32
read-only
n
0x0
0x0
CNT
IWDT counter
0
16
read-only
UPDATING
IWDT counter updating
31
1
read-only
WIN_INTR
window mode interrupt status
16
1
read-only
POWER_CTRL
POWER_CTRL Register
0x30
32
read-write
n
0x0
0x0
CVMEN
CVM enable
19
1
read-write
CVMREN
CVM reset enable
9
1
read-write
DEBUG_NOSLEEP
low power mode disable in debug mode
3
1
read-write
FLASH_CFG
FLASH clock config in sleep mode
4
1
read-write
FLASH_LPE
FLASH low power enable in deepsleep mode
5
1
read-write
LOCKUPREN
LOCKUP reset enable
10
1
read-write
LPE
Low Power Enable in deepsleep mode
0
1
read-write
LVDEN
LVD enable
20
1
read-write
LVES
LV external voltage select
21
1
read-write
LVLS
LV voltage level select
22
3
read-write
LVREN
Low Voltage reset enable
15
1
read-write
LVRS
LV reset voltage select
16
2
read-write
MVREN
MVR enable
11
1
read-write
MVRPS
MVR power select
12
1
read-write
MVRSEL
MVR voltage select
13
1
read-write
POCREN
POC reset enable
8
1
read-write
SRAM_CFG
SRAM clock config in sleep mode
6
1
read-write
SYSCLK_DETEN
system clock detect enable
2
1
read-write
SYSCLK_MUX_RSTEN
system clock select error reset enable
1
1
read-write
VTSEL
VTS select
28
2
read-write
VTSEN
VTS enable
27
1
read-write
REMAP_CTRL
REMAP_CTRL Register
0x38
32
read-write
n
0x0
0x0
DBG_USEASFUNC
DEBUG pin used as GPIO
12
1
read-write
REMAP
eflash bootloader remap
0
1
read-write
REMAP_KEY
REMAP access enable
16
16
write-only
SYSRST_OUTEN
system reset output enable
9
1
read-write
SYSRST_SEL
system reset output select
10
1
read-write
XRST_USEASFUNC
XRST pin used as GPIO
8
1
read-write
SRST_REQ_H01
SRST_REQ_H01 Register
0x20
32
read-write
n
0x0
0x0
PA_RST
port A software reset
0
1
read-write
PB_RST
port B software reset
1
1
read-write
PC_RST
port C software reset
2
1
read-write
PD_RST
port D software reset
3
1
read-write
PE_RST
port E software reset
4
1
read-write
PF_RST
port F software reset
5
1
read-write
SRST_REQ_H23
SRST_REQ_H23 Register
0x24
32
read-write
n
0x0
0x0
ATOM_RST
ATOM software reset
2
1
read-write
COPROC_RST
COPROC software reset
0
1
read-write
SRST_REQ_P01
SRST_REQ_P01 Register
0x28
32
read-write
n
0x0
0x0
CAN_RST
CAN software reset
30
1
read-write
DMA_RST
DMA software reset
6
1
read-write
ERU_RST
ERU software reset
3
1
read-write
I2C_RST
I2C software reset
23
1
read-write
PPU_RST
PPU software reset
2
1
read-write
SSP0_RST
SSP0 software reset
24
1
read-write
SSP1_RST
SSP1 software reset
25
1
read-write
SSP2_RST
SSP2 software reset
26
1
read-write
SSP3_RST
SSP3 software reset
27
1
read-write
UART0_RST
UART0 software reset
16
1
read-write
UART1_RST
UART1 software reset
17
1
read-write
UART2_RST
UART2 software reset
18
1
read-write
SRST_REQ_P23
SRST_REQ_P23 Register
0x2C
32
read-write
n
0x0
0x0
ADC_RST
ADC software reset
8
1
read-write
CMPSS_RST
CMPSS software reset
11
1
read-write
ECAP_RST
ECAP software reset
0
1
read-write
EQEP_RST
EQEP software reset
2
1
read-write
PWM_GP0_RST
PWM group0 software reset
4
1
read-write
PWM_GP1_RST
PWM group1 software reset
5
1
read-write
TIMER_RST
TIMER software reset
15
1
read-write
STATUS0
STATUS0 Register
0x54
32
read-write
n
0x0
0x0
CVM
CVM event status
2
1
read-only
DBG_VALID
DBG VALID event status
12
1
read-only
IO_WAKEUP
IO_WAKEUP event status
11
1
read-only
IWDTRST
IWDT Reset event status
7
1
read-only
LOCKUP
LOCKUP event status
9
1
read-only
LOCKUP1
Core 1 LOCKUP event status
15
1
read-only
LVD
LVD event status
4
1
read-only
LVR
LVR event status
3
1
read-only
NRST
External Reset event status
5
1
read-only
OSCEN_CFGERR
OSC enable config error event status
28
1
read-only
OSC_MISS
OSC miss event status
18
1
read-only
PLLEN_CFGERR
PLL enable config error event status
29
1
read-only
PLLSRC_CFGERR
PLL source config error event status
25
1
read-only
PLL_MISS
PLL miss event status
20
1
read-only
POC
POC event status
1
1
read-only
POR
POR event status
0
1
read-only
RCHEN_CFGERR
RCH enable config error event status
27
1
read-only
RCH_MISS
RCH miss event status
16
1
read-only
SCLKSEL_CFGERR
system clock select config error event status
24
1
read-only
SRST
System Reset event status
8
1
read-only
SRST1
Core 1 System Reset event status
14
1
read-only
SYSCLKMUX_ERR
system clock error event status
22
1
read-only
SYSCLKMUX_RST
SYSCLKMUX_RST event status
10
1
read-only
WDT1RST
WDT1RST event status
13
1
read-only
WDTRST
WDT0 Reset event status
6
1
read-only
STATUS1
STATUS1 Register
0x58
32
read-only
n
0x0
0x0
BGRFLAG
BGR flag
11
1
read-only
CVMFLAG
CVM flag
9
1
read-only
IWDT_INTR
IWDT interrupt status
13
1
read-only
LVDFLAG
LVD flag
7
1
read-only
OSCSTOP
OSC stop status
0
1
read-only
PLLLOCK
PLL lock status
5
1
read-only
RCHSTB
RCH stable status
3
1
read-only
VERSION
VERSION Register
0xC00
32
read-only
n
0x0
0x0
WAKEUP_CTRL
WAKEUP_CTRL Register
0x34
32
read-write
n
0x0
0x0
DEBUG_WAKEUPEN
DEBUG wake up enable
4
1
read-write
IO_WAKEUPEN
GPIO wake up enable
0
1
read-write
IWDT_WAKEUPEN
IWDT wake up enable
2
1
read-write
LVD_WAKEUPEN
LVD wake up enable
8
1
read-write
CMPSS0
CMPSS Module 0
CMPSS
0x0
0x0
0x200
registers
n
COMPCTL
CMPSS Comparator Control Register
0x0
32
read-write
n
0x0
0x0
ASYNCHEN
High comparator asynchronous path enable
6
1
read-write
ASYNCLEN
Low comparator asynchronous path enable
14
1
read-write
COMPDACE
Comparator/DAC enable
15
1
read-write
COMPHINV
High comparator output invert
1
1
read-write
COMPHSOURCE
High comparator input source
0
1
read-write
COMPLINV
Low comparator output invert
9
1
read-write
COMPLSOURCE
Low comparator input source
8
1
read-write
CTRIPHSEL
High comparator CTRIPH source select
2
2
read-write
CTRIPLSEL
Low comparator CTRIPL source select
10
2
read-write
CTRIPOUTHSEL
High comparator CTRIPOUTH source select
4
2
read-write
CTRIPOUTLSEL
Low comparator CTRIPOUTL source select
12
2
read-write
COMPDACCTL
CMPSS DAC Control Register
0x10
32
read-write
n
0x0
0x0
COMPH_PD
COMPH Power Down
12
1
read-write
COMPL_PD
COMPL Power Down
10
1
read-write
DACH_PD
DACH Power Down
11
1
read-write
DACL_PD
DACL Power Down
9
1
read-write
DACSOURCE
DAC source select
0
1
read-write
FREESOFT
Free-run or software-run emulation behavior
14
2
read-write
RAMPLOADSEL
Ramp load select
6
1
read-write
RAMPSOURCE
Ramp generator source select
1
4
read-write
SELREF_H
DACH reference select
8
1
read-write
SELREF_L
DACL reference select
5
1
read-write
SWLOADSEL
Software load select
7
1
read-write
COMPHYSCTL
CMPSS Comparator Hysteresis Control Register
0x4
32
read-write
n
0x0
0x0
HYS_H
High comparator hysteresis
3
2
read-write
HYS_H_EN
High comparator hysteresis enable
5
1
read-write
HYS_L
Low comparator hysteresis
0
2
read-write
HYS_L_EN
Low comparator hysteresis enable
2
1
read-write
COMPLOCK
CMPSS Lock Register
0x68
32
read-write
n
0x0
0x0
COMPCTL
Lock write-access to the COMPCTL register
0
1
read-write
COMPHYSCTL
Lock write-access to the COMPHYSCTL register
1
1
read-write
CTRIP
Lock write-access to the CTRIPxFILTCTL and CTRIPxFILCLKCTL registers
3
1
read-write
DACCTL
Lock write-access to the DACCTL register
2
1
read-write
COMPSTS
CMPSS Comparator Status Register
0x8
32
read-only
n
0x0
0x0
COMPHLATCH
Latched value of high comparator digital filter output
1
1
read-only
COMPHSTS
High comparator digital filter output
0
1
read-only
COMPLLATCH
Latched value of low comparator digital filter output
9
1
read-only
COMPLSTS
Low comparator digital filter output
8
1
read-only
COMPSTSCLR
CMPSS Comparator Status Clear Register
0xC
32
read-write
n
0x0
0x0
HLATCHCLR
High comparator latch software clear
1
1
read-write
HSYNCCLREN
High comparator latch PWMSYNC clear
2
1
read-write
LLATCHCLR
Low comparator latch software clear
9
1
read-write
LSYNCCLREN
Low comparator latch PWMSYNC clear
10
1
read-write
CTRIPHFILCLKCTL
CTRIPH Filter Clock Control Register
0x64
32
read-write
n
0x0
0x0
CLKPRESCALE
High filter sample clock prescale
0
10
read-write
CTRIPHFILCTL
CTRIPH Filter Control Register
0x60
32
read-write
n
0x0
0x0
FILINIT
High filter initialization
15
1
read-write
SAMPWIN
High filter sample window size
4
5
read-write
THRESH
High filter majority voting threshold
9
5
read-write
CTRIPLFILCLKCTL
CTRIPL Filter Clock Control Register
0x5C
32
read-write
n
0x0
0x0
CLKPRESCALE
Low filter sample clock prescale
0
10
read-write
CTRIPLFILCTL
CTRIPL Filter Control Register
0x58
32
read-write
n
0x0
0x0
FILINIT
Low filter initialization
15
1
read-write
SAMPWIN
Low filter sample window size
4
5
read-write
THRESH
Low filter majority voting threshold
9
5
read-write
DACBUFFEREN
DAC Output Enable Register
0x6C
32
read-write
n
0x0
0x0
DACOUTEN
DAC output enable
0
1
read-write
DACHVALA
CMPSS High DAC Value Active Register
0x1C
32
read-only
n
0x0
0x0
DACVAL
High DAC active value
0
12
read-only
DACHVALS
CMPSS High DAC Value Shadow Register
0x18
32
read-write
n
0x0
0x0
DACVAL
High DAC shadow value
0
12
read-write
DACLVALA
CMPSS Low DAC Value Active Register
0x4C
32
read-only
n
0x0
0x0
DACVAL
High DAC active value
0
12
read-only
DACLVALS
CMPSS Low DAC Value Shadow Register
0x48
32
read-write
n
0x0
0x0
DACVAL
Low DAC shadow value
0
12
read-write
DACTRIM
DAC Trim Register
0x70
32
read-write
n
0x0
0x0
OFFSET_TRIM_H
DACH Offset Trim
8
8
read-write
OFFSET_TRIM_L
DACL Offset Trim
0
8
read-write
RAMPDECVALA
CMPSS Ramp Decrement Value Active Register
0x30
32
read-only
n
0x0
0x0
RAMPDECVALS
CMPSS Ramp Decrement Value Shadow Register
0x38
32
read-write
n
0x0
0x0
RAMPDLYA
CMPSS Ramp Delay Active Register
0x50
32
read-only
n
0x0
0x0
DELAY
Ramp delay active value
0
13
read-only
RAMPDLYS
CMPSS Ramp Delay Shadow Register
0x54
32
read-write
n
0x0
0x0
DELAY
Ramp delay shadow value
0
13
read-write
RAMPMAXREFA
CMPSS Ramp Max Reference Active Register
0x20
32
read-only
n
0x0
0x0
RAMPMAXREFS
CMPSS Ramp Max Reference Shadow Register
0x28
32
read-write
n
0x0
0x0
RAMPSTS
CMPSS Ramp Status Register
0x40
32
read-only
n
0x0
0x0
CMPSS1
CMPSS Module 0
CMPSS
0x0
0x0
0x200
registers
n
COMPCTL
CMPSS Comparator Control Register
0x0
32
read-write
n
0x0
0x0
ASYNCHEN
High comparator asynchronous path enable
6
1
read-write
ASYNCLEN
Low comparator asynchronous path enable
14
1
read-write
COMPDACE
Comparator/DAC enable
15
1
read-write
COMPHINV
High comparator output invert
1
1
read-write
COMPHSOURCE
High comparator input source
0
1
read-write
COMPLINV
Low comparator output invert
9
1
read-write
COMPLSOURCE
Low comparator input source
8
1
read-write
CTRIPHSEL
High comparator CTRIPH source select
2
2
read-write
CTRIPLSEL
Low comparator CTRIPL source select
10
2
read-write
CTRIPOUTHSEL
High comparator CTRIPOUTH source select
4
2
read-write
CTRIPOUTLSEL
Low comparator CTRIPOUTL source select
12
2
read-write
COMPDACCTL
CMPSS DAC Control Register
0x10
32
read-write
n
0x0
0x0
COMPH_PD
COMPH Power Down
12
1
read-write
COMPL_PD
COMPL Power Down
10
1
read-write
DACH_PD
DACH Power Down
11
1
read-write
DACL_PD
DACL Power Down
9
1
read-write
DACSOURCE
DAC source select
0
1
read-write
FREESOFT
Free-run or software-run emulation behavior
14
2
read-write
RAMPLOADSEL
Ramp load select
6
1
read-write
RAMPSOURCE
Ramp generator source select
1
4
read-write
SELREF_H
DACH reference select
8
1
read-write
SELREF_L
DACL reference select
5
1
read-write
SWLOADSEL
Software load select
7
1
read-write
COMPHYSCTL
CMPSS Comparator Hysteresis Control Register
0x4
32
read-write
n
0x0
0x0
HYS_H
High comparator hysteresis
3
2
read-write
HYS_H_EN
High comparator hysteresis enable
5
1
read-write
HYS_L
Low comparator hysteresis
0
2
read-write
HYS_L_EN
Low comparator hysteresis enable
2
1
read-write
COMPLOCK
CMPSS Lock Register
0x68
32
read-write
n
0x0
0x0
COMPCTL
Lock write-access to the COMPCTL register
0
1
read-write
COMPHYSCTL
Lock write-access to the COMPHYSCTL register
1
1
read-write
CTRIP
Lock write-access to the CTRIPxFILTCTL and CTRIPxFILCLKCTL registers
3
1
read-write
DACCTL
Lock write-access to the DACCTL register
2
1
read-write
COMPSTS
CMPSS Comparator Status Register
0x8
32
read-only
n
0x0
0x0
COMPHLATCH
Latched value of high comparator digital filter output
1
1
read-only
COMPHSTS
High comparator digital filter output
0
1
read-only
COMPLLATCH
Latched value of low comparator digital filter output
9
1
read-only
COMPLSTS
Low comparator digital filter output
8
1
read-only
COMPSTSCLR
CMPSS Comparator Status Clear Register
0xC
32
read-write
n
0x0
0x0
HLATCHCLR
High comparator latch software clear
1
1
read-write
HSYNCCLREN
High comparator latch PWMSYNC clear
2
1
read-write
LLATCHCLR
Low comparator latch software clear
9
1
read-write
LSYNCCLREN
Low comparator latch PWMSYNC clear
10
1
read-write
CTRIPHFILCLKCTL
CTRIPH Filter Clock Control Register
0x64
32
read-write
n
0x0
0x0
CLKPRESCALE
High filter sample clock prescale
0
10
read-write
CTRIPHFILCTL
CTRIPH Filter Control Register
0x60
32
read-write
n
0x0
0x0
FILINIT
High filter initialization
15
1
read-write
SAMPWIN
High filter sample window size
4
5
read-write
THRESH
High filter majority voting threshold
9
5
read-write
CTRIPLFILCLKCTL
CTRIPL Filter Clock Control Register
0x5C
32
read-write
n
0x0
0x0
CLKPRESCALE
Low filter sample clock prescale
0
10
read-write
CTRIPLFILCTL
CTRIPL Filter Control Register
0x58
32
read-write
n
0x0
0x0
FILINIT
Low filter initialization
15
1
read-write
SAMPWIN
Low filter sample window size
4
5
read-write
THRESH
Low filter majority voting threshold
9
5
read-write
DACBUFFEREN
DAC Output Enable Register
0x6C
32
read-write
n
0x0
0x0
DACOUTEN
DAC output enable
0
1
read-write
DACHVALA
CMPSS High DAC Value Active Register
0x1C
32
read-only
n
0x0
0x0
DACVAL
High DAC active value
0
12
read-only
DACHVALS
CMPSS High DAC Value Shadow Register
0x18
32
read-write
n
0x0
0x0
DACVAL
High DAC shadow value
0
12
read-write
DACLVALA
CMPSS Low DAC Value Active Register
0x4C
32
read-only
n
0x0
0x0
DACVAL
High DAC active value
0
12
read-only
DACLVALS
CMPSS Low DAC Value Shadow Register
0x48
32
read-write
n
0x0
0x0
DACVAL
Low DAC shadow value
0
12
read-write
DACTRIM
DAC Trim Register
0x70
32
read-write
n
0x0
0x0
OFFSET_TRIM_H
DACH Offset Trim
8
8
read-write
OFFSET_TRIM_L
DACL Offset Trim
0
8
read-write
RAMPDECVALA
CMPSS Ramp Decrement Value Active Register
0x30
32
read-only
n
0x0
0x0
RAMPDECVALS
CMPSS Ramp Decrement Value Shadow Register
0x38
32
read-write
n
0x0
0x0
RAMPDLYA
CMPSS Ramp Delay Active Register
0x50
32
read-only
n
0x0
0x0
DELAY
Ramp delay active value
0
13
read-only
RAMPDLYS
CMPSS Ramp Delay Shadow Register
0x54
32
read-write
n
0x0
0x0
DELAY
Ramp delay shadow value
0
13
read-write
RAMPMAXREFA
CMPSS Ramp Max Reference Active Register
0x20
32
read-only
n
0x0
0x0
RAMPMAXREFS
CMPSS Ramp Max Reference Shadow Register
0x28
32
read-write
n
0x0
0x0
RAMPSTS
CMPSS Ramp Status Register
0x40
32
read-only
n
0x0
0x0
COPROC
Co-Processor Registers
COPROC
0x0
0x0
0x1000
registers
n
COPROC
COPROC Interrupt
13
Cordic_config
Cordic Config Register
0x84
32
read-write
n
0x0
0x0
bypass_post
bypass_post
5
1
write-only
bypass_pre
bypass_pre
4
1
read-write
func_mode
func_mode
12
2
read-write
Iteration
Iteration
16
5
read-write
keepX
keepX
0
1
read-write
keepY
keepY
1
1
read-write
keepZ
keepZ
2
1
read-write
mode
mode
8
1
read-write
Cordic_CTRL
Cordic Control Register
0x80
32
read-write
n
0x0
0x0
Cordic_done
Cordic done
0
1
read-write
Cordic_done_intr_en
Cordic done intrrupt enable
4
1
read-write
cordic_mult
cordic multiplicative
20
1
read-write
cordic_mult_add
cordic multiplicative add
21
1
read-write
cordic_mult_sub
cordic multiplicative subtraction
22
1
read-write
cordic_start
cordic start
8
1
write-only
cordic_x_linkmultb
cordic x link to multiplicative
16
1
read-write
cordic_y_linkmultb
cordic y link to multiplicative
17
1
read-write
cordic_z_linkmultb
cordic z link to multiplicative
18
1
read-write
Overflow
Overflow
1
1
read-write
Overflow_intr_en
Overflow intrrupt enable
5
1
read-write
Cordic_Xi
Cordic X Input Register
0x90
32
read-write
n
0x0
0x0
Cordic_XO
Cordic X Output Register
0xA0
32
read-only
n
0x0
0x0
Cordic_Yi
Cordic Y Input Register
0x94
32
read-write
n
0x0
0x0
Cordic_YO
Cordic Y Output Register
0xA4
32
read-only
n
0x0
0x0
Cordic_Zi
Cordic Z Input Register
0x98
32
read-write
n
0x0
0x0
Cordic_ZO
Cordic Z Output Register
0xA8
32
read-only
n
0x0
0x0
CRC_CTRL
CRC Control Register
0x60
32
read-write
n
0x0
0x0
Cordic_done
Cordic_done
4
1
read-write
crc_byte
CRC significant bytes
8
2
read-write
crc_gps
CRC polynomial selection
24
2
read-write
crc_lm
CRC size side selection
16
1
read-write
Overflow
Overflow
5
1
read-write
reset
reset
0
1
write-only
reset_crc
reset_crc
1
1
write-only
CRC_DATA
CRC Data Register
0x64
32
read-write
n
0x0
0x0
CRC_RESULT
CRC Result Register
0x68
32
read-write
n
0x0
0x0
DIV_AHI
Dividend High Register
0x38
32
read-write
n
0x0
0x0
DIV_ALO
Dividend Low Register
0x34
32
read-write
n
0x0
0x0
DIV_B
Divisor Register
0x3C
32
read-write
n
0x0
0x0
DIV_CTRL
Division Control Register
0x30
32
read-write
n
0x0
0x0
divider_32bit
divider_32bit
8
1
read-write
div_by_0
div_by_0
24
1
read-write
div_reset
div_reset
0
1
write-only
DIV_QUOTHI
Quotient High Register
0x44
32
read-write
n
0x0
0x0
DIV_QUOTLO
Quotient Low Register
0x40
32
read-write
n
0x0
0x0
DIV_REM
Remainder Register
0x48
32
read-write
n
0x0
0x0
MULTA
MULTA Register
0x8
32
read-write
n
0x0
0x0
MULTA_ADD
MULTA_ADD Register
0x10
32
read-write
n
0x0
0x0
MULTA_SUB
MULTA_SUB Register
0x18
32
read-write
n
0x0
0x0
MULTB
MULTB Register
0xC
32
read-write
n
0x0
0x0
MULTB_ADD
MULTB_ADD Register
0x14
32
read-write
n
0x0
0x0
MULTB_SUB
MULTB_SUB
0x1C
32
read-write
n
0x0
0x0
MULT_CTRL
Multiplication Control Register
0x0
32
read-write
n
0x0
0x0
carry
carry flag
9
1
read-write
cr_intr_en
Enable interrupt enable
13
1
read-write
mult_only
mult only
19
1
read-write
mult_signed
mult signed
31
1
read-write
overflow
overflow flag
8
1
read-write
ov_intr_en
Overflow interrupt enable
12
1
read-write
reset_mult
Reset multiply dependent register
0
1
write-only
reset_result
Reset multiply result register
1
1
write-only
shift_en
shift_en
17
1
read-write
shift_imm
shift_imm
16
1
read-write
shift_sel
shift select
18
1
read-write
MULT_RESULHI
MULT_RESULHI Register
0x24
32
read-write
n
0x0
0x0
MULT_RESULLO
MULT_RESULLO Register
0x20
32
read-write
n
0x0
0x0
SHIFT_NUM
Left Shift Number Register
0x4
32
read-write
n
0x0
0x0
DMA
DMA
DMA
0x0
0x0
0x1000
registers
n
DMA
DMA Interrupt
12
ACTIVE
Active Register
0xC8
32
read-only
n
0x0
0x0
ALT_BASE_PTR
Channel Standby Control Base Address Pointer Register
0x8
32
read-only
n
0x0
0x0
BASE_PTR
Channel Control Base Address Pointer Register
0x4
32
read-write
n
0x0
0x0
BUS_ERR
Bus Error Register
0xD4
32
read-write
n
0x0
0x0
CFG
DMA Configure Register
0x0
32
read-write
n
0x0
0x0
ENABLE
DMA ENABLE
0
1
read-write
PORT
DMA PORT
1
3
read-write
RESET
DMA RESET
31
1
read-write
CFG_ERR
Configure Error Register
0xD0
32
read-write
n
0x0
0x0
CTRL0
DMA Channel 0 Control Register
0x20
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
CTRL1
DMA Channel 1 Control Register
0x24
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
CTRL2
DMA Channel 2 Control Register
0x28
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
CTRL3
DMA Channel 3 Control Register
0x2C
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
CTRL4
DMA Channel 4 Control Register
0x30
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
CTRL5
DMA Channel 5 Control Register
0x34
32
read-write
n
0x0
0x0
CHNL_BUSERR_INTREN
bus error interrupt enable of channel n
24
1
read-write
CHNL_CFGERR_INTREN
configuration error interrupt enable of channel n
25
1
read-write
CHNL_DMADONE_INTREN
DMA completes the interrupt enable of channel n
28
1
read-write
CHNL_ENABLE
Channel n enable
0
1
read-write
CHNL_PRIORITY
priority setting of Channel n
5
1
read-write
CHNL_PRI_ALT
Select the pointer of the main / standby base of n channel
2
1
read-write
CHNL_REQ0_MASK
Channel n request 0 shielding
15
1
read-write
CHNL_REQ0_SEL
Channel n request option 0
8
5
read-write
CHNL_REQ1_MASK
Channel n request 1 shielding
23
1
read-write
CHNL_REQ1_SEL
Channel n request option 1
16
5
read-write
CHNL_USE_BURST
Channel n uses continuous transmission
4
1
read-write
DONE
Done Register
0xCC
32
read-write
n
0x0
0x0
REQUEST_ON
DMA Request Wait Status Register
0xC4
32
read-only
n
0x0
0x0
STATUS
DMA Status Control Register
0xC0
32
read-only
n
0x0
0x0
CHNL_NUM_MINUS1
Busy
16
5
read-only
CREQ_NUM_MINUS1
Busy
8
5
read-only
ENABLE
Package Size
0
1
read-only
STATE
Transmit Size
4
4
read-only
SW_REQ
Software Request Register
0xC
32
write-only
n
0x0
0x0
VERSION
DMA Version Register
0xC00
32
read-only
n
0x0
0x0
ECAP0
ECAP0
ECAP
0x0
0x0
0x400
registers
n
ECAP0
ECAP0 Interrupt
6
CAP1
Capture-1 Register
0x10
32
read-write
n
0x0
0x0
CAP1
CEVT1 counter load
0
32
read-write
CAP2
Capture-2 Register
0x18
32
read-write
n
0x0
0x0
CAP2
CEVT2 counter load
0
32
read-write
CAP3
Capture-3 Register
0x20
32
read-write
n
0x0
0x0
CAP3
CEVT3 counter load
0
32
read-write
CAP4
Capture-4 Register
0x28
32
read-write
n
0x0
0x0
CAP4
CEVT4 counter load
0
32
read-write
CTRPHS
Counter Phase Control Register
0x8
32
read-write
n
0x0
0x0
CTRPHS
Counter phase value
0
32
read-write
ECCLR
ECAP Interrupt Clear Register
0x60
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-write
CEVT2
Capture Event 2 Flag
2
1
read-write
CEVT3
Capture Event 3 Flag
3
1
read-write
CEVT4
Capture Event 4 Flag
4
1
read-write
CTROVF
Counter Overflow Flag
5
1
read-write
CTR_CMP
Counter Equal Compare Flag
7
1
read-write
CTR_PRD
Counter Equal Period Flag
6
1
read-write
INT
Global Interrupt Flag
0
1
read-write
ECCTL1
ECAP Control Register 1
0x50
32
read-write
n
0x0
0x0
CAP1POL
Capture Event 1 Polarity select
0
1
read-write
CAP2POL
Capture Event 2 Polarity select
2
1
read-write
CAP3POL
Capture Event 3 Polarity select
4
1
read-write
CAP4POL
Capture Event 4 Polarity select
6
1
read-write
CAPLDEN
CAP1-4 registers Load Enable
8
1
read-write
CTRRST1
Counter Reset on Capture Event 1
1
1
read-write
CTRRST2
Counter Reset on Capture Event 2
3
1
read-write
CTRRST3
Counter Reset on Capture Event 3
5
1
read-write
CTRRST4
Counter Reset on Capture Event 4
7
1
read-write
FREE_SOFT
Emulation Control
14
2
read-write
PRESCALE
Event Filter prescale select
9
5
read-write
ECCTL2
ECAP Control Register 2
0x54
32
read-write
n
0x0
0x0
APWM
APWM Mode Enable
9
1
read-write
APWMPOL
APWM Output Polarity Select
10
1
read-write
ONESHT
One-Shot Mode Enable
0
1
read-write
RE_ARM
One-Shot Re-Arming Control
3
1
read-write
STOP_WRAP
Stop Value for One-Shot Mode
1
2
read-write
SWSYNC
Software-forced Counter Synchronizing
8
1
read-write
SYNCI_EN
TSCTR Sync-In Enable
5
1
read-write
SYNCO_SEL
Sync-Out Select
6
2
read-write
TSCTRSTOP
TSCTR Stop Control
4
1
read-write
ECEINT
ECAP Interrupt Enable Register
0x58
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Interrupt Enable
1
1
read-write
CEVT2
Capture Event 2 Interrupt Enable
2
1
read-write
CEVT3
Capture Event 3 Interrupt Enable
3
1
read-write
CEVT4
Capture Event 4 Interrupt Enable
4
1
read-write
CTROVF
Counter Overflow Interrupt Enable
5
1
read-write
CTR_CMP
Counter Equal Compare Interrupt Enable
7
1
read-write
CTR_PRD
Counter Equal Period Interrupt Enable
6
1
read-write
ECFLG
ECAP Interrupt Flag Register
0x5C
32
read-only
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-only
CEVT2
Capture Event 2 Flag
2
1
read-only
CEVT3
Capture Event 3 Flag
3
1
read-only
CEVT4
Capture Event 4 Flag
4
1
read-only
CTROVF
Counter Overflow Flag
5
1
read-only
CTR_CMP
Counter Equal Compare Flag
7
1
read-only
CTR_PRD
Counter Equal Period Flag
6
1
read-only
INT
Global Interrupt Flag
0
1
read-only
ECFRC
ECAP Interrupt Forcing Register
0x64
32
read-write
n
0x0
0x0
CEVT1
Force Capture Event 1
1
1
read-write
CEVT2
Force Capture Event 2
2
1
read-write
CEVT3
Force Capture Event 3
3
1
read-write
CEVT4
Force Capture Event 4
4
1
read-write
CTROVF
Force Counter Overflow
5
1
read-write
CTR_CMP
Force Counter Equal Compare Interrupt
7
1
read-write
CTR_PRD
Force Counter Equal Period Interrupt
6
1
read-write
TSCTR
Time-Stamp Counter Register
0x0
32
read-write
n
0x0
0x0
TSCTR
Time-Stamp Counter
0
32
read-write
ECAP1
ECAP0
ECAP
0x0
0x0
0x400
registers
n
ECAP1
ECAP1 Interrupt
7
CAP1
Capture-1 Register
0x10
32
read-write
n
0x0
0x0
CAP1
CEVT1 counter load
0
32
read-write
CAP2
Capture-2 Register
0x18
32
read-write
n
0x0
0x0
CAP2
CEVT2 counter load
0
32
read-write
CAP3
Capture-3 Register
0x20
32
read-write
n
0x0
0x0
CAP3
CEVT3 counter load
0
32
read-write
CAP4
Capture-4 Register
0x28
32
read-write
n
0x0
0x0
CAP4
CEVT4 counter load
0
32
read-write
CTRPHS
Counter Phase Control Register
0x8
32
read-write
n
0x0
0x0
CTRPHS
Counter phase value
0
32
read-write
ECCLR
ECAP Interrupt Clear Register
0x60
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-write
CEVT2
Capture Event 2 Flag
2
1
read-write
CEVT3
Capture Event 3 Flag
3
1
read-write
CEVT4
Capture Event 4 Flag
4
1
read-write
CTROVF
Counter Overflow Flag
5
1
read-write
CTR_CMP
Counter Equal Compare Flag
7
1
read-write
CTR_PRD
Counter Equal Period Flag
6
1
read-write
INT
Global Interrupt Flag
0
1
read-write
ECCTL1
ECAP Control Register 1
0x50
32
read-write
n
0x0
0x0
CAP1POL
Capture Event 1 Polarity select
0
1
read-write
CAP2POL
Capture Event 2 Polarity select
2
1
read-write
CAP3POL
Capture Event 3 Polarity select
4
1
read-write
CAP4POL
Capture Event 4 Polarity select
6
1
read-write
CAPLDEN
CAP1-4 registers Load Enable
8
1
read-write
CTRRST1
Counter Reset on Capture Event 1
1
1
read-write
CTRRST2
Counter Reset on Capture Event 2
3
1
read-write
CTRRST3
Counter Reset on Capture Event 3
5
1
read-write
CTRRST4
Counter Reset on Capture Event 4
7
1
read-write
FREE_SOFT
Emulation Control
14
2
read-write
PRESCALE
Event Filter prescale select
9
5
read-write
ECCTL2
ECAP Control Register 2
0x54
32
read-write
n
0x0
0x0
APWM
APWM Mode Enable
9
1
read-write
APWMPOL
APWM Output Polarity Select
10
1
read-write
ONESHT
One-Shot Mode Enable
0
1
read-write
RE_ARM
One-Shot Re-Arming Control
3
1
read-write
STOP_WRAP
Stop Value for One-Shot Mode
1
2
read-write
SWSYNC
Software-forced Counter Synchronizing
8
1
read-write
SYNCI_EN
TSCTR Sync-In Enable
5
1
read-write
SYNCO_SEL
Sync-Out Select
6
2
read-write
TSCTRSTOP
TSCTR Stop Control
4
1
read-write
ECEINT
ECAP Interrupt Enable Register
0x58
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Interrupt Enable
1
1
read-write
CEVT2
Capture Event 2 Interrupt Enable
2
1
read-write
CEVT3
Capture Event 3 Interrupt Enable
3
1
read-write
CEVT4
Capture Event 4 Interrupt Enable
4
1
read-write
CTROVF
Counter Overflow Interrupt Enable
5
1
read-write
CTR_CMP
Counter Equal Compare Interrupt Enable
7
1
read-write
CTR_PRD
Counter Equal Period Interrupt Enable
6
1
read-write
ECFLG
ECAP Interrupt Flag Register
0x5C
32
read-only
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-only
CEVT2
Capture Event 2 Flag
2
1
read-only
CEVT3
Capture Event 3 Flag
3
1
read-only
CEVT4
Capture Event 4 Flag
4
1
read-only
CTROVF
Counter Overflow Flag
5
1
read-only
CTR_CMP
Counter Equal Compare Flag
7
1
read-only
CTR_PRD
Counter Equal Period Flag
6
1
read-only
INT
Global Interrupt Flag
0
1
read-only
ECFRC
ECAP Interrupt Forcing Register
0x64
32
read-write
n
0x0
0x0
CEVT1
Force Capture Event 1
1
1
read-write
CEVT2
Force Capture Event 2
2
1
read-write
CEVT3
Force Capture Event 3
3
1
read-write
CEVT4
Force Capture Event 4
4
1
read-write
CTROVF
Force Counter Overflow
5
1
read-write
CTR_CMP
Force Counter Equal Compare Interrupt
7
1
read-write
CTR_PRD
Force Counter Equal Period Interrupt
6
1
read-write
TSCTR
Time-Stamp Counter Register
0x0
32
read-write
n
0x0
0x0
TSCTR
Time-Stamp Counter
0
32
read-write
ECAP2
ECAP0
ECAP
0x0
0x0
0x400
registers
n
ECAP2
ECAP2 Interrupt
8
CAP1
Capture-1 Register
0x10
32
read-write
n
0x0
0x0
CAP1
CEVT1 counter load
0
32
read-write
CAP2
Capture-2 Register
0x18
32
read-write
n
0x0
0x0
CAP2
CEVT2 counter load
0
32
read-write
CAP3
Capture-3 Register
0x20
32
read-write
n
0x0
0x0
CAP3
CEVT3 counter load
0
32
read-write
CAP4
Capture-4 Register
0x28
32
read-write
n
0x0
0x0
CAP4
CEVT4 counter load
0
32
read-write
CTRPHS
Counter Phase Control Register
0x8
32
read-write
n
0x0
0x0
CTRPHS
Counter phase value
0
32
read-write
ECCLR
ECAP Interrupt Clear Register
0x60
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-write
CEVT2
Capture Event 2 Flag
2
1
read-write
CEVT3
Capture Event 3 Flag
3
1
read-write
CEVT4
Capture Event 4 Flag
4
1
read-write
CTROVF
Counter Overflow Flag
5
1
read-write
CTR_CMP
Counter Equal Compare Flag
7
1
read-write
CTR_PRD
Counter Equal Period Flag
6
1
read-write
INT
Global Interrupt Flag
0
1
read-write
ECCTL1
ECAP Control Register 1
0x50
32
read-write
n
0x0
0x0
CAP1POL
Capture Event 1 Polarity select
0
1
read-write
CAP2POL
Capture Event 2 Polarity select
2
1
read-write
CAP3POL
Capture Event 3 Polarity select
4
1
read-write
CAP4POL
Capture Event 4 Polarity select
6
1
read-write
CAPLDEN
CAP1-4 registers Load Enable
8
1
read-write
CTRRST1
Counter Reset on Capture Event 1
1
1
read-write
CTRRST2
Counter Reset on Capture Event 2
3
1
read-write
CTRRST3
Counter Reset on Capture Event 3
5
1
read-write
CTRRST4
Counter Reset on Capture Event 4
7
1
read-write
FREE_SOFT
Emulation Control
14
2
read-write
PRESCALE
Event Filter prescale select
9
5
read-write
ECCTL2
ECAP Control Register 2
0x54
32
read-write
n
0x0
0x0
APWM
APWM Mode Enable
9
1
read-write
APWMPOL
APWM Output Polarity Select
10
1
read-write
ONESHT
One-Shot Mode Enable
0
1
read-write
RE_ARM
One-Shot Re-Arming Control
3
1
read-write
STOP_WRAP
Stop Value for One-Shot Mode
1
2
read-write
SWSYNC
Software-forced Counter Synchronizing
8
1
read-write
SYNCI_EN
TSCTR Sync-In Enable
5
1
read-write
SYNCO_SEL
Sync-Out Select
6
2
read-write
TSCTRSTOP
TSCTR Stop Control
4
1
read-write
ECEINT
ECAP Interrupt Enable Register
0x58
32
read-write
n
0x0
0x0
CEVT1
Capture Event 1 Interrupt Enable
1
1
read-write
CEVT2
Capture Event 2 Interrupt Enable
2
1
read-write
CEVT3
Capture Event 3 Interrupt Enable
3
1
read-write
CEVT4
Capture Event 4 Interrupt Enable
4
1
read-write
CTROVF
Counter Overflow Interrupt Enable
5
1
read-write
CTR_CMP
Counter Equal Compare Interrupt Enable
7
1
read-write
CTR_PRD
Counter Equal Period Interrupt Enable
6
1
read-write
ECFLG
ECAP Interrupt Flag Register
0x5C
32
read-only
n
0x0
0x0
CEVT1
Capture Event 1 Flag
1
1
read-only
CEVT2
Capture Event 2 Flag
2
1
read-only
CEVT3
Capture Event 3 Flag
3
1
read-only
CEVT4
Capture Event 4 Flag
4
1
read-only
CTROVF
Counter Overflow Flag
5
1
read-only
CTR_CMP
Counter Equal Compare Flag
7
1
read-only
CTR_PRD
Counter Equal Period Flag
6
1
read-only
INT
Global Interrupt Flag
0
1
read-only
ECFRC
ECAP Interrupt Forcing Register
0x64
32
read-write
n
0x0
0x0
CEVT1
Force Capture Event 1
1
1
read-write
CEVT2
Force Capture Event 2
2
1
read-write
CEVT3
Force Capture Event 3
3
1
read-write
CEVT4
Force Capture Event 4
4
1
read-write
CTROVF
Force Counter Overflow
5
1
read-write
CTR_CMP
Force Counter Equal Compare Interrupt
7
1
read-write
CTR_PRD
Force Counter Equal Period Interrupt
6
1
read-write
TSCTR
Time-Stamp Counter Register
0x0
32
read-write
n
0x0
0x0
TSCTR
Time-Stamp Counter
0
32
read-write
EQEP0
EQEP0
EQEP
0x0
0x0
0x400
registers
n
EQEP0
EQEP0 Interrupt
9
QCAPCTL
eQEP Capture Control Register
0x58
32
read-write
n
0x0
0x0
CCPS
eQEP capture timer clock prescaler
4
3
read-write
CEN
Enable eQEP capture
15
1
read-write
UPPS
Unit position event prescaler
0
4
read-write
QCLR
eQEP Interrupt Clear Register
0x68
32
read-write
n
0x0
0x0
IEL
Clear Index event latch interrupt flag
10
1
read-write
INT
Clear Global interrupt status flag
0
1
read-write
PCE
Clear Position counter error interrupt flag
1
1
read-write
PCM
Clear Position-compare match interrupt flag
8
1
read-write
PCO
Clear Position counter overflow interrupt flag
6
1
read-write
PCR
Clear Position-compare ready interrupt flag
7
1
read-write
PCU
Clear Position counter underflow interrupt flag
5
1
read-write
QDC
Clear Quadrature direction change interrupt flag
3
1
read-write
QPE
Clear Quadrature phase error interrupt flag
2
1
read-write
SEL
Clear Strobe event latch interrupt flag
9
1
read-write
UTO
Clear Unit time out interrupt flag
11
1
read-write
WTO
Clear Watchdog time out interrupt flag
4
1
read-write
QCPRD
eQEP Capture Period Register
0x78
32
read-write
n
0x0
0x0
QCPRDLAT
eQEP Capture Period Latch
0x80
32
read-write
n
0x0
0x0
QCTMR
eQEP Status Register
0x74
32
read-write
n
0x0
0x0
QCTMRLAT
eQEP Capture Timer Latch
0x7C
32
read-only
n
0x0
0x0
QDECCTL
eQEP Decoder Control Register
0x50
32
read-write
n
0x0
0x0
IGATE
Index pulse gating option
9
1
read-write
QAP
QEPA input polarity
8
1
read-write
QBP
QEPB input polarity
7
1
read-write
QIP
QEPI input polarity
6
1
read-write
QSP
QEPS input polarity
5
1
read-write
QSRC
Position-counter source selection
14
2
read-write
SOEN
Sync output-enable
13
1
read-write
SPSEL
Sync output pin selection
12
1
read-write
SWAP
Swap quadrature clock inputs
10
1
read-write
XCR
External clock rate
11
1
read-write
QEINT
eQEP Interrupt Enable Register
0x60
32
read-write
n
0x0
0x0
IEL
Index event latch interrupt enable
10
1
read-write
PCE
Position counter error interrupt enable
1
1
read-write
PCM
Position-compare match interrupt enable
8
1
read-write
PCO
Position counter overflow interrupt enable
6
1
read-write
PCR
Position-compare ready interrupt enable
7
1
read-write
PCU
Position counter underflow interrupt enable
5
1
read-write
QDC
Quadrature direction change interrupt enable
3
1
read-write
QPE
Quadrature phase error interrupt enable
2
1
read-write
SEL
Strobe event latch interrupt enable
9
1
read-write
UTO
Unit time out interrupt enable
11
1
read-write
WTO
Watchdog time out interrupt enable
4
1
read-write
QEPCTL
eQEP Control Register
0x54
32
read-write
n
0x0
0x0
FREE_SOFT
Emulation Control Bits
14
2
read-write
IEI
Index event initialization of position counter
8
2
read-write
IEL
Index event latch of position counter
4
2
read-write
PCRM
Position counter reset mode
12
2
read-write
QCLM
eQEP capture latch mode
2
1
read-write
QPEN
Quadrature position counter enable/software reset
3
1
read-write
SEI
Strobe event initialization of position counter
10
2
read-write
SEL
Strobe event latch of position counter
6
1
read-write
SWI
Software initialization of position counter
7
1
read-write
UTE
eQEP unit timer enable
1
1
read-write
WDE
eQEP watchdog enable
0
1
read-write
QEPSTS
eQEP Status Register
0x70
32
read-write
n
0x0
0x0
CDEF
Capture direction error flag
2
1
read-write
COEF
Capture overflow error flag
3
1
read-write
FIDF
Direction on the first index marker
6
1
read-only
FIMF
First index marker flag
1
1
read-write
PCEF
Position counter error flag
0
1
read-only
QDF
Quadrature direction flag
5
1
read-only
QDLF
eQEP direction latch flag
4
1
read-only
UPEVNT
Unit position event flag
7
1
read-write
QFLG
eQEP Interrupt Flag Register
0x64
32
read-only
n
0x0
0x0
IEL
Index event latch interrupt flag
10
1
read-only
INT
Global interrupt status flag
0
1
read-only
PCE
Position counter error interrupt flag
1
1
read-only
PCM
Position-compare match interrupt flag
8
1
read-only
PCO
Position counter overflow interrupt flag
6
1
read-only
PCR
Position-compare ready interrupt flag
7
1
read-only
PCU
Position counter underflow interrupt flag
5
1
read-only
QDC
Quadrature direction change interrupt flag
3
1
read-only
QPE
Quadrature phase error interrupt flag
2
1
read-only
SEL
Strobe event latch interrupt flag
9
1
read-only
UTO
Unit time out interrupt flag
11
1
read-only
WTO
Watchdog time out interrupt flag
4
1
read-only
QFRC
eQEP Interrupt Force Register
0x6C
32
read-write
n
0x0
0x0
IEL
Force Index event latch interrupt
10
1
read-write
PCE
Force Position counter error interrupt
1
1
read-write
PCM
Force Position-compare match interrupt
8
1
read-write
PCO
Force Position counter overflow interrupt
6
1
read-write
PCR
Force Position-compare ready interrupt
7
1
read-write
PCU
Force Position counter underflow interrupt
5
1
read-write
QDC
Force Quadrature direction change interrupt
3
1
read-write
QPE
Force Quadrature phase error interrupt
2
1
read-write
SEL
Force Strobe event latch interrupt
9
1
read-write
UTO
Force Unit time out interrupt
11
1
read-write
WTO
Force Watchdog time out interrupt
4
1
read-write
QPOSCMP
eQEP Position-compare
0x18
32
read-write
n
0x0
0x0
QPOSCNT
eQEP Position Counter
0x0
32
read-write
n
0x0
0x0
QPOSCTL
eQEP Position-compare Control Register
0x5C
32
read-write
n
0x0
0x0
PCE
Position-compare enable/disable
12
1
read-write
PCLOAD
Position-compare shadow load mode
14
1
read-write
PCPOL
Polarity of sync output
13
1
read-write
PCSHDW
Position-compare shadow enable
15
1
read-write
PCSPW
Select-position-compare sync output pulse width
0
12
read-write
QPOSILAT
eQEP Index Position Latch
0x20
32
read-write
n
0x0
0x0
QPOSINIT
eQEP Initialization Position Count
0x8
32
read-write
n
0x0
0x0
QPOSLAT
eQEP Position Latch
0x30
32
read-write
n
0x0
0x0
QPOSMAX
eQEP Maximum Position Count
0x10
32
read-write
n
0x0
0x0
QPOSSLAT
eQEP Strobe Position Latch
0x28
32
read-write
n
0x0
0x0
QUPRD
eQEP Unit Period Register
0x40
32
read-write
n
0x0
0x0
QUTMR
QEP Unit Timer
0x38
32
read-write
n
0x0
0x0
QWDPRD
eQEP Watchdog Period Register
0x4C
32
read-write
n
0x0
0x0
QWDTMR
eQEP Watchdog Timer
0x48
32
read-write
n
0x0
0x0
EQEP1
EQEP0
EQEP
0x0
0x0
0x400
registers
n
EQEP1
EQEP1 Interrupt
10
QCAPCTL
eQEP Capture Control Register
0x58
32
read-write
n
0x0
0x0
CCPS
eQEP capture timer clock prescaler
4
3
read-write
CEN
Enable eQEP capture
15
1
read-write
UPPS
Unit position event prescaler
0
4
read-write
QCLR
eQEP Interrupt Clear Register
0x68
32
read-write
n
0x0
0x0
IEL
Clear Index event latch interrupt flag
10
1
read-write
INT
Clear Global interrupt status flag
0
1
read-write
PCE
Clear Position counter error interrupt flag
1
1
read-write
PCM
Clear Position-compare match interrupt flag
8
1
read-write
PCO
Clear Position counter overflow interrupt flag
6
1
read-write
PCR
Clear Position-compare ready interrupt flag
7
1
read-write
PCU
Clear Position counter underflow interrupt flag
5
1
read-write
QDC
Clear Quadrature direction change interrupt flag
3
1
read-write
QPE
Clear Quadrature phase error interrupt flag
2
1
read-write
SEL
Clear Strobe event latch interrupt flag
9
1
read-write
UTO
Clear Unit time out interrupt flag
11
1
read-write
WTO
Clear Watchdog time out interrupt flag
4
1
read-write
QCPRD
eQEP Capture Period Register
0x78
32
read-write
n
0x0
0x0
QCPRDLAT
eQEP Capture Period Latch
0x80
32
read-write
n
0x0
0x0
QCTMR
eQEP Status Register
0x74
32
read-write
n
0x0
0x0
QCTMRLAT
eQEP Capture Timer Latch
0x7C
32
read-only
n
0x0
0x0
QDECCTL
eQEP Decoder Control Register
0x50
32
read-write
n
0x0
0x0
IGATE
Index pulse gating option
9
1
read-write
QAP
QEPA input polarity
8
1
read-write
QBP
QEPB input polarity
7
1
read-write
QIP
QEPI input polarity
6
1
read-write
QSP
QEPS input polarity
5
1
read-write
QSRC
Position-counter source selection
14
2
read-write
SOEN
Sync output-enable
13
1
read-write
SPSEL
Sync output pin selection
12
1
read-write
SWAP
Swap quadrature clock inputs
10
1
read-write
XCR
External clock rate
11
1
read-write
QEINT
eQEP Interrupt Enable Register
0x60
32
read-write
n
0x0
0x0
IEL
Index event latch interrupt enable
10
1
read-write
PCE
Position counter error interrupt enable
1
1
read-write
PCM
Position-compare match interrupt enable
8
1
read-write
PCO
Position counter overflow interrupt enable
6
1
read-write
PCR
Position-compare ready interrupt enable
7
1
read-write
PCU
Position counter underflow interrupt enable
5
1
read-write
QDC
Quadrature direction change interrupt enable
3
1
read-write
QPE
Quadrature phase error interrupt enable
2
1
read-write
SEL
Strobe event latch interrupt enable
9
1
read-write
UTO
Unit time out interrupt enable
11
1
read-write
WTO
Watchdog time out interrupt enable
4
1
read-write
QEPCTL
eQEP Control Register
0x54
32
read-write
n
0x0
0x0
FREE_SOFT
Emulation Control Bits
14
2
read-write
IEI
Index event initialization of position counter
8
2
read-write
IEL
Index event latch of position counter
4
2
read-write
PCRM
Position counter reset mode
12
2
read-write
QCLM
eQEP capture latch mode
2
1
read-write
QPEN
Quadrature position counter enable/software reset
3
1
read-write
SEI
Strobe event initialization of position counter
10
2
read-write
SEL
Strobe event latch of position counter
6
1
read-write
SWI
Software initialization of position counter
7
1
read-write
UTE
eQEP unit timer enable
1
1
read-write
WDE
eQEP watchdog enable
0
1
read-write
QEPSTS
eQEP Status Register
0x70
32
read-write
n
0x0
0x0
CDEF
Capture direction error flag
2
1
read-write
COEF
Capture overflow error flag
3
1
read-write
FIDF
Direction on the first index marker
6
1
read-only
FIMF
First index marker flag
1
1
read-write
PCEF
Position counter error flag
0
1
read-only
QDF
Quadrature direction flag
5
1
read-only
QDLF
eQEP direction latch flag
4
1
read-only
UPEVNT
Unit position event flag
7
1
read-write
QFLG
eQEP Interrupt Flag Register
0x64
32
read-only
n
0x0
0x0
IEL
Index event latch interrupt flag
10
1
read-only
INT
Global interrupt status flag
0
1
read-only
PCE
Position counter error interrupt flag
1
1
read-only
PCM
Position-compare match interrupt flag
8
1
read-only
PCO
Position counter overflow interrupt flag
6
1
read-only
PCR
Position-compare ready interrupt flag
7
1
read-only
PCU
Position counter underflow interrupt flag
5
1
read-only
QDC
Quadrature direction change interrupt flag
3
1
read-only
QPE
Quadrature phase error interrupt flag
2
1
read-only
SEL
Strobe event latch interrupt flag
9
1
read-only
UTO
Unit time out interrupt flag
11
1
read-only
WTO
Watchdog time out interrupt flag
4
1
read-only
QFRC
eQEP Interrupt Force Register
0x6C
32
read-write
n
0x0
0x0
IEL
Force Index event latch interrupt
10
1
read-write
PCE
Force Position counter error interrupt
1
1
read-write
PCM
Force Position-compare match interrupt
8
1
read-write
PCO
Force Position counter overflow interrupt
6
1
read-write
PCR
Force Position-compare ready interrupt
7
1
read-write
PCU
Force Position counter underflow interrupt
5
1
read-write
QDC
Force Quadrature direction change interrupt
3
1
read-write
QPE
Force Quadrature phase error interrupt
2
1
read-write
SEL
Force Strobe event latch interrupt
9
1
read-write
UTO
Force Unit time out interrupt
11
1
read-write
WTO
Force Watchdog time out interrupt
4
1
read-write
QPOSCMP
eQEP Position-compare
0x18
32
read-write
n
0x0
0x0
QPOSCNT
eQEP Position Counter
0x0
32
read-write
n
0x0
0x0
QPOSCTL
eQEP Position-compare Control Register
0x5C
32
read-write
n
0x0
0x0
PCE
Position-compare enable/disable
12
1
read-write
PCLOAD
Position-compare shadow load mode
14
1
read-write
PCPOL
Polarity of sync output
13
1
read-write
PCSHDW
Position-compare shadow enable
15
1
read-write
PCSPW
Select-position-compare sync output pulse width
0
12
read-write
QPOSILAT
eQEP Index Position Latch
0x20
32
read-write
n
0x0
0x0
QPOSINIT
eQEP Initialization Position Count
0x8
32
read-write
n
0x0
0x0
QPOSLAT
eQEP Position Latch
0x30
32
read-write
n
0x0
0x0
QPOSMAX
eQEP Maximum Position Count
0x10
32
read-write
n
0x0
0x0
QPOSSLAT
eQEP Strobe Position Latch
0x28
32
read-write
n
0x0
0x0
QUPRD
eQEP Unit Period Register
0x40
32
read-write
n
0x0
0x0
QUTMR
QEP Unit Timer
0x38
32
read-write
n
0x0
0x0
QWDPRD
eQEP Watchdog Period Register
0x4C
32
read-write
n
0x0
0x0
QWDTMR
eQEP Watchdog Timer
0x48
32
read-write
n
0x0
0x0
ERU
ERU
ERU
0x0
0x0
0x1000
registers
n
ERU0
ERU0 Interrupt
28
ERU1
ERU1 Interrupt
29
ERU2
ERU2 Interrupt
30
ERU3
ERU3 Interrupt
31
ERUINCTRL0
ERU Input Control Register 0
0x10
32
read-write
n
0x0
0x0
APOL
The polarity of the input A choice
18
1
read-write
BPOL
The polarity of the input B choice
19
1
read-write
ERSOSEL
ERS0 input source Selecet
16
2
read-write
FE
ETL0 Falling Edge Test Enable
3
1
read-write
FL
ETL0 status flag
8
1
read-write
LVL_DET
ETL0 Reconstruction of the Status Flag Level Detection
1
1
read-write
OCS
ETL0 Output Trigger Pulse Output Channel Choice
4
3
read-write
OTPE
ETL0 Output Trigger Pulse Enable
0
1
read-write
RE
ETL0 Rising Edge Test Enable
2
1
read-write
ERUINCTRL1
0x14
-1
read-write
n
ERUINCTRL2
0x18
-1
read-write
n
ERUINCTRL3
0x1C
-1
read-write
n
ERUINSEL
ERU Input Select Register
0x0
32
read-write
n
0x0
0x0
in0_sela
A0 Event Source Select
0
3
read-write
in0_selb
B0 Event Source Select
4
3
read-write
in1_sela
A1 Event Source Select
8
3
read-write
in1_selb
B1 Event Source Select
12
3
read-write
in2_sela
A2 Event Source Select
16
3
read-write
in2_selb
B2 Event Source Select
20
3
read-write
in3_sela
A3 Event Source Select
24
3
read-write
in3_selb
B3 Event Source Select
28
3
read-write
ERUOUTCTRL0
ERU Output Control Register 0
0x20
32
read-write
n
0x0
0x0
GEEN
Door control events enable
2
1
read-write
GP
Model test results of gating options
4
2
read-write
IPEN0
ETL0 Model test enable
16
1
read-write
IPEN1
ETL1 Model test enable
17
1
read-write
IPEN2
ETL2 Model test enable
18
1
read-write
IPEN3
ETL3 Model test enable
19
1
read-write
ISS
Internal trigger source choice
0
2
read-write
PDR
Model test results flag
3
1
read-only
ERUOUTCTRL1
0x24
-1
read-write
n
ERUOUTCTRL2
0x28
-1
read-write
n
ERUOUTCTRL3
0x2C
-1
read-write
n
I2C
I2C
I2C
0x0
0x0
0x100
registers
n
SSP23_IIC
SSP23 and IIC Interrupt
4
ADDR
I2C Address Register
0xC
32
read-write
n
0x0
0x0
ADDR
Address
1
7
read-write
GC
Broadcast Ack Signal
0
1
read-write
CCLR
I2C Control Clear Register
0x4
32
write-only
n
0x0
0x0
AA
ACK bit
2
1
write-only
CR0
CR0
0
1
write-only
CR1
CR1
1
1
write-only
CR2
CR2
7
1
write-only
CR3
CR3
9
1
write-only
EN
Enable
6
1
write-only
SI
Clear Interrupt bit
3
1
write-only
STA
Send Start Bit
5
1
write-only
STO
Send Stop Bit
4
1
write-only
CSET
I2C Control Set Register
0x0
32
write-only
n
0x0
0x0
AA
ACK bit
2
1
write-only
CR0
CR0
0
1
write-only
CR1
CR1
1
1
write-only
CR2
CR2
7
1
write-only
CR3
CR3
9
1
write-only
EN
Enable
6
1
write-only
STA
Send Start Bit
5
1
write-only
STO
Send Stop Bit
4
1
write-only
CSR
I2C Control Status Register
0x8
32
read-only
n
0x0
0x0
AA
ACK bit
2
1
read-only
CR0
CR0
0
1
read-only
CR1
CR1
1
1
read-only
CR2
CR2
7
1
read-only
CR3
CR3
9
1
read-only
EN
Enable
6
1
read-only
SI
Clear Interrupt bit
3
1
read-only
STA
Send Start Bit
5
1
read-only
STO
Send Stop Bit
4
1
read-only
DATA
I2C Data Register
0x10
32
read-write
n
0x0
0x0
DATA
I2C Data Register
0
8
read-write
MEXT
TMEX timeout detection Register
0x20
32
read-write
n
0x0
0x0
MEXT
TMEX timeout detection Register
0
8
read-write
SEXT
SEXT timeout detection Register
0x24
32
read-write
n
0x0
0x0
SEXT
SEXT timeout detection Register
0
8
read-write
SR
I2C Status Register
0x14
32
read-only
n
0x0
0x0
STAT
I2C Status
0
8
read-only
TOUT
timeout detection Register
0x28
32
read-write
n
0x0
0x0
TOUT
timeout detection Register
0
8
read-write
IAP
IAP
IAP
0x0
0x0
0x1000
registers
n
SYS
SYS Interrupt
14
ADDR
Flash Address Register
0x10
32
read-write
n
0x0
0x0
BOOT_END_ADDR
BOOT partition end address register
0x40
32
read-only
n
0x0
0x0
BOOT_START_ADDR
BOOT partition start address register
0x3C
32
read-only
n
0x0
0x0
CCLR
Flash Control Clear Register
0x4
32
write-only
n
0x0
0x0
BOOTKEYEN
BOOT partition KEY matching enable bit
8
1
write-only
MASSEN
All erase enable control bit
3
1
write-only
NVREN
Info enable control bit
5
1
write-only
PAGEEN
Block erase enable control bit
2
1
write-only
PROGEN
Programmable enable control bit
1
1
write-only
RDEN
Read enable control bit
4
1
write-only
USR1KEYEN
USR1 partition KEY matching enable bit
9
1
write-only
USR2KEYEN
USR2 partition KEY matching enable bit
10
1
write-only
CFG
Flash Configure Register
0xC
32
read-write
n
0x0
0x0
NODATAPRF
NODATAPRF
4
1
read-write
PREFETCHEN
PREFETCHEN
2
1
read-write
READCFG
READCFG
0
2
read-write
CSET
Flash Control Set Register
0x0
32
write-only
n
0x0
0x0
BOOTKEYEN
BOOT partition KEY matching enable bit
8
1
write-only
MASSEN
All erase enable control bit
3
1
write-only
NVREN
Info enable control bit
5
1
write-only
OPSTART
Programming or block erase start control bits
0
1
write-only
PAGEEN
Block erase enable control bit
2
1
write-only
PROGEN
Programmable enable control bit
1
1
write-only
RDEN
Read enable control bit
4
1
write-only
USR1KEYEN
USR1 partition KEY matching enable bit
9
1
write-only
USR2KEYEN
USR2 partition KEY matching enable bit
10
1
write-only
CTRL
Flash Control Status Register
0x8
32
read-only
n
0x0
0x0
BOOTKEYEN
BOOT partition KEY matching enable bit
8
1
read-only
MASSEN
All erase enable control bit
3
1
read-only
NVREN
Info enable control bit
5
1
read-only
PAGEEN
Block erase enable control bit
2
1
read-only
PROGEN
Programmable enable control bit
1
1
read-only
RDEN
Read enable control bit
4
1
read-only
USR1KEYEN
USR1 partition KEY matching enable bit
9
1
read-only
USR2KEYEN
USR2 partition KEY matching enable bit
10
1
read-only
DATA
Flash Data Register
0x14
32
read-write
n
0x0
0x0
FEED
Flash feed Register
0x18
32
write-only
n
0x0
0x0
ICR
Flash Interrupt Clear Register
0x24
32
write-only
n
0x0
0x0
COMPCLR
Complete Operation Clear
0
1
write-only
DRDERRCLR
Data Read Error Clear
4
1
write-only
ERRORCLR
Error Interrupt Clear
2
1
write-only
PROTCLR
Protect Interrupt Clear
1
1
write-only
RCHOFFCLR
RCH State Detection Clear
3
1
write-only
IEN
Flash Interrupt Enable Register
0x1C
32
read-write
n
0x0
0x0
COMPINTEN
Complete Operation Interrupt Enable
0
1
read-write
DRDERRINTEN
Data Read Error Interrupt Enable
4
1
read-write
ERRINTEN
Error Interrupt Enable
2
1
read-write
PROTINTEN
Protect Interrupt Enable
1
1
read-write
RCHOFFINTEN
RCH State Detection Interrupt Enable
3
1
read-write
ISR
Flash Interrupt Status Register
0x20
32
read-only
n
0x0
0x0
COMPLETE
Complete Operation Status
0
1
read-only
DRDERR
Data Read Error Status
4
1
read-only
ERROR
Error Interrupt Status
2
1
read-only
PROTECT
Protect Interrupt Status
1
1
read-only
RCHOFF
RCH State Detection Status
3
1
read-only
KEY1
Flash Key1 Match Register
0x2C
32
write-only
n
0x0
0x0
KEY2
Flash Key2 Match Register
0x30
32
write-only
n
0x0
0x0
KEY3
Flash Key3 Match Register
0x34
32
write-only
n
0x0
0x0
KEY4
Flash Key4 Match Register
0x38
32
write-only
n
0x0
0x0
STATUS
Flash Status Register
0x28
32
read-only
n
0x0
0x0
BOOTCRCEN
BOOT partition CRC enable
8
1
read-only
BOOTCRCOK
BOOT partition CRC check Status
24
1
read-only
BOOTKEYOK
BOOT key matching Status
16
1
read-only
BOOTPAREN
BOOT partition Status
0
1
read-only
USR1CRCEN
USR1 partition CRC enable
9
1
read-only
USR1CRCOK
USR1 partition CRC check Status
25
1
read-only
USR1KEYOK
USR1 key matching Status
17
1
read-only
USR1PAREN
USR1 partition Status
1
1
read-only
USR2CRCEN
USR2 partition CRC enable
10
1
read-only
USR2CRCOK
USR2 partition CRC check Status
26
1
read-only
USR2KEYOK
USR2 key matching Status
18
1
read-only
USR2PAREN
USR1 partition Status
2
1
read-only
USR1_END_ADDR
User1 partition end address register
0x48
32
read-only
n
0x0
0x0
USR1_START_ADDR
User1 partition start address register
0x44
32
read-only
n
0x0
0x0
USR2_END_ADDR
User2 partition end address register
0x50
32
read-only
n
0x0
0x0
USR2_START_ADDR
User2 partition start address register
0x4C
32
read-only
n
0x0
0x0
PA
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PB
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PC
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PD
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PE
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PF
PA
P0RT
0x0
0x0
0x1000
registers
n
GPIO
GPIO Interrupt
11
CFG0
PORT Control Register
0x0
32
read-write
n
0x0
0x0
ANAEN
ANAEN
4
1
read-write
CLKDIV
CLKDIV
24
3
read-write
DRV
DRV
10
1
read-write
FILT
FILT
16
2
read-write
FUNC
FUNC
0
3
read-write
INV
INV
15
1
read-write
OD
OD
13
1
read-write
PUPD
PUPD
6
2
read-write
SR
SR
8
2
read-write
CFG1
0x4
-1
read-write
n
CFG10
0x28
-1
read-write
n
CFG11
0x2C
-1
read-write
n
CFG12
0x30
-1
read-write
n
CFG13
0x34
-1
read-write
n
CFG14
0x38
-1
read-write
n
CFG15
0x3C
-1
read-write
n
CFG16
0x40
-1
read-write
n
CFG17
0x44
-1
read-write
n
CFG18
0x48
-1
read-write
n
CFG19
0x4C
-1
read-write
n
CFG2
0x8
-1
read-write
n
CFG20
0x50
-1
read-write
n
CFG21
0x54
-1
read-write
n
CFG22
0x58
-1
read-write
n
CFG23
0x5C
-1
read-write
n
CFG24
0x60
-1
read-write
n
CFG25
0x64
-1
read-write
n
CFG26
0x68
-1
read-write
n
CFG27
0x6C
-1
read-write
n
CFG28
0x70
-1
read-write
n
CFG29
0x74
-1
read-write
n
CFG3
0xC
-1
read-write
n
CFG30
0x78
-1
read-write
n
CFG31
0x7C
-1
read-write
n
CFG4
0x10
-1
read-write
n
CFG5
0x14
-1
read-write
n
CFG6
0x18
-1
read-write
n
CFG7
0x1C
-1
read-write
n
CFG8
0x20
-1
read-write
n
CFG9
0x24
-1
read-write
n
GCFG0
Global Configuration Register 0
0xD8
32
write-only
n
0x0
0x0
GMASK0
GMASK0
0
1
write-only
GMASK1
GMASK1
1
1
write-only
GMASK10
GMASK10
10
1
write-only
GMASK11
GMASK11
11
1
write-only
GMASK12
GMASK12
12
1
write-only
GMASK13
GMASK13
13
1
write-only
GMASK14
GMASK14
14
1
write-only
GMASK15
GMASK15
15
1
write-only
GMASK16
GMASK16
16
1
write-only
GMASK17
GMASK17
17
1
write-only
GMASK18
GMASK18
18
1
write-only
GMASK19
GMASK19
19
1
write-only
GMASK2
GMASK2
2
1
write-only
GMASK20
GMASK20
20
1
write-only
GMASK21
GMASK21
21
1
write-only
GMASK22
GMASK22
22
1
write-only
GMASK23
GMASK23
23
1
write-only
GMASK24
GMASK24
24
1
write-only
GMASK25
GMASK25
25
1
write-only
GMASK26
GMASK26
26
1
write-only
GMASK27
GMASK27
27
1
write-only
GMASK28
GMASK28
28
1
write-only
GMASK29
GMASK29
29
1
write-only
GMASK3
GMASK3
3
1
write-only
GMASK30
GMASK30
30
1
write-only
GMASK31
GMASK31
31
1
write-only
GMASK4
GMASK4
4
1
write-only
GMASK5
GMASK5
5
1
write-only
GMASK6
GMASK6
6
1
write-only
GMASK7
GMASK7
7
1
write-only
GMASK8
GMASK8
8
1
write-only
GMASK9
GMASK9
9
1
write-only
GCFG1
0xDC
-1
read-write
n
GCFGMASK
GLOBAL CONFIGUE MASK REGISTER
0xD0
32
read-write
n
0x0
0x0
GMASK0
GMASK0
0
1
read-write
GMASK1
GMASK1
1
1
read-write
GMASK10
GMASK10
10
1
read-write
GMASK11
GMASK11
11
1
read-write
GMASK12
GMASK12
12
1
read-write
GMASK13
GMASK13
13
1
read-write
GMASK14
GMASK14
14
1
read-write
GMASK15
GMASK15
15
1
read-write
GMASK16
GMASK16
16
1
read-write
GMASK17
GMASK17
17
1
read-write
GMASK18
GMASK18
18
1
read-write
GMASK19
GMASK19
19
1
read-write
GMASK2
GMASK2
2
1
read-write
GMASK20
GMASK20
20
1
read-write
GMASK21
GMASK21
21
1
read-write
GMASK22
GMASK22
22
1
read-write
GMASK23
GMASK23
23
1
read-write
GMASK24
GMASK24
24
1
read-write
GMASK25
GMASK25
25
1
read-write
GMASK26
GMASK26
26
1
read-write
GMASK27
GMASK27
27
1
read-write
GMASK28
GMASK28
28
1
read-write
GMASK29
GMASK29
29
1
read-write
GMASK3
GMASK3
3
1
read-write
GMASK30
GMASK30
30
1
read-write
GMASK31
GMASK31
31
1
read-write
GMASK4
GMASK4
4
1
read-write
GMASK5
GMASK5
5
1
read-write
GMASK6
GMASK6
6
1
read-write
GMASK7
GMASK7
7
1
read-write
GMASK8
GMASK8
8
1
read-write
GMASK9
GMASK9
9
1
read-write
INTBV
Interrupt Double Edge Register
0xB8
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Bipolar Interrupt Enable
0
1
read-write
GPIO1
GPIO1 Bipolar Interrupt Enable
1
1
read-write
GPIO10
GPIO10 Bipolar Interrupt Enable
10
1
read-write
GPIO11
GPIO11 Bipolar Interrupt Enable
11
1
read-write
GPIO12
GPIO12 Bipolar Interrupt Enable
12
1
read-write
GPIO13
GPIO13 Bipolar Interrupt Enable
13
1
read-write
GPIO14
GPIO14 Bipolar Interrupt Enable
14
1
read-write
GPIO15
GPIO15 Bipolar Interrupt Enable
15
1
read-write
GPIO16
GPIO16 Bipolar Interrupt Enable
16
1
read-write
GPIO17
GPIO17 Bipolar Interrupt Enable
17
1
read-write
GPIO18
GPIO18 Bipolar Interrupt Enable
18
1
read-write
GPIO19
GPIO19 Bipolar Interrupt Enable
19
1
read-write
GPIO2
GPIO2 Bipolar Interrupt Enable
2
1
read-write
GPIO20
GPIO20 Bipolar Interrupt Enable
20
1
read-write
GPIO21
GPIO21 Bipolar Interrupt Enable
21
1
read-write
GPIO22
GPIO22 Bipolar Interrupt Enable
22
1
read-write
GPIO23
GPIO23 Bipolar Interrupt Enable
23
1
read-write
GPIO24
GPIO24 Bipolar Interrupt Enable
24
1
read-write
GPIO25
GPIO25 Bipolar Interrupt Enable
25
1
read-write
GPIO26
GPIO26 Bipolar Interrupt Enable
26
1
read-write
GPIO27
GPIO27 Bipolar Interrupt Enable
27
1
read-write
GPIO28
GPIO28 Bipolar Interrupt Enable
28
1
read-write
GPIO29
GPIO29 Bipolar Interrupt Enable
29
1
read-write
GPIO3
GPIO3 Bipolar Interrupt Enable
3
1
read-write
GPIO30
GPIO30 Bipolar Interrupt Enable
30
1
read-write
GPIO31
GPIO31 Bipolar Interrupt Enable
31
1
read-write
GPIO4
GPIO4 Bipolar Interrupt Enable
4
1
read-write
GPIO5
GPIO5 Bipolar Interrupt Enable
5
1
read-write
GPIO6
GPIO6 Bipolar Interrupt Enable
6
1
read-write
GPIO7
GPIO7 Bipolar Interrupt Enable
7
1
read-write
GPIO8
GPIO8 Bipolar Interrupt Enable
8
1
read-write
GPIO9
GPIO9 Bipolar Interrupt Enable
9
1
read-write
INTMASK
Interrupt Mask Register
0xB0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Mask
0
1
read-write
GPIO1
GPIO1 Interrupt Mask
1
1
read-write
GPIO10
GPIO10 Interrupt Mask
10
1
read-write
GPIO11
GPIO11 Interrupt Mask
11
1
read-write
GPIO12
GPIO12 Interrupt Mask
12
1
read-write
GPIO13
GPIO13 Interrupt Mask
13
1
read-write
GPIO14
GPIO14 Interrupt Mask
14
1
read-write
GPIO15
GPIO15 Interrupt Mask
15
1
read-write
GPIO16
GPIO16 Interrupt Mask
16
1
read-write
GPIO17
GPIO17 Interrupt Mask
17
1
read-write
GPIO18
GPIO18 Interrupt Mask
18
1
read-write
GPIO19
GPIO19 Interrupt Mask
19
1
read-write
GPIO2
GPIO2 Interrupt Mask
2
1
read-write
GPIO20
GPIO20 Interrupt Mask
20
1
read-write
GPIO21
GPIO21 Interrupt Mask
21
1
read-write
GPIO22
GPIO22 Interrupt Mask
22
1
read-write
GPIO23
GPIO23 Interrupt Mask
23
1
read-write
GPIO24
GPIO24 Interrupt Mask
24
1
read-write
GPIO25
GPIO25 Interrupt Mask
25
1
read-write
GPIO26
GPIO26 Interrupt Mask
26
1
read-write
GPIO27
GPIO27 Interrupt Mask
27
1
read-write
GPIO28
GPIO28 Interrupt Mask
28
1
read-write
GPIO29
GPIO29 Interrupt Mask
29
1
read-write
GPIO3
GPIO3 Interrupt Mask
3
1
read-write
GPIO30
GPIO30 Interrupt Mask
30
1
read-write
GPIO31
GPIO31 Interrupt Mask
31
1
read-write
GPIO4
GPIO4 Interrupt Mask
4
1
read-write
GPIO5
GPIO5 Interrupt Mask
5
1
read-write
GPIO6
GPIO6 Interrupt Mask
6
1
read-write
GPIO7
GPIO7 Interrupt Mask
7
1
read-write
GPIO8
GPIO8 Interrupt Mask
8
1
read-write
GPIO9
GPIO9 Interrupt Mask
9
1
read-write
INTPOL
Interrupt Polarity Register
0xBC
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Polarity Enable
0
1
read-write
GPIO1
GPIO1 Interrupt Polarity Enable
1
1
read-write
GPIO10
GPIO10 Interrupt Polarity Enable
10
1
read-write
GPIO11
GPIO11 Interrupt Polarity Enable
11
1
read-write
GPIO12
GPIO12 Interrupt Polarity Enable
12
1
read-write
GPIO13
GPIO13 Interrupt Polarity Enable
13
1
read-write
GPIO14
GPIO14 Interrupt Polarity Enable
14
1
read-write
GPIO15
GPIO15 Interrupt Polarity Enable
15
1
read-write
GPIO16
GPIO16 Interrupt Polarity Enable
16
1
read-write
GPIO17
GPIO17 Interrupt Polarity Enable
17
1
read-write
GPIO18
GPIO18 Interrupt Polarity Enable
18
1
read-write
GPIO19
GPIO19 Interrupt Polarity Enable
19
1
read-write
GPIO2
GPIO2 Interrupt Polarity Enable
2
1
read-write
GPIO20
GPIO20 Interrupt Polarity Enable
20
1
read-write
GPIO21
GPIO21 Interrupt Polarity Enable
21
1
read-write
GPIO22
GPIO22 Interrupt Polarity Enable
22
1
read-write
GPIO23
GPIO23 Interrupt Polarity Enable
23
1
read-write
GPIO24
GPIO24 Interrupt Polarity Enable
24
1
read-write
GPIO25
GPIO25 Interrupt Polarity Enable
25
1
read-write
GPIO26
GPIO26 Interrupt Polarity Enable
26
1
read-write
GPIO27
GPIO27 Interrupt Polarity Enable
27
1
read-write
GPIO28
GPIO28 Interrupt Polarity Enable
28
1
read-write
GPIO29
GPIO29 Interrupt Polarity Enable
29
1
read-write
GPIO3
GPIO3 Interrupt Polarity Enable
3
1
read-write
GPIO30
GPIO30 Interrupt Polarity Enable
30
1
read-write
GPIO31
GPIO31 Interrupt Polarity Enable
31
1
read-write
GPIO4
GPIO4 Interrupt Polarity Enable
4
1
read-write
GPIO5
GPIO5 Interrupt Polarity Enable
5
1
read-write
GPIO6
GPIO6 Interrupt Polarity Enable
6
1
read-write
GPIO7
GPIO7 Interrupt Polarity Enable
7
1
read-write
GPIO8
GPIO8 Interrupt Polarity Enable
8
1
read-write
GPIO9
GPIO9 Interrupt Polarity Enable
9
1
read-write
INTTYPE
Interrupt Type Register
0xB4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Interrupt Type Select
0
1
read-write
GPIO1
GPIO1 Interrupt Type Select
1
1
read-write
GPIO10
GPIO10 Interrupt Type Select
10
1
read-write
GPIO11
GPIO11 Interrupt Type Select
11
1
read-write
GPIO12
GPIO12 Interrupt Type Select
12
1
read-write
GPIO13
GPIO13 Interrupt Type Select
13
1
read-write
GPIO14
GPIO14 Interrupt Type Select
14
1
read-write
GPIO15
GPIO15 Interrupt Type Select
15
1
read-write
GPIO16
GPIO16 Interrupt Type Select
16
1
read-write
GPIO17
GPIO17 Interrupt Type Select
17
1
read-write
GPIO18
GPIO18 Interrupt Type Select
18
1
read-write
GPIO19
GPIO19 Interrupt Type Select
19
1
read-write
GPIO2
GPIO2 Interrupt Type Select
2
1
read-write
GPIO20
GPIO20 Interrupt Type Select
20
1
read-write
GPIO21
GPIO21 Interrupt Type Select
21
1
read-write
GPIO22
GPIO22 Interrupt Type Select
22
1
read-write
GPIO23
GPIO23 Interrupt Type Select
23
1
read-write
GPIO24
GPIO24 Interrupt Type Select
24
1
read-write
GPIO25
GPIO25 Interrupt Type Select
25
1
read-write
GPIO26
GPIO26 Interrupt Type Select
26
1
read-write
GPIO27
GPIO27 Interrupt Type Select
27
1
read-write
GPIO28
GPIO28 Interrupt Type Select
28
1
read-write
GPIO29
GPIO29 Interrupt Type Select
29
1
read-write
GPIO3
GPIO3 Interrupt Type Select
3
1
read-write
GPIO30
GPIO30 Interrupt Type Select
30
1
read-write
GPIO31
GPIO31 Interrupt Type Select
31
1
read-write
GPIO4
GPIO4 Interrupt Type Select
4
1
read-write
GPIO5
GPIO5 Interrupt Type Select
5
1
read-write
GPIO6
GPIO6 Interrupt Type Select
6
1
read-write
GPIO7
GPIO7 Interrupt Type Select
7
1
read-write
GPIO8
GPIO8 Interrupt Type Select
8
1
read-write
GPIO9
GPIO9 Interrupt Type Select
9
1
read-write
LOCK0
Configure LOCK Register 0
0xE0
32
read-write
n
0x0
0x0
LOCKL0
LOCKL0
0
1
read-write
LOCKL1
LOCKL1
1
1
read-write
LOCKL10
LOCKL10
10
1
read-write
LOCKL11
LOCKL11
11
1
read-write
LOCKL12
LOCKL12
12
1
read-write
LOCKL13
LOCKL13
13
1
read-write
LOCKL14
LOCKL14
14
1
read-write
LOCKL15
LOCKL15
15
1
read-write
LOCKL2
LOCKL2
2
1
read-write
LOCKL3
LOCKL3
3
1
read-write
LOCKL4
LOCKL4
4
1
read-write
LOCKL5
LOCKL5
5
1
read-write
LOCKL6
LOCKL6
6
1
read-write
LOCKL7
LOCKL7
7
1
read-write
LOCKL8
LOCKL8
8
1
read-write
LOCKL9
LOCKL9
9
1
read-write
LOCKL_KEY
LOCKL_KEY
16
16
read-write
LOCK1
0xE4
-1
read-write
n
MIS
Mask Interrupt Status Register
0xC4
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Masked Interrupt Status
0
1
read-write
GPIO1
GPIO1 Masked Interrupt Status
1
1
read-write
GPIO10
GPIO10 Masked Interrupt Status
10
1
read-write
GPIO11
GPIO11 Masked Interrupt Status
11
1
read-write
GPIO12
GPIO12 Masked Interrupt Status
12
1
read-write
GPIO13
GPIO13 Masked Interrupt Status
13
1
read-write
GPIO14
GPIO14 Masked Interrupt Status
14
1
read-write
GPIO15
GPIO15 Masked Interrupt Status
15
1
read-write
GPIO16
GPIO16 Masked Interrupt Status
16
1
read-write
GPIO17
GPIO17 Masked Interrupt Status
17
1
read-write
GPIO18
GPIO18 Masked Interrupt Status
18
1
read-write
GPIO19
GPIO19 Masked Interrupt Status
19
1
read-write
GPIO2
GPIO2 Masked Interrupt Status
2
1
read-write
GPIO20
GPIO20 Masked Interrupt Status
20
1
read-write
GPIO21
GPIO21 Masked Interrupt Status
21
1
read-write
GPIO22
GPIO22 Masked Interrupt Status
22
1
read-write
GPIO23
GPIO23 Masked Interrupt Status
23
1
read-write
GPIO24
GPIO24 Masked Interrupt Status
24
1
read-write
GPIO25
GPIO25 Masked Interrupt Status
25
1
read-write
GPIO26
GPIO26 Masked Interrupt Status
26
1
read-write
GPIO27
GPIO27 Masked Interrupt Status
27
1
read-write
GPIO28
GPIO28 Masked Interrupt Status
28
1
read-write
GPIO29
GPIO29 Masked Interrupt Status
29
1
read-write
GPIO3
GPIO3 Masked Interrupt Status
3
1
read-write
GPIO30
GPIO30 Masked Interrupt Status
30
1
read-write
GPIO31
GPIO31 Masked Interrupt Status
31
1
read-write
GPIO4
GPIO4 Masked Interrupt Status
4
1
read-write
GPIO5
GPIO5 Masked Interrupt Status
5
1
read-write
GPIO6
GPIO6 Masked Interrupt Status
6
1
read-write
GPIO7
GPIO7 Masked Interrupt Status
7
1
read-write
GPIO8
GPIO8 Masked Interrupt Status
8
1
read-write
GPIO9
GPIO9 Masked Interrupt Status
9
1
read-write
OUT
Pin Output Register
0x90
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Status
0
1
read-write
GPIO1
GPIO1 Output Status
1
1
read-write
GPIO10
GPIO10 Output Status
10
1
read-write
GPIO11
GPIO11 Output Status
11
1
read-write
GPIO12
GPIO12 Output Status
12
1
read-write
GPIO13
GPIO13 Output Status
13
1
read-write
GPIO14
GPIO14 Output Status
14
1
read-write
GPIO15
GPIO15 Output Status
15
1
read-write
GPIO16
GPIO16 Output Status
16
1
read-write
GPIO17
GPIO17 Output Status
17
1
read-write
GPIO18
GPIO18 Output Status
18
1
read-write
GPIO19
GPIO19 Output Status
19
1
read-write
GPIO2
GPIO2 Output Status
2
1
read-write
GPIO20
GPIO20 Output Status
20
1
read-write
GPIO21
GPIO21 Output Status
21
1
read-write
GPIO22
GPIO22 Output Status
22
1
read-write
GPIO23
GPIO23 Output Status
23
1
read-write
GPIO24
GPIO24 Output Status
24
1
read-write
GPIO25
GPIO25 Output Status
25
1
read-write
GPIO26
GPIO26 Output Status
26
1
read-write
GPIO27
GPIO27 Output Status
27
1
read-write
GPIO28
GPIO28 Output Status
28
1
read-write
GPIO29
GPIO29 Output Status
29
1
read-write
GPIO3
GPIO3 Output Status
3
1
read-write
GPIO30
GPIO30 Output Status
30
1
read-write
GPIO31
GPIO31 Output Status
31
1
read-write
GPIO4
GPIO4 Output Status
4
1
read-write
GPIO5
GPIO5 Output Status
5
1
read-write
GPIO6
GPIO6 Output Status
6
1
read-write
GPIO7
GPIO7 Output Status
7
1
read-write
GPIO8
GPIO8 Output Status
8
1
read-write
GPIO9
GPIO9 Output Status
9
1
read-write
OUTCLR
Pin Output Clear Register
0x98
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Clear
0
1
read-write
GPIO1
GPIO1 Output Clear
1
1
read-write
GPIO10
GPIO10 Output Clear
10
1
read-write
GPIO11
GPIO11 Output Clear
11
1
read-write
GPIO12
GPIO12 Output Clear
12
1
read-write
GPIO13
GPIO13 Output Clear
13
1
read-write
GPIO14
GPIO14 Output Clear
14
1
read-write
GPIO15
GPIO15 Output Clear
15
1
read-write
GPIO16
GPIO16 Output Clear
16
1
read-write
GPIO17
GPIO17 Output Clear
17
1
read-write
GPIO18
GPIO18 Output Clear
18
1
read-write
GPIO19
GPIO19 Output Clear
19
1
read-write
GPIO2
GPIO2 Output Clear
2
1
read-write
GPIO20
GPIO20 Output Clear
20
1
read-write
GPIO21
GPIO21 Output Clear
21
1
read-write
GPIO22
GPIO22 Output Clear
22
1
read-write
GPIO23
GPIO23 Output Clear
23
1
read-write
GPIO24
GPIO24 Output Clear
24
1
read-write
GPIO25
GPIO25 Output Clear
25
1
read-write
GPIO26
GPIO26 Output Clear
26
1
read-write
GPIO27
GPIO27 Output Clear
27
1
read-write
GPIO28
GPIO28 Output Clear
28
1
read-write
GPIO29
GPIO29 Output Clear
29
1
read-write
GPIO3
GPIO3 Output Clear
3
1
read-write
GPIO30
GPIO30 Output Clear
30
1
read-write
GPIO31
GPIO31 Output Clear
31
1
read-write
GPIO4
GPIO4 Output Clear
4
1
read-write
GPIO5
GPIO5 Output Clear
5
1
read-write
GPIO6
GPIO6 Output Clear
6
1
read-write
GPIO7
GPIO7 Output Clear
7
1
read-write
GPIO8
GPIO8 Output Clear
8
1
read-write
GPIO9
GPIO9 Output Clear
9
1
read-write
OUTEN
Pin Output Enable Register
0xA0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Enable
0
1
read-write
GPIO1
GPIO1 Output Enable
1
1
read-write
GPIO10
GPIO10 Output Enable
10
1
read-write
GPIO11
GPIO11 Output Enable
11
1
read-write
GPIO12
GPIO12 Output Enable
12
1
read-write
GPIO13
GPIO13 Output Enable
13
1
read-write
GPIO14
GPIO14 Output Enable
14
1
read-write
GPIO15
GPIO15 Output Enable
15
1
read-write
GPIO16
GPIO16 Output Enable
16
1
read-write
GPIO17
GPIO17 Output Enable
17
1
read-write
GPIO18
GPIO18 Output Enable
18
1
read-write
GPIO19
GPIO19 Output Enable
19
1
read-write
GPIO2
GPIO2 Output Enable
2
1
read-write
GPIO20
GPIO20 Output Enable
20
1
read-write
GPIO21
GPIO21 Output Enable
21
1
read-write
GPIO22
GPIO22 Output Enable
22
1
read-write
GPIO23
GPIO23 Output Enable
23
1
read-write
GPIO24
GPIO24 Output Enable
24
1
read-write
GPIO25
GPIO25 Output Enable
25
1
read-write
GPIO26
GPIO26 Output Enable
26
1
read-write
GPIO27
GPIO27 Output Enable
27
1
read-write
GPIO28
GPIO28 Output Enable
28
1
read-write
GPIO29
GPIO29 Output Enable
29
1
read-write
GPIO3
GPIO3 Output Enable
3
1
read-write
GPIO30
GPIO30 Output Enable
30
1
read-write
GPIO31
GPIO31 Output Enable
31
1
read-write
GPIO4
GPIO4 Output Enable
4
1
read-write
GPIO5
GPIO5 Output Enable
5
1
read-write
GPIO6
GPIO6 Output Enable
6
1
read-write
GPIO7
GPIO7 Output Enable
7
1
read-write
GPIO8
GPIO8 Output Enable
8
1
read-write
GPIO9
GPIO9 Output Enable
9
1
read-write
OUTSET
Pin Output Set Register
0x94
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Set
0
1
read-write
GPIO1
GPIO1 Output Set
1
1
read-write
GPIO10
GPIO10 Output Set
10
1
read-write
GPIO11
GPIO11 Output Set
11
1
read-write
GPIO12
GPIO12 Output Set
12
1
read-write
GPIO13
GPIO13 Output Set
13
1
read-write
GPIO14
GPIO14 Output Set
14
1
read-write
GPIO15
GPIO15 Output Set
15
1
read-write
GPIO16
GPIO16 Output Set
16
1
read-write
GPIO17
GPIO17 Output Set
17
1
read-write
GPIO18
GPIO18 Output Set
18
1
read-write
GPIO19
GPIO19 Output Set
19
1
read-write
GPIO2
GPIO2 Output Set
2
1
read-write
GPIO20
GPIO20 Output Set
20
1
read-write
GPIO21
GPIO21 Output Set
21
1
read-write
GPIO22
GPIO22 Output Set
22
1
read-write
GPIO23
GPIO23 Output Set
23
1
read-write
GPIO24
GPIO24 Output Set
24
1
read-write
GPIO25
GPIO25 Output Set
25
1
read-write
GPIO26
GPIO26 Output Set
26
1
read-write
GPIO27
GPIO27 Output Set
27
1
read-write
GPIO28
GPIO28 Output Set
28
1
read-write
GPIO29
GPIO29 Output Set
29
1
read-write
GPIO3
GPIO3 Output Set
3
1
read-write
GPIO30
GPIO30 Output Set
30
1
read-write
GPIO31
GPIO31 Output Set
31
1
read-write
GPIO4
GPIO4 Output Set
4
1
read-write
GPIO5
GPIO5 Output Set
5
1
read-write
GPIO6
GPIO6 Output Set
6
1
read-write
GPIO7
GPIO7 Output Set
7
1
read-write
GPIO8
GPIO8 Output Set
8
1
read-write
GPIO9
GPIO9 Output Set
9
1
read-write
OUTTGL
Pin Output Turn Register
0x9C
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Output Toggle
0
1
read-write
GPIO1
GPIO1 Output Toggle
1
1
read-write
GPIO10
GPIO10 Output Toggle
10
1
read-write
GPIO11
GPIO11 Output Toggle
11
1
read-write
GPIO12
GPIO12 Output Toggle
12
1
read-write
GPIO13
GPIO13 Output Toggle
13
1
read-write
GPIO14
GPIO14 Output Toggle
14
1
read-write
GPIO15
GPIO15 Output Toggle
15
1
read-write
GPIO16
GPIO16 Output Toggle
16
1
read-write
GPIO17
GPIO17 Output Toggle
17
1
read-write
GPIO18
GPIO18 Output Toggle
18
1
read-write
GPIO19
GPIO19 Output Toggle
19
1
read-write
GPIO2
GPIO2 Output Toggle
2
1
read-write
GPIO20
GPIO20 Output Toggle
20
1
read-write
GPIO21
GPIO21 Output Toggle
21
1
read-write
GPIO22
GPIO22 Output Toggle
22
1
read-write
GPIO23
GPIO23 Output Toggle
23
1
read-write
GPIO24
GPIO24 Output Toggle
24
1
read-write
GPIO25
GPIO25 Output Toggle
25
1
read-write
GPIO26
GPIO26 Output Toggle
26
1
read-write
GPIO27
GPIO27 Output Toggle
27
1
read-write
GPIO28
GPIO28 Output Toggle
28
1
read-write
GPIO29
GPIO29 Output Toggle
29
1
read-write
GPIO3
GPIO3 Output Toggle
3
1
read-write
GPIO30
GPIO30 Output Toggle
30
1
read-write
GPIO31
GPIO31 Output Toggle
31
1
read-write
GPIO4
GPIO4 Output Toggle
4
1
read-write
GPIO5
GPIO5 Output Toggle
5
1
read-write
GPIO6
GPIO6 Output Toggle
6
1
read-write
GPIO7
GPIO7 Output Toggle
7
1
read-write
GPIO8
GPIO8 Output Toggle
8
1
read-write
GPIO9
GPIO9 Output Toggle
9
1
read-write
PIN
Pin Value Register
0x80
32
read-only
n
0x0
0x0
GPIO0
GPIO0 Status
0
1
read-write
GPIO1
GPIO1 Status
1
1
read-write
GPIO10
GPIO10 Status
10
1
read-write
GPIO11
GPIO11 Status
11
1
read-write
GPIO12
GPIO12 Status
12
1
read-write
GPIO13
GPIO13 Status
13
1
read-write
GPIO14
GPIO14 Status
14
1
read-write
GPIO15
GPIO15 Status
15
1
read-write
GPIO16
GPIO16 Status
16
1
read-write
GPIO17
GPIO17 Status
17
1
read-write
GPIO18
GPIO18 Status
18
1
read-write
GPIO19
GPIO19 Status
19
1
read-write
GPIO2
GPIO2 Status
2
1
read-write
GPIO20
GPIO20 Status
20
1
read-write
GPIO21
GPIO21 Status
21
1
read-write
GPIO22
GPIO22 Status
22
1
read-write
GPIO23
GPIO23 Status
23
1
read-write
GPIO24
GPIO24 Status
24
1
read-write
GPIO25
GPIO25 Status
25
1
read-write
GPIO26
GPIO26 Status
26
1
read-write
GPIO27
GPIO27 Status
27
1
read-write
GPIO28
GPIO28 Status
28
1
read-write
GPIO29
GPIO29 Status
29
1
read-write
GPIO3
GPIO3 Status
3
1
read-write
GPIO30
GPIO30 Status
30
1
read-write
GPIO31
GPIO31 Status
31
1
read-write
GPIO4
GPIO4 Status
4
1
read-write
GPIO5
GPIO5 Status
5
1
read-write
GPIO6
GPIO6 Status
6
1
read-write
GPIO7
GPIO7 Status
7
1
read-write
GPIO8
GPIO8 Status
8
1
read-write
GPIO9
GPIO9 Status
9
1
read-write
RIS
Original Interrupt Status Register
0xC0
32
read-write
n
0x0
0x0
GPIO0
GPIO0 Original Interrupt Status
0
1
read-write
GPIO1
GPIO1 Original Interrupt Status
1
1
read-write
GPIO10
GPIO10 Original Interrupt Status
10
1
read-write
GPIO11
GPIO11 Original Interrupt Status
11
1
read-write
GPIO12
GPIO12 Original Interrupt Status
12
1
read-write
GPIO13
GPIO13 Original Interrupt Status
13
1
read-write
GPIO14
GPIO14 Original Interrupt Status
14
1
read-write
GPIO15
GPIO15 Original Interrupt Status
15
1
read-write
GPIO16
GPIO16 Original Interrupt Status
16
1
read-write
GPIO17
GPIO17 Original Interrupt Status
17
1
read-write
GPIO18
GPIO18 Original Interrupt Status
18
1
read-write
GPIO19
GPIO19 Original Interrupt Status
19
1
read-write
GPIO2
GPIO2 Original Interrupt Status
2
1
read-write
GPIO20
GPIO20 Original Interrupt Status
20
1
read-write
GPIO21
GPIO21 Original Interrupt Status
21
1
read-write
GPIO22
GPIO22 Original Interrupt Status
22
1
read-write
GPIO23
GPIO23 Original Interrupt Status
23
1
read-write
GPIO24
GPIO24 Original Interrupt Status
24
1
read-write
GPIO25
GPIO25 Original Interrupt Status
25
1
read-write
GPIO26
GPIO26 Original Interrupt Status
26
1
read-write
GPIO27
GPIO27 Original Interrupt Status
27
1
read-write
GPIO28
GPIO28 Original Interrupt Status
28
1
read-write
GPIO29
GPIO29 Original Interrupt Status
29
1
read-write
GPIO3
GPIO3 Original Interrupt Status
3
1
read-write
GPIO30
GPIO30 Original Interrupt Status
30
1
read-write
GPIO31
GPIO31 Original Interrupt Status
31
1
read-write
GPIO4
GPIO4 Original Interrupt Status
4
1
read-write
GPIO5
GPIO5 Original Interrupt Status
5
1
read-write
GPIO6
GPIO6 Original Interrupt Status
6
1
read-write
GPIO7
GPIO7 Original Interrupt Status
7
1
read-write
GPIO8
GPIO8 Original Interrupt Status
8
1
read-write
GPIO9
GPIO9 Original Interrupt Status
9
1
read-write
VERSION
GPIO VERSION
0xC00
32
read-only
n
0x0
0x0
PPU
PPU
PPU
0x0
0x0
0x1000
registers
n
CTRL
CTRL Register
0x0
32
read-write
n
0x0
0x0
ppu_hps01_intr_en
ppu hps01 intrrupt enable
8
1
read-write
ppu_hps23_intr_en
ppu hps23 intrrupt enable
9
1
read-write
ppu_pps01_intr_en
ppu pps01 intrrupt enable
12
1
read-write
ppu_pps23_intr_en
ppu pps23 intrrupt enable
13
1
read-write
ppu_ram_intr_en
ppu ram intrrupt enable
4
1
read-write
HPS01_PROT
HPS01_PROT Register
0x20
32
read-write
n
0x0
0x0
PA_en
PA enable
0
1
read-write
PB_en
PB enable
1
1
read-write
PC_en
PC enable
3
1
read-write
HPS01_TRAP
HPS01_TRAP Register
0x60
32
read-write
n
0x0
0x0
PA_en
PA enable
0
1
read-write
PB_en
PB enable
1
1
read-write
PC_en
PC enable
2
1
read-write
HPS23_PROT
HPS23_PROT Register
0x24
32
read-write
n
0x0
0x0
coproc_en
coproc_en
0
1
read-write
HPS23_TRAP
HPS23_TRAP Register
0x64
32
read-write
n
0x0
0x0
coproc_en
coproc_en
0
1
read-write
PPS01_PROT
PPS01_PROT Register
0x30
32
read-write
n
0x0
0x0
chipctrl_en
chipctrl enable
1
1
read-write
dma_en
dma enable
6
1
read-write
eflash_en
eflash enable
8
1
read-write
eru_en
eru enable
3
1
read-write
i2c_en
i2c enable
23
1
read-write
ssp_en
ssp enable
24
1
read-write
syscfg_en
syscfg enable
0
1
read-write
uart0_en
uart0 enable
16
1
read-write
uart1_en
uart1 enable
17
1
read-write
uart2_en
uart2 enable
18
1
read-write
WDT_en
WDT enable
12
1
read-write
PPS01_TRAP
PPS01_TRAP Register
0x70
32
read-write
n
0x0
0x0
chipctrl_en
chipctrl able
1
1
read-write
dma_en
dma able
6
1
read-write
eflash_en
eflash able
8
1
read-write
eru_en
eru able
3
1
read-write
i2c_en
i2c able
23
1
read-write
ssp_en
ssp able
24
1
read-write
syscfg_en
syscfg able
0
1
read-write
uart0_en
uart0 able
16
1
read-write
uart1_en
uart1 able
17
1
read-write
uart2_en
uart2 able
18
1
read-write
WDT_en
WDT able
12
1
read-write
PPS23_PROT
PPS23_PROT Register
0x34
32
read-write
n
0x0
0x0
acmp_opa_en
acmp opa enable
10
1
read-write
adc_en
adc enable
8
1
read-write
pwmtop0_en
pwmtop0 enable
4
1
read-write
pwmtop1_en
pwmtop1 enable
5
1
read-write
Timertop0_en
Timertop0 enable
12
1
read-write
Timertop1_en
Timertop1 enable
13
1
read-write
Timertop6_en
Timertop6 enable
15
1
read-write
PPS23_TRAP
PPS23_PROT Register
0x74
32
read-write
n
0x0
0x0
acmp_opa_en
acmp opa able
10
1
read-write
adc_en
adc able
8
1
read-write
pwmtop0_en
pwmtop0 able
4
1
read-write
pwmtop1_en
pwmtop1 able
5
1
read-write
Timertop0_en
Timertop0 able
12
1
read-write
Timertop1_en
Timertop1 able
13
1
read-write
Timertop6_en
Timertop6 able
15
1
read-write
RAM_PROT
RAM_PROT Register
0x10
32
read-write
n
0x0
0x0
RAM_TRAP
RAM_TRAP Register
0x50
32
read-write
n
0x0
0x0
PWM0
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM0
PWM0 Interrupt
23
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM1
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM1256
PWM1256 Interrupt
27
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM2
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM1256
PWM1256 Interrupt
27
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM3
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM3
PWM3 Interrupt
24
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM4
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM4
PWM4 Interrupt
25
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM5
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM1256
PWM1256 Interrupt
27
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM6
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM1256
PWM1256 Interrupt
27
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
PWM7
PWM0
PWM
0x0
0x0
0x400
registers
n
PWM7
PWM7 Interrupt
26
AQCSFRC
Action-Qualifier Continuous Software Force Register
0x38
32
read-write
n
0x0
0x0
CSFA
Continuous Software Force on Output A
0
2
read-write
CSFB
Continuous Software Force on Output B
2
2
read-write
AQCTLA
Action-Qualifier Output A Control Register
0x2C
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQCTLB
Action-Qualifier Output B Control Register
0x30
32
read-write
n
0x0
0x0
CAD
Action when the counter equals the active CMPA register and the counter is decrementing
6
2
read-write
CAU
Action when the counter equals the active CMPA register and the counter is incrementing
4
2
read-write
CBD
Action when the time-base counter equals the active CMPB register and the counter is decrementing
10
2
read-write
CBU
Action when the counter equals the active CMPB register and the counter is incrementing
8
2
read-write
PRU
Action when the counter equals the period
2
2
read-write
ZRO
Action when counter equals zero
0
2
read-write
AQSFRC
Action-Qualifier Software Force Register
0x34
32
read-write
n
0x0
0x0
ACTSFA
Action When One-Time Software Force A Is Invoked
0
2
read-write
ACTSFB
Action when One-Time Software Force B Is invoked
3
2
read-write
OTSFA
One-Time Software Forced Event on Output A
2
1
read-write
OTSFB
One-Time Software Forced Event on Output B
5
1
read-write
RLDCSF
AQCSFRC Active Register Reload From Shadow Options
6
2
read-write
CMPA
Counter-Compare A Register
0x24
32
read-write
n
0x0
0x0
CMPAM
Compare Register A Mirror
0xB4
32
read-write
n
0x0
0x0
CMPB
Counter-Compare B Register
0x28
32
read-write
n
0x0
0x0
CMPCTL
Counter-Compare Control Register
0x1C
32
read-write
n
0x0
0x0
LOADAMODE
Active CMPA Load From Shadow Select Mode
0
2
read-write
LOADBMODE
Active CMPB Load From Shadow Select Mode
2
2
read-write
SHDWAFULL
CMPA Shadow Register Full Status Flag
8
1
read-only
SHDWAMODE
CMPA Register Operating Mode
4
1
read-write
SHDWBFULL
CMPB Shadow Register Full Status Flag
9
1
read-only
SHDWBMODE
CMPB Register Operating Mode
6
1
read-write
DBCTL
Dead-Band Generator Control Register
0x3C
32
read-write
n
0x0
0x0
HALFCYCLE
Half Cycle Clocking Enable Bit
15
1
read-write
IN_MODE
Dead Band Input Mode Control
4
2
read-write
OUT_MODE
Dead-band Output Mode Control
0
2
read-write
POLSEL
Polarity Select Control
2
2
read-write
DBFED
Dead-Band Generator Falling Edge Delay Register
0x44
32
read-write
n
0x0
0x0
DBRED
Dead-Band Generator Rising Edge Delay Register
0x40
32
read-write
n
0x0
0x0
DCACTL
Digital Compare A Control Register
0xC4
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCAEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCAEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCAEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCAEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCAEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCAEVT2 Source Signal Select
8
1
read-write
DCBCTL
Digital Compare B Control Register
0xC8
32
read-write
n
0x0
0x0
EVT1FRCSYNCSEL
DCBEVT1 Force Synchronization Signal Select
1
1
read-write
EVT1SOCE
DCBEVT1 SOC, Enable/Disable
2
1
read-write
EVT1SRCSEL
DCBEVT1 Source Signal Select
0
1
read-write
EVT1SYNCE
DCBEVT1 SYNC, Enable/Disable
3
1
read-write
EVT2FRCSYNCSEL
DCBEVT2 Force Synchronization Signal Select
9
1
read-write
EVT2SRCSEL
DCBEVT2 Source Signal Select
8
1
read-write
DCCAP
Digital Compare Counter Capture Register
0xE4
32
read-only
n
0x0
0x0
DCCAPCTL
Digital Compare Capture Control Register
0xD0
32
read-write
n
0x0
0x0
CAPE
TBCTR Counter Capture Enable/Disable
0
1
read-write
SHDWMODE
TBCTR Counter Capture Shadow Select Mode
1
1
read-write
DCFCTL
Digital Compare Filter Control Register
0xCC
32
read-write
n
0x0
0x0
BLANKE
Blanking Window Enable/Disable
2
1
read-write
BLANKINV
Blanking Window Inversion
3
1
read-write
PULSESEL
Pulse Select For Blanking and Capture Alignment
4
2
read-write
SRCSEL
Filter Block Signal Source Select
0
2
read-write
DCFOFFSET
Digital Compare Filter Offset Register
0xD4
32
read-write
n
0x0
0x0
DCFOFFSETCNT
Digital Compare Filter Offset Counter Register
0xD8
32
read-only
n
0x0
0x0
DCFWINDOW
Digital Compare Filter Window Register
0xDC
32
read-write
n
0x0
0x0
WINDOW
Blanking Window Width
0
8
read-write
DCFWINDOWCNT
Digital Compare Filter Window Counter Register
0xE0
32
read-only
n
0x0
0x0
WINDOWCNT
Blanking Window Counter
0
8
read-only
DCTRIPSEL
Digital Compare Trip Select
0xC0
32
read-write
n
0x0
0x0
DCAHCOMPSEL
Digital Compare A High Input Select
0
4
read-write
DCALCOMPSEL
Digital Compare A Low Input Select
4
4
read-write
DCBHCOMPSEL
Digital Compare B High Input Select
8
4
read-write
DCBLCOMPSEL
Digital Compare B Low Input Select
12
4
read-write
ETCLR
Event-Trigger Clear Register
0x70
32
read-write
n
0x0
0x0
INT
ePWM Interrupt (EPWMx_INT) Flag Clear Bit
0
1
read-write
SOCA
ePWM ADC Start-of-Conversion A (EPWMxSOCA) Flag Clear Bit
2
1
read-write
SOCB
ePWM ADC Start-of-Conversion B (EPWMxSOCB) Flag Clear Bit
3
1
read-write
ETFLG
Event-Trigger Flag Register
0x6C
32
read-only
n
0x0
0x0
CTRDIR
PWM Counter Direction
31
1
read-only
INT
Latched ePWM Interrupt (EPWMx_INT) Status Flag
0
1
read-only
SOCA
Latched ePWM ADC Start-of-Conversion A (EPWMxSOCA) Status Flag
2
1
read-only
SOCB
Latched ePWM ADC Start-of-Conversion B (EPWMxSOCB) Status Flag
3
1
read-only
ETFRC
Event-Trigger Force Register
0x74
32
read-write
n
0x0
0x0
INT
INT Force Bit
0
1
read-write
SOCA
SOCA Force Bit
2
1
read-write
SOCB
SOCB Force Bit
3
1
read-write
ETPS
Event-Trigger Prescale Register
0x68
32
read-write
n
0x0
0x0
INTCNT
ePWM Interrupt Event (EPWMx_INT) Counter Register
2
2
read-only
INTPRD
ePWM Interrupt (EPWMx_INT) Period Select
0
2
read-write
SOCACNT
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Counter Register
10
2
read-only
SOCAPRD
ePWM ADC Start-of-Conversion A Event (EPWMxSOCA) Period Select
8
2
read-write
SOCBCNT
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Counter Register
14
2
read-only
SOCBPRD
ePWM ADC Start-of-Conversion B Event (EPWMxSOCB) Period Select
12
2
read-write
ETSEL
Event-Trigger Selection Register
0x64
32
read-write
n
0x0
0x0
INTEN
Enable ePWM Interrupt (EPWMx_INT) Generation
3
1
read-write
INTESEL
ePWM Interrupt (EPWMx_INT) Selection Options
0
3
read-write
SOCAEN
Enable the ADC Start of Conversion A (EPWMxSOCA) Pulse
11
1
read-write
SOCASEL
EPWMxSOCA Selection Options
8
3
read-write
SOCBEN
Enable the ADC Start of Conversion B (EPWMxSOCB) Pulse
15
1
read-write
SOCBSEL
EPWMxSOCB Selection Options
12
3
read-write
PCCTL
PWM-Chopper Control Register
0x78
32
read-write
n
0x0
0x0
CHPDUTY
Chopping Clock Duty Cycle
8
3
read-write
CHPEN
PWM-chopping Enable
0
1
read-write
CHPFREQ
Chopping Clock Frequency
5
3
read-write
CHPFREQ1
Chopping Clock Frequency1
11
5
read-write
OSHTWTH
One-Shot Pulse Width
1
4
read-write
TBCTL
Time-Base Control Register
0x0
32
read-write
n
0x0
0x0
CLKDIV
Time-base Clock Prescale Bits
10
3
read-write
CTRMODE
Counter Mode
0
2
read-write
FREE_SOFT
Emulation Mode Bits
14
2
read-write
HSPCLKDIV
High Speed Time-base Clock Prescale Bits
7
3
read-write
PHSDIR
Phase Direction Bit
13
1
read-write
PHSEN
Counter Register Load From Phase Register Enable
2
1
read-write
PRDLD
Active Period Register Load From Shadow Register Select
3
1
read-write
SWFSYNC
Software Forced Synchronization Pulse
6
1
read-write
SYNCOSEL
Synchronization Output Select
4
2
read-write
TBCTR
Time-Base Counter Register
0x10
32
read-write
n
0x0
0x0
TBPHS
Time-Base Phase Register
0xC
32
read-write
n
0x0
0x0
TBPRD
Time-Base Period Register
0x14
32
read-write
n
0x0
0x0
TBPRDM
Time Base Period register Mirror
0xAC
32
read-write
n
0x0
0x0
TBSTS
Time-Base Status Register
0x4
32
read-write
n
0x0
0x0
CTRDIR
Time-Base Counter Direction Status Bit
0
1
read-only
CTRMAX
Time-Base Counter Max Latched Status Bit
2
1
read-write
SYNCI
Input Synchronization Latched Status Bit
1
1
read-write
TZCLR
Trip-Zone Clear Register
0x5C
32
read-write
n
0x0
0x0
CBC
Clear Flag for Cycle-By-Cycle (CBC) Trip Latch
1
1
read-write
DCAEVT1
Clear Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Clear Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Clear Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Clear Flag for Digital Compare Output B Event 2
6
1
read-write
INT
Global Interrupt Clear Flag
0
1
read-write
OST
Clear Flag for One-Shot Trip Latch
2
1
read-write
TZCTL
Trip-Zone Control Register
0x50
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Action On EPWMxA
4
2
read-write
DCAEVT2
Digital Compare Output A Event 2 Action On EPWMxA
6
2
read-write
DCBEVT1
Digital Compare Output B Event 1 Action On EPWMxB
8
2
read-write
DCBEVT2
Digital Compare Output B Event 2 Action On EPWMxB
10
2
read-write
SYNC_OUTEN
PWM output sync enable
31
1
read-write
TZA
Action on output EPWMxA
0
2
read-write
TZB
Action on output EPWMxB
2
2
read-write
TZDCSEL
Trip Zone Digital Compare Event Select Register
0x4C
32
read-write
n
0x0
0x0
DCAEVT1
Digital Compare Output A Event 1 Selection
0
3
read-write
DCAEVT2
Digital Compare Output A Event 2 Selection
3
3
read-write
DCBEVT1
Digital Compare Output B Event 1 Selection
6
3
read-write
DCBEVT2
Digital Compare Output B Event 2 Selection
9
3
read-write
TZEINT
Trip-Zone Enable Interrupt Register
0x54
32
read-write
n
0x0
0x0
CBC
Trip-zone Cycle-by-Cycle Interrupt Enable
1
1
read-write
DCAEVT1
Digital Comparator Output A Event 1 Interrupt Enable
3
1
read-write
DCAEVT2
Digital Comparator Output A Event 2 Interrupt Enable
4
1
read-write
DCBEVT1
Digital Comparator Output B Event 1 Interrupt Enable
5
1
read-write
DCBEVT2
Digital Comparator Output B Event 2 Interrupt Enable
6
1
read-write
OST
Trip-zone One-Shot Interrupt Enable
2
1
read-write
TZFLG
Trip-Zone Flag Register
0x58
32
read-only
n
0x0
0x0
CBC
Latched Status Flag for Cycle-By-Cycle Trip Event
1
1
read-only
DCAEVT1
Latched Status Flag for Digital Compare Output A Event 1
3
1
read-only
DCAEVT2
Latched Status Flag for Digital Compare Output A Event 2
4
1
read-only
DCBEVT1
Latched Status Flag for Digital Compare Output B Event 1
5
1
read-only
DCBEVT2
Latched Status Flag for Digital Compare Output B Event 2
6
1
read-only
INT
Latched Trip Interrupt Status Flag
0
1
read-only
OST
Latched Status Flag for A One-Shot Trip Event
2
1
read-only
TZFRC
Trip-Zone Force Register
0x60
32
read-write
n
0x0
0x0
CBC
Force a Cycle-by-Cycle Trip Event via Software
1
1
read-write
DCAEVT1
Force Flag for Digital Compare Output A Event 1
3
1
read-write
DCAEVT2
Force Flag for Digital Compare Output A Event 2
4
1
read-write
DCBEVT1
Force Flag for Digital Compare Output B Event 1
5
1
read-write
DCBEVT2
Force Flag for Digital Compare Output B Event 2
6
1
read-write
OST
Force a One-Shot Trip Event via Software
2
1
read-write
TZSEL
Trip-Zone Submodule Select Register
0x48
32
read-write
n
0x0
0x0
CBC0
A0 Event Source Select
0
1
read-write
CBC1
B0 Event Source Select
1
1
read-write
CBC2
A0 Event Source Select
2
1
read-write
CBC3
B0 Event Source Select
3
1
read-write
CBC4
A0 Event Source Select
4
1
read-write
CBC5
B0 Event Source Select
5
1
read-write
DCAEVT1
Digital Compare Output A Event 1 Select
14
1
read-write
DCAEVT2
Digital Compare Output A Event 2 Select
6
1
read-write
DCBEVT1
Digital Compare Output B Event 1 Select
15
1
read-write
DCBEVT2
Digital Compare Output B Event 2 Select
7
1
read-write
OSHT0
A0 Event Source Select
8
1
read-write
OSHT1
B0 Event Source Select
9
1
read-write
OSHT2
A0 Event Source Select
10
1
read-write
OSHT3
B0 Event Source Select
11
1
read-write
OSHT4
A0 Event Source Select
12
1
read-write
OSHT5
B0 Event Source Select
13
1
read-write
SSP0
SSP0
SSP
0x0
0x0
0x1000
registers
n
SSP01
SSP01 Interrupt
3
SSPCPSR
Clock prescale Register
0x10
32
read-write
n
0x0
0x0
CPSDVSR
Clock prescale divisor
0
8
read-write
SSPCR0
Control Register 0
0x0
32
read-write
n
0x0
0x0
DSS
Data Size Select
0
4
read-write
FRF
Frame format
4
2
read-write
SCR
Serial Clock rate
8
8
read-write
SPH
SSPCLKOUT phase
7
1
read-write
SPO
SSPCLKOUT polarity
6
1
read-write
SSPCR1
Control Register 1
0x4
32
read-write
n
0x0
0x0
DMALEV
DMA RX FIFO trig level
4
3
read-write
LBM
Loop back mode
0
1
read-write
MS
Master or Slave mode select
2
1
read-write
SOD
Clear Data Overrun
3
1
read-write
SSE
Synchronous serial port enable
1
1
read-write
SSPDMACR
DMA Control Register
0x24
32
read-write
n
0x0
0x0
RXDMAE
Receive DMA Enable.
0
1
read-write
TXDMAE
Transmit DMA Enable
1
1
read-write
SSPDR
Data Register
0x8
32
read-write
n
0x0
0x0
DATA
Transmit/Receive FIFO
0
16
read-write
SSPICR
Interrupt Clear Register
0x20
32
write-only
n
0x0
0x0
RORIC
Clears the SSPRORINTR interrupt
0
1
write-only
RTIC
Clears the SSPRTINTR interrupt
1
1
write-only
SSPIMSC
Interrupt Set or Clear Register
0x14
32
read-write
n
0x0
0x0
RORIM
Receive overrun interrupt mask
0
1
read-write
RTIM
Receive timeout interrupt mask
1
1
read-write
RXIM
Receive FIFO interrupt mask
2
1
read-write
TXIM
Receive FIFO interrupt mask
3
1
read-write
SSPMIS
Masked Interrupt Staus Register
0x1C
32
read-only
n
0x0
0x0
RORMIS
Gives the receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt
0
1
read-only
RTMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
1
1
read-only
RXMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
2
1
read-only
TXMIS
Gives the transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt
3
1
read-only
SSPPCID0
PrimCell Identification Register0
0xFF0
32
read-only
n
0x0
0x0
SSPPCID1
PrimCell Identification Register1
0xFF4
32
read-only
n
0x0
0x0
SSPPCID2
PrimCell Identification Register2
0xFF8
32
read-only
n
0x0
0x0
SSPPCID3
PrimCell Identification Register3
0xFFC
32
read-only
n
0x0
0x0
SSPPID0
Peripheral Identification Register0
0xFE0
32
read-only
n
0x0
0x0
SSPPID1
Peripheral Identification Register1
0xFE4
32
read-only
n
0x0
0x0
SSPPID2
Peripheral Identification Register2
0xFE8
32
read-only
n
0x0
0x0
SSPPID3
Peripheral Identification Register3
0xFEC
32
read-only
n
0x0
0x0
SSPRIS
Raw Interrupt Status Register
0x18
32
read-only
n
0x0
0x0
RORRIS
Gives the raw interrupt state, prior to masking, of the SSPRORINTR interrupt
0
1
read-only
RTRIS
Gives the raw interrupt state, prior to masking, of the SSPRTINTR interrupt
1
1
read-only
RXRIS
Gives the raw interrupt state, prior to masking, of the SSPRXINTR interrupt
2
1
read-only
TXRIS
Gives the raw interrupt state, prior to masking, of the SSPTXINTR interrupt
3
1
read-only
SSPSR
Status Register
0xC
32
read-only
n
0x0
0x0
BSY
PrimeCell SSP busy flag
4
1
read-only
RFF
Receive FIFO full
3
1
read-only
RNE
Receive FIFO not empty
2
1
read-only
TFE
Transmit FIFO emptyt
0
1
read-only
TNF
Transmit FIFO full
1
1
read-only
SSP1
SSP0
SSP
0x0
0x0
0x1000
registers
n
SSP01
SSP01 Interrupt
3
SSPCPSR
Clock prescale Register
0x10
32
read-write
n
0x0
0x0
CPSDVSR
Clock prescale divisor
0
8
read-write
SSPCR0
Control Register 0
0x0
32
read-write
n
0x0
0x0
DSS
Data Size Select
0
4
read-write
FRF
Frame format
4
2
read-write
SCR
Serial Clock rate
8
8
read-write
SPH
SSPCLKOUT phase
7
1
read-write
SPO
SSPCLKOUT polarity
6
1
read-write
SSPCR1
Control Register 1
0x4
32
read-write
n
0x0
0x0
DMALEV
DMA RX FIFO trig level
4
3
read-write
LBM
Loop back mode
0
1
read-write
MS
Master or Slave mode select
2
1
read-write
SOD
Clear Data Overrun
3
1
read-write
SSE
Synchronous serial port enable
1
1
read-write
SSPDMACR
DMA Control Register
0x24
32
read-write
n
0x0
0x0
RXDMAE
Receive DMA Enable.
0
1
read-write
TXDMAE
Transmit DMA Enable
1
1
read-write
SSPDR
Data Register
0x8
32
read-write
n
0x0
0x0
DATA
Transmit/Receive FIFO
0
16
read-write
SSPICR
Interrupt Clear Register
0x20
32
write-only
n
0x0
0x0
RORIC
Clears the SSPRORINTR interrupt
0
1
write-only
RTIC
Clears the SSPRTINTR interrupt
1
1
write-only
SSPIMSC
Interrupt Set or Clear Register
0x14
32
read-write
n
0x0
0x0
RORIM
Receive overrun interrupt mask
0
1
read-write
RTIM
Receive timeout interrupt mask
1
1
read-write
RXIM
Receive FIFO interrupt mask
2
1
read-write
TXIM
Receive FIFO interrupt mask
3
1
read-write
SSPMIS
Masked Interrupt Staus Register
0x1C
32
read-only
n
0x0
0x0
RORMIS
Gives the receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt
0
1
read-only
RTMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
1
1
read-only
RXMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
2
1
read-only
TXMIS
Gives the transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt
3
1
read-only
SSPPCID0
PrimCell Identification Register0
0xFF0
32
read-only
n
0x0
0x0
SSPPCID1
PrimCell Identification Register1
0xFF4
32
read-only
n
0x0
0x0
SSPPCID2
PrimCell Identification Register2
0xFF8
32
read-only
n
0x0
0x0
SSPPCID3
PrimCell Identification Register3
0xFFC
32
read-only
n
0x0
0x0
SSPPID0
Peripheral Identification Register0
0xFE0
32
read-only
n
0x0
0x0
SSPPID1
Peripheral Identification Register1
0xFE4
32
read-only
n
0x0
0x0
SSPPID2
Peripheral Identification Register2
0xFE8
32
read-only
n
0x0
0x0
SSPPID3
Peripheral Identification Register3
0xFEC
32
read-only
n
0x0
0x0
SSPRIS
Raw Interrupt Status Register
0x18
32
read-only
n
0x0
0x0
RORRIS
Gives the raw interrupt state, prior to masking, of the SSPRORINTR interrupt
0
1
read-only
RTRIS
Gives the raw interrupt state, prior to masking, of the SSPRTINTR interrupt
1
1
read-only
RXRIS
Gives the raw interrupt state, prior to masking, of the SSPRXINTR interrupt
2
1
read-only
TXRIS
Gives the raw interrupt state, prior to masking, of the SSPTXINTR interrupt
3
1
read-only
SSPSR
Status Register
0xC
32
read-only
n
0x0
0x0
BSY
PrimeCell SSP busy flag
4
1
read-only
RFF
Receive FIFO full
3
1
read-only
RNE
Receive FIFO not empty
2
1
read-only
TFE
Transmit FIFO emptyt
0
1
read-only
TNF
Transmit FIFO full
1
1
read-only
SSP2
SSP0
SSP
0x0
0x0
0x1000
registers
n
SSP23_IIC
SSP23 and IIC Interrupt
4
SSPCPSR
Clock prescale Register
0x10
32
read-write
n
0x0
0x0
CPSDVSR
Clock prescale divisor
0
8
read-write
SSPCR0
Control Register 0
0x0
32
read-write
n
0x0
0x0
DSS
Data Size Select
0
4
read-write
FRF
Frame format
4
2
read-write
SCR
Serial Clock rate
8
8
read-write
SPH
SSPCLKOUT phase
7
1
read-write
SPO
SSPCLKOUT polarity
6
1
read-write
SSPCR1
Control Register 1
0x4
32
read-write
n
0x0
0x0
DMALEV
DMA RX FIFO trig level
4
3
read-write
LBM
Loop back mode
0
1
read-write
MS
Master or Slave mode select
2
1
read-write
SOD
Clear Data Overrun
3
1
read-write
SSE
Synchronous serial port enable
1
1
read-write
SSPDMACR
DMA Control Register
0x24
32
read-write
n
0x0
0x0
RXDMAE
Receive DMA Enable.
0
1
read-write
TXDMAE
Transmit DMA Enable
1
1
read-write
SSPDR
Data Register
0x8
32
read-write
n
0x0
0x0
DATA
Transmit/Receive FIFO
0
16
read-write
SSPICR
Interrupt Clear Register
0x20
32
write-only
n
0x0
0x0
RORIC
Clears the SSPRORINTR interrupt
0
1
write-only
RTIC
Clears the SSPRTINTR interrupt
1
1
write-only
SSPIMSC
Interrupt Set or Clear Register
0x14
32
read-write
n
0x0
0x0
RORIM
Receive overrun interrupt mask
0
1
read-write
RTIM
Receive timeout interrupt mask
1
1
read-write
RXIM
Receive FIFO interrupt mask
2
1
read-write
TXIM
Receive FIFO interrupt mask
3
1
read-write
SSPMIS
Masked Interrupt Staus Register
0x1C
32
read-only
n
0x0
0x0
RORMIS
Gives the receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt
0
1
read-only
RTMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
1
1
read-only
RXMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
2
1
read-only
TXMIS
Gives the transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt
3
1
read-only
SSPPCID0
PrimCell Identification Register0
0xFF0
32
read-only
n
0x0
0x0
SSPPCID1
PrimCell Identification Register1
0xFF4
32
read-only
n
0x0
0x0
SSPPCID2
PrimCell Identification Register2
0xFF8
32
read-only
n
0x0
0x0
SSPPCID3
PrimCell Identification Register3
0xFFC
32
read-only
n
0x0
0x0
SSPPID0
Peripheral Identification Register0
0xFE0
32
read-only
n
0x0
0x0
SSPPID1
Peripheral Identification Register1
0xFE4
32
read-only
n
0x0
0x0
SSPPID2
Peripheral Identification Register2
0xFE8
32
read-only
n
0x0
0x0
SSPPID3
Peripheral Identification Register3
0xFEC
32
read-only
n
0x0
0x0
SSPRIS
Raw Interrupt Status Register
0x18
32
read-only
n
0x0
0x0
RORRIS
Gives the raw interrupt state, prior to masking, of the SSPRORINTR interrupt
0
1
read-only
RTRIS
Gives the raw interrupt state, prior to masking, of the SSPRTINTR interrupt
1
1
read-only
RXRIS
Gives the raw interrupt state, prior to masking, of the SSPRXINTR interrupt
2
1
read-only
TXRIS
Gives the raw interrupt state, prior to masking, of the SSPTXINTR interrupt
3
1
read-only
SSPSR
Status Register
0xC
32
read-only
n
0x0
0x0
BSY
PrimeCell SSP busy flag
4
1
read-only
RFF
Receive FIFO full
3
1
read-only
RNE
Receive FIFO not empty
2
1
read-only
TFE
Transmit FIFO emptyt
0
1
read-only
TNF
Transmit FIFO full
1
1
read-only
SSP3
SSP0
SSP
0x0
0x0
0x1000
registers
n
SSP23_IIC
SSP23 and IIC Interrupt
4
SSPCPSR
Clock prescale Register
0x10
32
read-write
n
0x0
0x0
CPSDVSR
Clock prescale divisor
0
8
read-write
SSPCR0
Control Register 0
0x0
32
read-write
n
0x0
0x0
DSS
Data Size Select
0
4
read-write
FRF
Frame format
4
2
read-write
SCR
Serial Clock rate
8
8
read-write
SPH
SSPCLKOUT phase
7
1
read-write
SPO
SSPCLKOUT polarity
6
1
read-write
SSPCR1
Control Register 1
0x4
32
read-write
n
0x0
0x0
DMALEV
DMA RX FIFO trig level
4
3
read-write
LBM
Loop back mode
0
1
read-write
MS
Master or Slave mode select
2
1
read-write
SOD
Clear Data Overrun
3
1
read-write
SSE
Synchronous serial port enable
1
1
read-write
SSPDMACR
DMA Control Register
0x24
32
read-write
n
0x0
0x0
RXDMAE
Receive DMA Enable.
0
1
read-write
TXDMAE
Transmit DMA Enable
1
1
read-write
SSPDR
Data Register
0x8
32
read-write
n
0x0
0x0
DATA
Transmit/Receive FIFO
0
16
read-write
SSPICR
Interrupt Clear Register
0x20
32
write-only
n
0x0
0x0
RORIC
Clears the SSPRORINTR interrupt
0
1
write-only
RTIC
Clears the SSPRTINTR interrupt
1
1
write-only
SSPIMSC
Interrupt Set or Clear Register
0x14
32
read-write
n
0x0
0x0
RORIM
Receive overrun interrupt mask
0
1
read-write
RTIM
Receive timeout interrupt mask
1
1
read-write
RXIM
Receive FIFO interrupt mask
2
1
read-write
TXIM
Receive FIFO interrupt mask
3
1
read-write
SSPMIS
Masked Interrupt Staus Register
0x1C
32
read-only
n
0x0
0x0
RORMIS
Gives the receive over run masked interrupt status, after masking, of the SSPRORINTR interrupt
0
1
read-only
RTMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
1
1
read-only
RXMIS
Gives the receive timeout masked interrupt state, after masking, of the SSPRTINTR interrupt
2
1
read-only
TXMIS
Gives the transmit FIFO masked interrupt state, after masking, of the SSPTXINTR interrupt
3
1
read-only
SSPPCID0
PrimCell Identification Register0
0xFF0
32
read-only
n
0x0
0x0
SSPPCID1
PrimCell Identification Register1
0xFF4
32
read-only
n
0x0
0x0
SSPPCID2
PrimCell Identification Register2
0xFF8
32
read-only
n
0x0
0x0
SSPPCID3
PrimCell Identification Register3
0xFFC
32
read-only
n
0x0
0x0
SSPPID0
Peripheral Identification Register0
0xFE0
32
read-only
n
0x0
0x0
SSPPID1
Peripheral Identification Register1
0xFE4
32
read-only
n
0x0
0x0
SSPPID2
Peripheral Identification Register2
0xFE8
32
read-only
n
0x0
0x0
SSPPID3
Peripheral Identification Register3
0xFEC
32
read-only
n
0x0
0x0
SSPRIS
Raw Interrupt Status Register
0x18
32
read-only
n
0x0
0x0
RORRIS
Gives the raw interrupt state, prior to masking, of the SSPRORINTR interrupt
0
1
read-only
RTRIS
Gives the raw interrupt state, prior to masking, of the SSPRTINTR interrupt
1
1
read-only
RXRIS
Gives the raw interrupt state, prior to masking, of the SSPRXINTR interrupt
2
1
read-only
TXRIS
Gives the raw interrupt state, prior to masking, of the SSPTXINTR interrupt
3
1
read-only
SSPSR
Status Register
0xC
32
read-only
n
0x0
0x0
BSY
PrimeCell SSP busy flag
4
1
read-only
RFF
Receive FIFO full
3
1
read-only
RNE
Receive FIFO not empty
2
1
read-only
TFE
Transmit FIFO emptyt
0
1
read-only
TNF
Transmit FIFO full
1
1
read-only
SYSREG
SYSREG
SYSREG
0x0
0x0
0x1000
registers
n
ACCESS_EN
ACCESS ENABLE Register
0x800
32
read-write
n
0x0
0x0
CHIP_ID
CHIP_ID Register
0x124
32
read-only
n
0x0
0x0
CPU1_ADDR0_REMAP_CFG
CPU1 Address0 Remap Confige Register
0x30
32
read-write
n
0x0
0x0
CPU1_ADDR4_REMAP_CFG
CPU1 Address4 Remap Confige Register
0x34
32
read-write
n
0x0
0x0
ETIMER_CFG
ETIMER confige Register
0x14
32
read-write
n
0x0
0x0
INTR_STATUS0
interrupt status register 0
0x100
32
read-only
n
0x0
0x0
GPIO_GP0_INTR
GPIO0 interrupt status
7
1
read-only
GPIO_GP1_INTR
GPIO1 interrupt status
8
1
read-only
GPIO_GP2_INTR
GPIO2 interrupt status
9
1
read-only
GPIO_GP3_INTR
GPIO3 interrupt status
10
1
read-only
GPIO_GP4_INTR
GPIO4 interrupt status
11
1
read-only
GPIO_GP5_INTR
GPIO5 interrupt status
12
1
read-only
I2C_INTR
I2C interrupt status
6
1
read-only
PWM0_INTR
PWM0 interrupt status
16
1
read-only
PWM1_INTR
PWM1 interrupt status
17
1
read-only
PWM2_INTR
PWM2 interrupt status
18
1
read-only
PWM3_INTR
PWM3 interrupt status
19
1
read-only
PWM4_INTR
PWM4 interrupt status
20
1
read-only
PWM5_INTR
PWM5 interrupt status
21
1
read-only
PWM6_INTR
PWM6 interrupt status
22
1
read-only
PWM7_INTR
PWM7 interrupt status
23
1
read-only
SSP0_INTR
SSP0 interrupt status
2
1
read-only
SSP1_INTR
SSP1 interrupt status
3
1
read-only
SSP2_INTR
SSP2 interrupt status
4
1
read-only
SSP3_INTR
SSP3 interrupt status
5
1
read-only
UART1_INTR
UART1 interrupt status
0
1
read-only
UART2_INTR
UART2 interrupt status
1
1
read-only
INTR_STATUS1
interrupt status register 1
0x104
32
read-only
n
0x0
0x0
ATOM_INTR
atom interrupt status
16
1
read-only
CORDIC_INTR
cordic interrupt status
27
1
read-only
DIV_BY_0_INTR
divide by 0 interrupt status
25
1
read-only
EFLASH_INTR
eflash interrupt status
18
1
read-only
MAC_OV_INTR
mac overflow interrupt status
26
1
read-only
PPU_INTR
ppu interrupt status
17
1
read-only
PWM0_TZ_INTR
PWM0 TZ interrupt status
0
1
read-only
PWM1_TZ_INTR
PWM1 TZ interrupt status
1
1
read-only
PWM2_TZ_INTR
PWM2 TZ interrupt status
2
1
read-only
PWM3_TZ_INTR
PWM3 TZ interrupt status
3
1
read-only
PWM4_TZ_INTR
PWM4 TZ interrupt status
4
1
read-only
PWM5_TZ_INTR
PWM5 TZ interrupt status
5
1
read-only
PWM6_TZ_INTR
PWM6 TZ interrupt status
6
1
read-only
PWM7_TZ_INTR
PWM7 TZ interrupt status
7
1
read-only
SND_MAC_OV_INTR
second mac overflow interrupt status
28
1
read-only
SYSRAM0_PARITY_INTR
sysram0 parity interrupt status
10
1
read-only
SYSRAM1_PARITY_INTR
sysram1 parity interrupt status
11
1
read-only
WDT0_INTR
WDT0 interrupt status
8
1
read-only
WDT1_INTR
WDT1 interrupt status
9
1
read-only
MISC_CTRL
MISC control Register
0xC
32
read-write
n
0x0
0x0
UART0_OUTEN
UART0 output enable in half-duplex mode
0
1
read-write
UART2_OUTEN
UART2 output enable in half-duplex mode
2
1
read-write
PREFETCH_BYPASS_BUFFER_HIT_CNT
Prefetch Bypass Buffer Hit Counter Register
0x130
32
read-only
n
0x0
0x0
PREFETCH_BYPASS_CFG
Prefetch Bypass Confige Register
0x3C
32
read-write
n
0x0
0x0
BYPASS_ADDR
Prefetch Bypass Address
0
19
read-write
PREFETCH_CACHE_HIT_CNT
Prefetch Cache Hit Counter Register
0x134
32
read-only
n
0x0
0x0
PREFETCH_CFG
Prefetch Confige Register
0x38
32
read-write
n
0x0
0x0
CPU1_REMAP_EN
CPU1 Remap Enable
8
1
read-write
ONLY_BUF0
CPU0 Used Buffer Only
2
1
read-write
ONLY_BUF1
CPU1 Used Buffer Only
3
1
read-write
ONLY_CACHE
Cache Used Only
1
1
read-write
PREFETCH_EN
Prefetch Enable
0
1
read-write
PREFETCH_INFO_RST
Prefetch Info Reset
4
1
read-write
PREFETCH_DATA_BUFFER_HIT_CNT
Prefetch Data Buffer Hit Counter Register
0x138
32
read-only
n
0x0
0x0
PREFETCH_INST_BUFFER_HIT_CNT
Prefetch Instruction Hit Counter Register
0x13C
32
read-only
n
0x0
0x0
PREFETCH_STATE
Prefetch State Register
0x140
32
read-only
n
0x0
0x0
PREFETCH_STATE
Prefetch State
0
3
read-only
PWM_CFG
PWM confige Register
0x10
32
read-write
n
0x0
0x0
PWM0_SYNC
PWM0 synchronous
0
1
read-write
PWM1_SYNC
PWM1 synchronous
1
1
read-write
PWM2_SYNC
PWM2 synchronous
2
1
read-write
PWM3_SYNC
PWM3 synchronous
3
1
read-write
PWM4_SYNC
PWM4 synchronous
4
1
read-write
PWM5_SYNC
PWM5 synchronous
5
1
read-write
PWM6_SYNC
PWM6 synchronous
6
1
read-write
PWM7_SYNC
PWM7 synchronous
7
1
read-write
PWM_FRC_STOP
PWM force stop
23
1
read-write
PWM_TZ3_CPSEL
PWM TZ3 select
16
2
read-write
PWM_TZ5_FSEL
PWM TZ5 select
20
1
read-write
RXEV_CTRL
RXEV control Register
0x8
32
read-write
n
0x0
0x0
CHIPCTRL
CHIPCTRL intterupt connect enable
2
1
read-write
CHIPCTRL_C1
CHIPCTRL intterupt connect enable for core 1
18
1
read-write
DMA
DMA intterupt connect enable
0
1
read-write
DMA_C1
DMA intterupt connect enable for core 1
16
1
read-write
ERU0
ERU0 intterupt connect enable
6
1
read-write
ERU0_C1
ERU0 intterupt connect enable for core 1
22
1
read-write
ERU1
ERU1 intterupt connect enable
7
1
read-write
ERU1_C1
ERU1 intterupt connect enable for core 1
23
1
read-write
ERU2
ERU2 intterupt connect enable
8
1
read-write
ERU2_C1
ERU2 intterupt connect enable for core 1
24
1
read-write
ERU3
ERU3 intterupt connect enable
9
1
read-write
ERU3_C1
ERU3 intterupt connect enable for core 1
25
1
read-write
GPIO0
GPIO0 intterupt connect enable
3
1
read-write
GPIO0_C1
GPIO0 intterupt connect enable for core 1
19
1
read-write
GPIO1
GPIO1 intterupt connect enable
4
1
read-write
GPIO1_C1
GPIO1 intterupt connect enable for core 1
20
1
read-write
GPIO2
GPIO2 intterupt connect enable
5
1
read-write
GPIO2_C1
GPIO2 intterupt connect enable for core 1
21
1
read-write
IWDT
IWDT intterupt connect enable
1
1
read-write
IWDT_C1
IWDT intterupt connect enable for core 1
17
1
read-write
RXEV_EN
RVEV enable
15
1
read-write
RXEV_EN_C1
RVEV enable for core 1
31
1
read-write
SYSRAM_CTRL
RAM control Register
0x4
32
read-write
n
0x0
0x0
sysram0_ms
System RAM0 M31 reserved
16
4
read-write
sysram0_mse
System RAM0 M31 reserved
23
1
read-write
sysram0_parity_err_clr
System RAM0 parity error cleanup
9
1
read-write
sysram0_parity_intren
System RAM0 parity error interrupt enable
8
1
read-write
sysram1_ms
System RAM1 M31 reserved
24
4
read-write
sysram1_mse
System RAM1 M31 reserved
31
1
read-write
sysram1_parity_err_clr
System RAM1 parity error cleanup
11
1
read-write
sysram1_parity_intren
System RAM1 parity error interrupt enable
10
1
read-write
SYSTICK_CFG
SYSTICK confige Register
0x18
32
read-write
n
0x0
0x0
NOREF
clock reference select
25
1
read-write
SKEW
clock skew
24
1
read-write
STCALIB
clock calibration value
0
24
read-write
VERSION
VERSION Register
0xC00
32
read-only
n
0x0
0x0
TIMER0
TIMER0 Module
TIMER
0x0
0x0
0x10
registers
n
TIMER0
TIMER0 Interrupt
16
CLKPRESCALE
Timer0 Counter Prescale Register
0xC
32
read-write
n
0x0
0x0
PRESCALE
Timer Counter Prescale BIts
0
5
read-write
COMPARE
Timer0 Compare Value
0x4
32
read-write
n
0x0
0x0
COUNT
Timer0 counter
0x0
32
read-write
n
0x0
0x0
CTRL
Timer0 Control Register
0x8
32
read-write
n
0x0
0x0
ENABLE
Timer Enable
0
1
read-write
FREE_RUN
Emulation Control
3
1
read-write
INTR_EN
Timer Interrupt Enable
2
1
read-write
OV
Timer Overflow Flag
1
1
read-write
TIMER1
TIMER0 Module
TIMER
0x0
0x0
0x10
registers
n
TIMER1
TIMER1 Interrupt
17
CLKPRESCALE
Timer0 Counter Prescale Register
0xC
32
read-write
n
0x0
0x0
PRESCALE
Timer Counter Prescale BIts
0
5
read-write
COMPARE
Timer0 Compare Value
0x4
32
read-write
n
0x0
0x0
COUNT
Timer0 counter
0x0
32
read-write
n
0x0
0x0
CTRL
Timer0 Control Register
0x8
32
read-write
n
0x0
0x0
ENABLE
Timer Enable
0
1
read-write
FREE_RUN
Emulation Control
3
1
read-write
INTR_EN
Timer Interrupt Enable
2
1
read-write
OV
Timer Overflow Flag
1
1
read-write
TIMER2
TIMER0 Module
TIMER
0x0
0x0
0x10
registers
n
TIMER234
TIMER234 Interrupt
18
CLKPRESCALE
Timer0 Counter Prescale Register
0xC
32
read-write
n
0x0
0x0
PRESCALE
Timer Counter Prescale BIts
0
5
read-write
COMPARE
Timer0 Compare Value
0x4
32
read-write
n
0x0
0x0
COUNT
Timer0 counter
0x0
32
read-write
n
0x0
0x0
CTRL
Timer0 Control Register
0x8
32
read-write
n
0x0
0x0
ENABLE
Timer Enable
0
1
read-write
FREE_RUN
Emulation Control
3
1
read-write
INTR_EN
Timer Interrupt Enable
2
1
read-write
OV
Timer Overflow Flag
1
1
read-write
UART0
UART0
UART
0x0
0x0
0x1000
registers
n
UART0_RX
UART0 RX Interrupt
0
UART0
UART0 Interrupt
1
UARTCR
UART0 Control Register
0x30
32
read-write
n
0x0
0x0
CTSEn
Clear to Send hardware flow control enable
15
1
read-write
DTS
Data Transmit Ready
10
1
read-write
LBE
Loopback Enable
7
1
read-write
Out1
Out1
12
1
read-write
Out2
Out2
13
1
read-write
RTS
Request to Send
11
1
read-write
RTSEn
Ready to Send hardware flow control enable
14
1
read-write
RXE
Receive Enable
9
1
read-write
SIREN
SIR ENDEC Enable
1
1
read-write
SIRLP
SIR low-power IrDA mode
2
1
read-write
TXE
Transmit Enable
8
1
read-write
UARTEN
UART Enable
0
1
read-write
UARTDMACR
UART0 DMA Control Register
0x48
32
read-write
n
0x0
0x0
DMA_error
nUARTDCD Modem Interrupt mask
2
1
read-write
RxFIFO_en
nUARTRI Modem Interrupt mask
0
1
read-write
TxFIFO_en
nUARTCTS Modem Interrupt mask
1
1
read-write
UARTDR
uart data buff
0x0
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
10
1
read-write
DATA
UART0 Send And Recive Data
0
8
read-write
Framing_Error
UARTDR Framing Error
8
1
read-write
Overrun_Error
UARTDR Overrun Error
11
1
read-write
Parity_Error
UARTDR Parity Error
9
1
read-write
UARTFBRD
uart board rate mod 0..5 is usefull
0x28
32
read-write
n
0x0
0x0
UARTFR
UART0 Flag Register
0x18
32
read-only
n
0x0
0x0
BUSY
Indicate Is Busy
3
1
read-only
CTS
Clear to Send
0
1
read-only
DCD
Data Carrier Detect
2
1
read-only
DSR
Data Set Ready
1
1
read-only
RI
Ring indicator
8
1
read-only
RXFE
Receive FIFO Empty
4
1
read-only
RXFF
Receive FIFO Full
6
1
read-only
TXFE
Transmit FIFO Empty
7
1
read-only
TXFF
Transmit FIFO Full
5
1
read-only
UARTIBRD
uart board rate 0..15 is usefull
0x24
32
read-write
n
0x0
0x0
UARTICR
UART0 Int Clear Register
0x44
32
write-only
n
0x0
0x0
C_BE_IM
Clear Break Error Interrupt Mask
9
1
write-only
C_FE_IM
Clear Framing Error Interrupt Mask
7
1
write-only
C_nUARTCTS_IM
Clear nUARTCTS Modem Interrupt mask
1
1
write-only
C_nUARTDCD_IM
Clear nUARTDCD Modem Interrupt mask
2
1
write-only
C_nUARTDSR_IM
Clear nUARTDSR Modem Interrupt mask
3
1
write-only
C_nUARTRI_IM
Clear nUARTRI Modem Interrupt mask
0
1
write-only
C_OE_IM
Clear Overrun Error Interrupt Mask
10
1
write-only
C_PF_IM
Clear Parity Error Interrupt Mask
8
1
write-only
C_Receive_IM
Clear Receive Interrupt Mask
4
1
write-only
C_RT_IM
Clear Receive Ttimeout Interrupt Mask
6
1
write-only
C_Transmit_IM
Clear Transmit Interrupt Mask
5
1
write-only
UARTIFLS
fifo int level select
0x34
32
read-write
n
0x0
0x0
RXIFLSEL
Receive Interrupt FIFO Level Select
3
3
read-write
TXIFLSEL
Transmit Interrupt FIFO Level Select
0
3
read-write
UARTIMSC
int enable bit
0x38
32
read-write
n
0x0
0x0
BE_IM
Break Error Interrupt Mask
9
1
read-write
FE_IM
Framing Error Interrupt Mask
7
1
read-write
nUARTCTS_IM
nUARTCTS Modem Interrupt mask
1
1
read-write
nUARTDCD_IM
nUARTDCD Modem Interrupt mask
2
1
read-write
nUARTDSR_IM
nUARTDSR Modem Interrupt mask
3
1
read-write
nUARTRI_IM
nUARTRI Modem Interrupt mask
0
1
read-write
OE_IM
Overrun Error Interrupt Mask
10
1
read-write
PF_IM
Parity Error Interrupt Mask
8
1
read-write
Receive_IM
Receive Interrupt Mask
4
1
read-write
RT_IM
Receive Ttimeout Interrupt Mask
6
1
read-write
Transmit_IM
Transmit Interrupt Mask
5
1
read-write
UARTLCR_H
Line Control
0x2C
32
read-write
n
0x0
0x0
EPS
Even Parity Select
2
1
read-write
FEN
FIFO Enable
4
1
read-write
PEN
Parity Enable
1
1
read-write
SB
Send Break
0
1
read-write
SPS
Stick Parity Select
7
1
read-write
STP2
2 Stop Bits
3
1
read-write
WLEN
Word Length
5
2
read-write
UARTMIS
UART0 MASK Interrupt
0x40
32
read-only
n
0x0
0x0
BE_MI
Break Error Masked Interrupt
9
1
read-only
FE_MI
Framing Error Masked Interrupt
7
1
read-only
nUARTCTS_MI
nUARTCTS Modem Masked Interrupt
1
1
read-only
nUARTDCD_MI
nUARTDCD Modem Masked Interrupt
2
1
read-only
nUARTDSR_MI
nUARTDSR Modem Masked Interrupt
3
1
read-only
nUARTRI_MI
nUARTRI Modem Masked Interrupt
0
1
read-only
OE_MI
Overrun Error Masked Interrupt
10
1
read-only
PF_MI
Parity Error Masked Interrupt
8
1
read-only
Receive_MI
Receive Masked Interrupt
4
1
read-only
RT_MI
Receive Ttimeout Masked Interrupt
6
1
read-only
Transmit_MI
Transmit Masked Interrupt
5
1
read-only
UARTRIS
UART0 Int Rigio
0x3C
32
read-only
n
0x0
0x0
BE_I
Break Error Interrupt
9
1
read-only
FE_I
Framing Error Interrupt
7
1
read-only
nUARTCTS_I
nUARTCTS Modem Interrupt
1
1
read-only
nUARTDCD_I
nUARTDCD Modem Interrupt
2
1
read-only
nUARTDSR_I
nUARTDSR Modem Interrupt
3
1
read-only
nUARTRI_I
nUARTRI Modem Interrupt
0
1
read-only
OE_I
Overrun Error Interrupt
10
1
read-only
PF_I
Parity Error Interrupt
8
1
read-only
Receive_I
Receive Interrupt
4
1
read-only
RT_I
Receive Ttimeout Interrupt
6
1
read-only
Transmit_I
Transmit Interrupt
5
1
read-only
UARTRSR
uart rx status
0x4
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
2
1
read-write
Framing_Error
UARTDR Framing Error
0
1
read-write
Overrun_Error
UARTDR Overrun Error
3
1
read-write
Parity_Error
UARTDR Parity Error
1
1
read-write
UART1
UART0
UART
0x0
0x0
0x1000
registers
n
UART12
Uart12 Interrupt
2
UARTCR
UART0 Control Register
0x30
32
read-write
n
0x0
0x0
CTSEn
Clear to Send hardware flow control enable
15
1
read-write
DTS
Data Transmit Ready
10
1
read-write
LBE
Loopback Enable
7
1
read-write
Out1
Out1
12
1
read-write
Out2
Out2
13
1
read-write
RTS
Request to Send
11
1
read-write
RTSEn
Ready to Send hardware flow control enable
14
1
read-write
RXE
Receive Enable
9
1
read-write
SIREN
SIR ENDEC Enable
1
1
read-write
SIRLP
SIR low-power IrDA mode
2
1
read-write
TXE
Transmit Enable
8
1
read-write
UARTEN
UART Enable
0
1
read-write
UARTDMACR
UART0 DMA Control Register
0x48
32
read-write
n
0x0
0x0
DMA_error
nUARTDCD Modem Interrupt mask
2
1
read-write
RxFIFO_en
nUARTRI Modem Interrupt mask
0
1
read-write
TxFIFO_en
nUARTCTS Modem Interrupt mask
1
1
read-write
UARTDR
uart data buff
0x0
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
10
1
read-write
DATA
UART0 Send And Recive Data
0
8
read-write
Framing_Error
UARTDR Framing Error
8
1
read-write
Overrun_Error
UARTDR Overrun Error
11
1
read-write
Parity_Error
UARTDR Parity Error
9
1
read-write
UARTFBRD
uart board rate mod 0..5 is usefull
0x28
32
read-write
n
0x0
0x0
UARTFR
UART0 Flag Register
0x18
32
read-only
n
0x0
0x0
BUSY
Indicate Is Busy
3
1
read-only
CTS
Clear to Send
0
1
read-only
DCD
Data Carrier Detect
2
1
read-only
DSR
Data Set Ready
1
1
read-only
RI
Ring indicator
8
1
read-only
RXFE
Receive FIFO Empty
4
1
read-only
RXFF
Receive FIFO Full
6
1
read-only
TXFE
Transmit FIFO Empty
7
1
read-only
TXFF
Transmit FIFO Full
5
1
read-only
UARTIBRD
uart board rate 0..15 is usefull
0x24
32
read-write
n
0x0
0x0
UARTICR
UART0 Int Clear Register
0x44
32
write-only
n
0x0
0x0
C_BE_IM
Clear Break Error Interrupt Mask
9
1
write-only
C_FE_IM
Clear Framing Error Interrupt Mask
7
1
write-only
C_nUARTCTS_IM
Clear nUARTCTS Modem Interrupt mask
1
1
write-only
C_nUARTDCD_IM
Clear nUARTDCD Modem Interrupt mask
2
1
write-only
C_nUARTDSR_IM
Clear nUARTDSR Modem Interrupt mask
3
1
write-only
C_nUARTRI_IM
Clear nUARTRI Modem Interrupt mask
0
1
write-only
C_OE_IM
Clear Overrun Error Interrupt Mask
10
1
write-only
C_PF_IM
Clear Parity Error Interrupt Mask
8
1
write-only
C_Receive_IM
Clear Receive Interrupt Mask
4
1
write-only
C_RT_IM
Clear Receive Ttimeout Interrupt Mask
6
1
write-only
C_Transmit_IM
Clear Transmit Interrupt Mask
5
1
write-only
UARTIFLS
fifo int level select
0x34
32
read-write
n
0x0
0x0
RXIFLSEL
Receive Interrupt FIFO Level Select
3
3
read-write
TXIFLSEL
Transmit Interrupt FIFO Level Select
0
3
read-write
UARTIMSC
int enable bit
0x38
32
read-write
n
0x0
0x0
BE_IM
Break Error Interrupt Mask
9
1
read-write
FE_IM
Framing Error Interrupt Mask
7
1
read-write
nUARTCTS_IM
nUARTCTS Modem Interrupt mask
1
1
read-write
nUARTDCD_IM
nUARTDCD Modem Interrupt mask
2
1
read-write
nUARTDSR_IM
nUARTDSR Modem Interrupt mask
3
1
read-write
nUARTRI_IM
nUARTRI Modem Interrupt mask
0
1
read-write
OE_IM
Overrun Error Interrupt Mask
10
1
read-write
PF_IM
Parity Error Interrupt Mask
8
1
read-write
Receive_IM
Receive Interrupt Mask
4
1
read-write
RT_IM
Receive Ttimeout Interrupt Mask
6
1
read-write
Transmit_IM
Transmit Interrupt Mask
5
1
read-write
UARTLCR_H
Line Control
0x2C
32
read-write
n
0x0
0x0
EPS
Even Parity Select
2
1
read-write
FEN
FIFO Enable
4
1
read-write
PEN
Parity Enable
1
1
read-write
SB
Send Break
0
1
read-write
SPS
Stick Parity Select
7
1
read-write
STP2
2 Stop Bits
3
1
read-write
WLEN
Word Length
5
2
read-write
UARTMIS
UART0 MASK Interrupt
0x40
32
read-only
n
0x0
0x0
BE_MI
Break Error Masked Interrupt
9
1
read-only
FE_MI
Framing Error Masked Interrupt
7
1
read-only
nUARTCTS_MI
nUARTCTS Modem Masked Interrupt
1
1
read-only
nUARTDCD_MI
nUARTDCD Modem Masked Interrupt
2
1
read-only
nUARTDSR_MI
nUARTDSR Modem Masked Interrupt
3
1
read-only
nUARTRI_MI
nUARTRI Modem Masked Interrupt
0
1
read-only
OE_MI
Overrun Error Masked Interrupt
10
1
read-only
PF_MI
Parity Error Masked Interrupt
8
1
read-only
Receive_MI
Receive Masked Interrupt
4
1
read-only
RT_MI
Receive Ttimeout Masked Interrupt
6
1
read-only
Transmit_MI
Transmit Masked Interrupt
5
1
read-only
UARTRIS
UART0 Int Rigio
0x3C
32
read-only
n
0x0
0x0
BE_I
Break Error Interrupt
9
1
read-only
FE_I
Framing Error Interrupt
7
1
read-only
nUARTCTS_I
nUARTCTS Modem Interrupt
1
1
read-only
nUARTDCD_I
nUARTDCD Modem Interrupt
2
1
read-only
nUARTDSR_I
nUARTDSR Modem Interrupt
3
1
read-only
nUARTRI_I
nUARTRI Modem Interrupt
0
1
read-only
OE_I
Overrun Error Interrupt
10
1
read-only
PF_I
Parity Error Interrupt
8
1
read-only
Receive_I
Receive Interrupt
4
1
read-only
RT_I
Receive Ttimeout Interrupt
6
1
read-only
Transmit_I
Transmit Interrupt
5
1
read-only
UARTRSR
uart rx status
0x4
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
2
1
read-write
Framing_Error
UARTDR Framing Error
0
1
read-write
Overrun_Error
UARTDR Overrun Error
3
1
read-write
Parity_Error
UARTDR Parity Error
1
1
read-write
UART2
UART0
UART
0x0
0x0
0x1000
registers
n
UART12
Uart12 Interrupt
2
UARTCR
UART0 Control Register
0x30
32
read-write
n
0x0
0x0
CTSEn
Clear to Send hardware flow control enable
15
1
read-write
DTS
Data Transmit Ready
10
1
read-write
LBE
Loopback Enable
7
1
read-write
Out1
Out1
12
1
read-write
Out2
Out2
13
1
read-write
RTS
Request to Send
11
1
read-write
RTSEn
Ready to Send hardware flow control enable
14
1
read-write
RXE
Receive Enable
9
1
read-write
SIREN
SIR ENDEC Enable
1
1
read-write
SIRLP
SIR low-power IrDA mode
2
1
read-write
TXE
Transmit Enable
8
1
read-write
UARTEN
UART Enable
0
1
read-write
UARTDMACR
UART0 DMA Control Register
0x48
32
read-write
n
0x0
0x0
DMA_error
nUARTDCD Modem Interrupt mask
2
1
read-write
RxFIFO_en
nUARTRI Modem Interrupt mask
0
1
read-write
TxFIFO_en
nUARTCTS Modem Interrupt mask
1
1
read-write
UARTDR
uart data buff
0x0
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
10
1
read-write
DATA
UART0 Send And Recive Data
0
8
read-write
Framing_Error
UARTDR Framing Error
8
1
read-write
Overrun_Error
UARTDR Overrun Error
11
1
read-write
Parity_Error
UARTDR Parity Error
9
1
read-write
UARTFBRD
uart board rate mod 0..5 is usefull
0x28
32
read-write
n
0x0
0x0
UARTFR
UART0 Flag Register
0x18
32
read-only
n
0x0
0x0
BUSY
Indicate Is Busy
3
1
read-only
CTS
Clear to Send
0
1
read-only
DCD
Data Carrier Detect
2
1
read-only
DSR
Data Set Ready
1
1
read-only
RI
Ring indicator
8
1
read-only
RXFE
Receive FIFO Empty
4
1
read-only
RXFF
Receive FIFO Full
6
1
read-only
TXFE
Transmit FIFO Empty
7
1
read-only
TXFF
Transmit FIFO Full
5
1
read-only
UARTIBRD
uart board rate 0..15 is usefull
0x24
32
read-write
n
0x0
0x0
UARTICR
UART0 Int Clear Register
0x44
32
write-only
n
0x0
0x0
C_BE_IM
Clear Break Error Interrupt Mask
9
1
write-only
C_FE_IM
Clear Framing Error Interrupt Mask
7
1
write-only
C_nUARTCTS_IM
Clear nUARTCTS Modem Interrupt mask
1
1
write-only
C_nUARTDCD_IM
Clear nUARTDCD Modem Interrupt mask
2
1
write-only
C_nUARTDSR_IM
Clear nUARTDSR Modem Interrupt mask
3
1
write-only
C_nUARTRI_IM
Clear nUARTRI Modem Interrupt mask
0
1
write-only
C_OE_IM
Clear Overrun Error Interrupt Mask
10
1
write-only
C_PF_IM
Clear Parity Error Interrupt Mask
8
1
write-only
C_Receive_IM
Clear Receive Interrupt Mask
4
1
write-only
C_RT_IM
Clear Receive Ttimeout Interrupt Mask
6
1
write-only
C_Transmit_IM
Clear Transmit Interrupt Mask
5
1
write-only
UARTIFLS
fifo int level select
0x34
32
read-write
n
0x0
0x0
RXIFLSEL
Receive Interrupt FIFO Level Select
3
3
read-write
TXIFLSEL
Transmit Interrupt FIFO Level Select
0
3
read-write
UARTIMSC
int enable bit
0x38
32
read-write
n
0x0
0x0
BE_IM
Break Error Interrupt Mask
9
1
read-write
FE_IM
Framing Error Interrupt Mask
7
1
read-write
nUARTCTS_IM
nUARTCTS Modem Interrupt mask
1
1
read-write
nUARTDCD_IM
nUARTDCD Modem Interrupt mask
2
1
read-write
nUARTDSR_IM
nUARTDSR Modem Interrupt mask
3
1
read-write
nUARTRI_IM
nUARTRI Modem Interrupt mask
0
1
read-write
OE_IM
Overrun Error Interrupt Mask
10
1
read-write
PF_IM
Parity Error Interrupt Mask
8
1
read-write
Receive_IM
Receive Interrupt Mask
4
1
read-write
RT_IM
Receive Ttimeout Interrupt Mask
6
1
read-write
Transmit_IM
Transmit Interrupt Mask
5
1
read-write
UARTLCR_H
Line Control
0x2C
32
read-write
n
0x0
0x0
EPS
Even Parity Select
2
1
read-write
FEN
FIFO Enable
4
1
read-write
PEN
Parity Enable
1
1
read-write
SB
Send Break
0
1
read-write
SPS
Stick Parity Select
7
1
read-write
STP2
2 Stop Bits
3
1
read-write
WLEN
Word Length
5
2
read-write
UARTMIS
UART0 MASK Interrupt
0x40
32
read-only
n
0x0
0x0
BE_MI
Break Error Masked Interrupt
9
1
read-only
FE_MI
Framing Error Masked Interrupt
7
1
read-only
nUARTCTS_MI
nUARTCTS Modem Masked Interrupt
1
1
read-only
nUARTDCD_MI
nUARTDCD Modem Masked Interrupt
2
1
read-only
nUARTDSR_MI
nUARTDSR Modem Masked Interrupt
3
1
read-only
nUARTRI_MI
nUARTRI Modem Masked Interrupt
0
1
read-only
OE_MI
Overrun Error Masked Interrupt
10
1
read-only
PF_MI
Parity Error Masked Interrupt
8
1
read-only
Receive_MI
Receive Masked Interrupt
4
1
read-only
RT_MI
Receive Ttimeout Masked Interrupt
6
1
read-only
Transmit_MI
Transmit Masked Interrupt
5
1
read-only
UARTRIS
UART0 Int Rigio
0x3C
32
read-only
n
0x0
0x0
BE_I
Break Error Interrupt
9
1
read-only
FE_I
Framing Error Interrupt
7
1
read-only
nUARTCTS_I
nUARTCTS Modem Interrupt
1
1
read-only
nUARTDCD_I
nUARTDCD Modem Interrupt
2
1
read-only
nUARTDSR_I
nUARTDSR Modem Interrupt
3
1
read-only
nUARTRI_I
nUARTRI Modem Interrupt
0
1
read-only
OE_I
Overrun Error Interrupt
10
1
read-only
PF_I
Parity Error Interrupt
8
1
read-only
Receive_I
Receive Interrupt
4
1
read-only
RT_I
Receive Ttimeout Interrupt
6
1
read-only
Transmit_I
Transmit Interrupt
5
1
read-only
UARTRSR
uart rx status
0x4
32
read-write
n
0x0
0x0
Break_Error
UARTDR Break Error
2
1
read-write
Framing_Error
UARTDR Framing Error
0
1
read-write
Overrun_Error
UARTDR Overrun Error
3
1
read-write
Parity_Error
UARTDR Parity Error
1
1
read-write
WDT0
WDT0
WDT
0x0
0x0
0x1000
registers
n
SYS
SYS Interrupt
14
WDOGCONTROL
WDT Control Register
0x8
32
read-write
n
0x0
0x0
INTEN
Interrput Enable Control Bit
0
1
read-write
RSTEN
RST Enable Control Bit
1
1
read-write
WDOGINTCLR
WDT Interrput Clear
0xC
32
write-only
n
0x0
0x0
WDOGLOAD
WDT Reload Register
0x0
32
read-write
n
0x0
0x0
WDOGLOCK
WDT Locked Register
0xC00
32
read-write
n
0x0
0x0
WDOGMIS
WDT Mask Interrput
0x14
32
read-only
n
0x0
0x0
WDOGMINT
WDT Mask Interrput flag Bit
0
1
read-only
WDOGRIS
WDT Original Interrput
0x10
32
read-only
n
0x0
0x0
WDOGINT
WDT Original Interrput flag Bit
0
1
read-only
WDOGVALUE
WDT Current Counter
0x4
32
read-only
n
0x0
0x0
WDT1
WDT0
WDT
0x0
0x0
0x1000
registers
n
SYS
SYS Interrupt
14
WDOGCONTROL
WDT Control Register
0x8
32
read-write
n
0x0
0x0
INTEN
Interrput Enable Control Bit
0
1
read-write
RSTEN
RST Enable Control Bit
1
1
read-write
WDOGINTCLR
WDT Interrput Clear
0xC
32
write-only
n
0x0
0x0
WDOGLOAD
WDT Reload Register
0x0
32
read-write
n
0x0
0x0
WDOGLOCK
WDT Locked Register
0xC00
32
read-write
n
0x0
0x0
WDOGMIS
WDT Mask Interrput
0x14
32
read-only
n
0x0
0x0
WDOGMINT
WDT Mask Interrput flag Bit
0
1
read-only
WDOGRIS
WDT Original Interrput
0x10
32
read-only
n
0x0
0x0
WDOGINT
WDT Original Interrput flag Bit
0
1
read-only
WDOGVALUE
WDT Current Counter
0x4
32
read-only
n
0x0
0x0