max32665

Vendor Web: Maxim

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Name : max32665

Flash : 1024 kB

Flash bank : 0x80000 Bytes @ 0x10000000

Flash bank : 0x80000 Bytes @ 0x10080000

RAM : 560 kB

RAM : 0x0008C000 Bytes @ 0x0008C000

description : MAX32665 32-bit ARM Cortex-M4 microcontroller, 128KB of system RAM, 4KB of One-Time-Programmable (OTP) memory, 64KB of Boot ROM, 8KB of battery-backed and AES self-encrypted SRAM.

Architecture

Architecture : ARM Cortex-M4 (CM4)

revision : r2p1

endian : little

Memory Protection Unit (MPU) : available

Floating Point Unit (FPU) : available

Number of relevant bits in Interrupt priority : 3

Peripherals

name : ADC
description : 10-bit Analog to Digital Converter
base address : 0x0
Interrupt (20) ADC : ADC IRQ

name : AES_KEY
description : AES Keys.
base address : 0x0

name : DMA
description : DMA Controller Fully programmable, chaining capable DMA channels.
base address : 0x0
Interrupt (28) DMA0
Interrupt (29) DMA1
Interrupt (30) DMA2
Interrupt (31) DMA3
Interrupt (68) DMA4
Interrupt (69) DMA5
Interrupt (70) DMA6
Interrupt (71) DMA7
Interrupt (72) DMA8
Interrupt (73) DMA9
Interrupt (74) DMA10
Interrupt (75) DMA11
Interrupt (76) DMA12
Interrupt (77) DMA13
Interrupt (78) DMA14
Interrupt (79) DMA15

name : DVS
description : Dynamic Voltage Scaling
base address : 0x0
Interrupt (83) DVS : Dynamic Voltage Scaling Interrupt

name : EMCC
description : External Memory Cache Controller Registers.
base address : 0x0

name : FCR
description : Function Control.
base address : 0x0

name : FLC
description : Flash Memory Control.
base address : 0x0
Interrupt (23) Flash_Controller : Flash Controller interrupt.

name : GCR
description : Global Control Registers.
base address : 0x0

name : GPIO0
description : Individual I/O for each GPIO
base address : 0x0
Interrupt (24) GPIO0 : GPIO0 interrupt.

name : GPIO1
description : Individual I/O for each GPIO 1
base address : 0x0
Interrupt (25) GPIO1 : GPIO1 IRQ

name : GPIO2
description : Individual I/O for each GPIO 2
base address : 0x0
Interrupt (26) GPIO2 : GPIO2 IRQ

name : HTMR
description : High Speed Timer Module.
base address : 0x0
Interrupt (93) HTimer : HTimer interrupt.

name : HTMR1
description : High Speed Timer Module. 1
base address : 0x0
Interrupt (94) HTMR1 : HTMR1 IRQ

name : I2C0
description : Inter-Integrated Circuit.
base address : 0x0
Interrupt (13) I2C0 : I2C0 IRQ

name : I2C1
description : Inter-Integrated Circuit. 1
base address : 0x0
Interrupt (36) I2C1 : I2C1 IRQ

name : I2C2
description : Inter-Integrated Circuit. 2
base address : 0x0
Interrupt (62) I2C2 : I2C2 IRQ

name : ICC0
description : Instruction Cache Controller Registers
base address : 0x0

name : ICC1
description : Instruction Cache Controller Registers 1
base address : 0x0

name : MCR
description : Misc Control.
base address : 0x0

name : OWM
description : 1-Wire Master Interface.
base address : 0x0
Interrupt (67) OneWire

name : PT
description : Pulse Train
base address : 0x0

name : PT1
description : Pulse Train 1
base address : 0x0

name : PT10
description : Pulse Train 10
base address : 0x0

name : PT11
description : Pulse Train 11
base address : 0x0

name : PT12
description : Pulse Train 12
base address : 0x0

name : PT13
description : Pulse Train 13
base address : 0x0

name : PT14
description : Pulse Train 14
base address : 0x0

name : PT15
description : Pulse Train 15
base address : 0x0

name : PT2
description : Pulse Train 2
base address : 0x0

name : PT3
description : Pulse Train 3
base address : 0x0

name : PT4
description : Pulse Train 4
base address : 0x0

name : PT5
description : Pulse Train 5
base address : 0x0

name : PT6
description : Pulse Train 6
base address : 0x0

name : PT7
description : Pulse Train 7
base address : 0x0

name : PT8
description : Pulse Train 8
base address : 0x0

name : PT9
description : Pulse Train 9
base address : 0x0

name : PTG
description : Pulse Train Generation
base address : 0x0
Interrupt (59) PT : Pulse Train IRQ

name : PWRSEQ
description : Power Sequencer / Low Power Control Register.
base address : 0x0

name : RPU
description : Resource Protection Unit
base address : 0x0

name : RTC
description : Real Time Clock and Alarm.
base address : 0x0
Interrupt (3) RTC : RTC interrupt.

name : SDHC
description : SDHC/SDIO Controller
base address : 0x0
Interrupt (66) SDHC

name : SDMA
description : Smart DMA
base address : 0x0
Interrupt (60) SmartDMA : Smart DMA interrupt.

name : SEMA
description : The Semaphore peripheral allows multiple cores in a system to cooperate when accessing shred resources. The peripheral contains eight semaphores that can be atomically set and cleared. It is left to the discretion of the software architect to decide how and when the semaphores are used and how they are allocated. Existing hardware does not have to be modified for this type of cooperative sharing, and the use of semaphores is exclusively within the software domain.
base address : 0x0

name : SIMO
description : Single Inductor Multiple Output Switching Converter
base address : 0x0

name : SIR
description : System Initialization Registers.
base address : 0x0

name : SMON
description : The Security Monitor block used to monitor system threat conditions.
base address : 0x0

name : SPI17Y
description : SPI peripheral.
base address : 0x0
Interrupt (56) SPI0

name : SPI17Y1
description : SPI peripheral. 1
base address : 0x0
Interrupt (16) SPI17Y1 : SPI17Y1 IRQ

name : SPI17Y2
description : SPI peripheral. 2
base address : 0x0
Interrupt (17) SPI17Y2 : SPI17Y2 IRQ

name : SPIXF
description : SPIXF Master
base address : 0x0

name : SPIXFC
description : SPI XiP Flash Configuration Controller
base address : 0x0
Interrupt (38) SPIXFC : SPIXFC IRQ

name : SPIXF_FIFO
description : SPI XiP Master Controller FIFO.
base address : 0x0

name : SPIXR
description : SPIXR peripheral.
base address : 0x0

name : TMR0
description : 32-bit reloadable timer that can be used for timing and event counting.
base address : 0x0
Interrupt (5) TMR0 : TMR0 IRQ

name : TMR1
description : 32-bit reloadable timer that can be used for timing and event counting. 1
base address : 0x0
Interrupt (6) TMR1 : TMR1 IRQ

name : TMR2
description : 32-bit reloadable timer that can be used for timing and event counting. 2
base address : 0x0
Interrupt (7) TMR2 : TMR2 IRQ

name : TMR3
description : 32-bit reloadable timer that can be used for timing and event counting. 3
base address : 0x0
Interrupt (8) TMR3 : TMR3 IRQ

name : TMR4
description : 32-bit reloadable timer that can be used for timing and event counting. 4
base address : 0x0
Interrupt (9) TMR4 : TMR4 IRQ

name : TMR5
description : 32-bit reloadable timer that can be used for timing and event counting. 5
base address : 0x0
Interrupt (10) TMR5 : TMR5 IRQ

name : TPU
description : The Trust Protection Unit used to assist the computationally intensive operations of several common cryptographic algorithms.
base address : 0x0
Interrupt (27) Crypto_Engine : Crypto Engine interrupt.

name : TRNG
description : Random Number Generator.
base address : 0x0
Interrupt (4) TRNG : TRNG interrupt.

name : UART0
description : UART
base address : 0x0
Interrupt (14) UART0 : UART0 IRQ

name : UART1
description : UART 1
base address : 0x0
Interrupt (15) UART1 : UART1 IRQ

name : UART2
description : UART 2
base address : 0x0
Interrupt (34) UART2 : UART2 IRQ

name : USBHS
description : USB 2.0 High-speed Controller.
base address : 0x0
Interrupt (2) USB

name : WDT0
description : Watchdog Timer 0
base address : 0x0
Interrupt (1) WDT0

name : WDT1
description : Watchdog Timer 0 1
base address : 0x0
Interrupt (57) WDT1 : WDT1 IRQ

name : WUT
description : Wakeup Timer.
base address : 0x0
Interrupt (53) Wakeup_Timer


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